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ARM: dts: am57xx-beagle-x15: Add pinmux configuration for MMC
Include dra74x-mmc-iodelay.dtsi which has pinmux and IODelay configuration values for the various MMC modes for dra74 SoC and use it in the pinctrl properties of MMC devicetree nodes present in am57xx-beagle-x15/am57xx-beagle-x15-revb1. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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@ -9,6 +9,7 @@
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#include "dra74x.dtsi"
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#include "am57xx-commercial-grade.dtsi"
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#include "dra74x-mmc-iodelay.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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@ -166,34 +167,6 @@
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};
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};
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&dra7_pmx_core {
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mmc1_pins_default: mmc1_pins_default {
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pinctrl-single,pins = <
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DRA7XX_CORE_IOPAD(0x376c, PIN_INPUT | MUX_MODE14) /* mmc1sdcd.gpio219 */
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DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */
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DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
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DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
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DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */
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DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */
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DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */
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>;
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};
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mmc2_pins_default: mmc2_pins_default {
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pinctrl-single,pins = <
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DRA7XX_CORE_IOPAD(0x349c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */
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DRA7XX_CORE_IOPAD(0x34b0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */
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DRA7XX_CORE_IOPAD(0x34a0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */
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DRA7XX_CORE_IOPAD(0x34a4, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */
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DRA7XX_CORE_IOPAD(0x34a8, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */
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DRA7XX_CORE_IOPAD(0x34ac, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */
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DRA7XX_CORE_IOPAD(0x348c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */
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DRA7XX_CORE_IOPAD(0x3490, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */
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DRA7XX_CORE_IOPAD(0x3494, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */
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DRA7XX_CORE_IOPAD(0x3498, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */
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>;
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};
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};
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&i2c1 {
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status = "okay";
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clock-frequency = <400000>;
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@ -19,10 +19,25 @@
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};
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&mmc1 {
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pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104";
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pinctrl-0 = <&mmc1_pins_default>;
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pinctrl-1 = <&mmc1_pins_hs>;
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pinctrl-2 = <&mmc1_pins_sdr12>;
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pinctrl-3 = <&mmc1_pins_sdr25>;
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pinctrl-4 = <&mmc1_pins_sdr50>;
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pinctrl-5 = <&mmc1_pins_ddr50 &mmc1_iodelay_ddr_rev11_conf>;
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pinctrl-6 = <&mmc1_pins_sdr104 &mmc1_iodelay_sdr104_rev11_conf>;
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vmmc-supply = <&vdd_3v3>;
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vqmmc-supply = <&ldo1_reg>;
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};
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&mmc2 {
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pinctrl-names = "default", "hs", "ddr_1_8v";
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pinctrl-0 = <&mmc2_pins_default>;
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pinctrl-1 = <&mmc2_pins_hs>;
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pinctrl-2 = <&mmc2_pins_ddr_3_3v_rev11 &mmc2_iodelay_ddr_3_3v_rev11_conf>;
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};
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/* errata i880 "Ethernet RGMII2 Limited to 10/100 Mbps" */
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&phy1 {
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max-speed = <100>;
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@ -20,9 +20,20 @@
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};
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&mmc1 {
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pinctrl-names = "default", "hs";
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pinctrl-0 = <&mmc1_pins_default>;
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pinctrl-1 = <&mmc1_pins_hs>;
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vmmc-supply = <&ldo1_reg>;
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};
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&mmc2 {
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pinctrl-names = "default", "hs", "ddr_1_8v";
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pinctrl-0 = <&mmc2_pins_default>;
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pinctrl-1 = <&mmc2_pins_hs>;
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pinctrl-2 = <&mmc2_pins_ddr_3_3v_rev11 &mmc2_iodelay_ddr_3_3v_rev11_conf>;
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};
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/* errata i880 "Ethernet RGMII2 Limited to 10/100 Mbps" */
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&phy1 {
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max-speed = <100>;
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