lib: Add one-byte emulation function

Architectures are required to provide four-byte cmpxchg() and 64-bit
architectures are additionally required to provide eight-byte cmpxchg().
However, there are cases where one-byte cmpxchg() would be extremely
useful.  Therefore, provide cmpxchg_emu_u8() that emulates one-byte
cmpxchg() in terms of four-byte cmpxchg().

Note that this emulations is fully ordered, and can (for example) cause
one-byte cmpxchg_relaxed() to incur the overhead of full ordering.
If this causes problems for a given architecture, that architecture is
free to provide its own lighter-weight primitives.

[ paulmck: Apply Marco Elver feedback. ]
[ paulmck: Apply kernel test robot feedback. ]
[ paulmck: Drop two-byte support per Arnd Bergmann feedback. ]

Link: https://lore.kernel.org/all/0733eb10-5e7a-4450-9b8a-527b97c842ff@paulmck-laptop/

Signed-off-by: Paul E. McKenney <paulmck@kernel.org>
Acked-by: Marco Elver <elver@google.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: "Peter Zijlstra (Intel)" <peterz@infradead.org>
Cc: Douglas Anderson <dianders@chromium.org>
Cc: Petr Mladek <pmladek@suse.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: <linux-arch@vger.kernel.org>
This commit is contained in:
Paul E. McKenney 2024-03-17 14:44:38 -07:00
parent d428032b35
commit a88d970c8b
4 changed files with 64 additions and 0 deletions

View File

@ -1609,4 +1609,7 @@ config CC_HAS_SANE_FUNCTION_ALIGNMENT
# strict alignment always, even with -falign-functions.
def_bool CC_HAS_MIN_FUNCTION_ALIGNMENT || CC_IS_CLANG
config ARCH_NEED_CMPXCHG_1_EMU
bool
endmenu

View File

@ -0,0 +1,15 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Emulated 1-byte and 2-byte cmpxchg operations for architectures
* lacking direct support for these sizes. These are implemented in terms
* of 4-byte cmpxchg operations.
*
* Copyright (C) 2024 Paul E. McKenney.
*/
#ifndef __LINUX_CMPXCHG_EMU_H
#define __LINUX_CMPXCHG_EMU_H
uintptr_t cmpxchg_emu_u8(volatile u8 *p, uintptr_t old, uintptr_t new);
#endif /* __LINUX_CMPXCHG_EMU_H */

View File

@ -236,6 +236,7 @@ obj-$(CONFIG_FUNCTION_ERROR_INJECTION) += error-inject.o
lib-$(CONFIG_GENERIC_BUG) += bug.o
obj-$(CONFIG_HAVE_ARCH_TRACEHOOK) += syscall.o
obj-$(CONFIG_ARCH_NEED_CMPXCHG_1_EMU) += cmpxchg-emu.o
obj-$(CONFIG_DYNAMIC_DEBUG_CORE) += dynamic_debug.o
#ensure exported functions have prototypes

45
lib/cmpxchg-emu.c Normal file
View File

@ -0,0 +1,45 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Emulated 1-byte cmpxchg operation for architectures lacking direct
* support for this size. This is implemented in terms of 4-byte cmpxchg
* operations.
*
* Copyright (C) 2024 Paul E. McKenney.
*/
#include <linux/types.h>
#include <linux/export.h>
#include <linux/instrumented.h>
#include <linux/atomic.h>
#include <linux/panic.h>
#include <linux/bug.h>
#include <asm-generic/rwonce.h>
#include <linux/cmpxchg-emu.h>
union u8_32 {
u8 b[4];
u32 w;
};
/* Emulate one-byte cmpxchg() in terms of 4-byte cmpxchg. */
uintptr_t cmpxchg_emu_u8(volatile u8 *p, uintptr_t old, uintptr_t new)
{
u32 *p32 = (u32 *)(((uintptr_t)p) & ~0x3);
int i = ((uintptr_t)p) & 0x3;
union u8_32 old32;
union u8_32 new32;
u32 ret;
ret = READ_ONCE(*p32);
do {
old32.w = ret;
if (old32.b[i] != old)
return old32.b[i];
new32.w = old32.w;
new32.b[i] = new;
instrument_atomic_read_write(p, 1);
ret = data_race(cmpxchg(p32, old32.w, new32.w)); // Overridden above.
} while (ret != old32.w);
return old;
}
EXPORT_SYMBOL_GPL(cmpxchg_emu_u8);