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edac: Create a dimm struct and move the labels into it
The way a DIMM is currently represented implies that they're linked into a per-csrow struct. However, some drivers don't see csrows, as they're ridden behind some chip like the AMB's on FBDIMM's, for example. This forced drivers to fake^Wvirtualize a csrow struct, and to create a mess under csrow/channel original's concept. Move the DIMM labels into a per-DIMM struct, and add there the real location of the socket, in terms of csrow/channel. Latter patches will modify the location to properly represent the memory architecture. All other drivers will use a per-csrow type of location. Some of those drivers will require a latter conversion, as they also fake the csrows internally. TODO: While this patch doesn't change the existing behavior, on csrows-based memory controllers, a csrow/channel pair points to a memory rank. There's a known bug at the EDAC core that allows having different labels for the same DIMM, if it has more than one rank. A latter patch is need to merge the several ranks for a DIMM into the same dimm_info struct, in order to avoid having different labels for the same DIMM. The edac_mc_alloc() will now contain a per-dimm initialization loop that will be changed by latter patches in order to match other types of memory architectures. Reviewed-by: Aristeu Rozanski <arozansk@redhat.com> Reviewed-by: Borislav Petkov <borislav.petkov@amd.com> Cc: Doug Thompson <norsk5@yahoo.com> Cc: Ranganathan Desikan <ravi@jetztechnologies.com> Cc: "Arvind R." <arvino55@gmail.com> Cc: "Niklas Söderlund" <niklas.soderlund@ericsson.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
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@ -44,7 +44,7 @@ static void edac_mc_dump_channel(struct rank_info *chan)
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debugf4("\tchannel = %p\n", chan);
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debugf4("\tchannel->chan_idx = %d\n", chan->chan_idx);
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debugf4("\tchannel->ce_count = %d\n", chan->ce_count);
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debugf4("\tchannel->label = '%s'\n", chan->label);
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debugf4("\tchannel->label = '%s'\n", chan->dimm->label);
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debugf4("\tchannel->csrow = %p\n\n", chan->csrow);
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}
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@ -157,6 +157,7 @@ struct mem_ctl_info *edac_mc_alloc(unsigned sz_pvt, unsigned nr_csrows,
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struct mem_ctl_info *mci;
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struct csrow_info *csi, *csrow;
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struct rank_info *chi, *chp, *chan;
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struct dimm_info *dimm;
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void *pvt;
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unsigned size;
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int row, chn;
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@ -170,7 +171,8 @@ struct mem_ctl_info *edac_mc_alloc(unsigned sz_pvt, unsigned nr_csrows,
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mci = (struct mem_ctl_info *)0;
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csi = edac_align_ptr(&mci[1], sizeof(*csi));
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chi = edac_align_ptr(&csi[nr_csrows], sizeof(*chi));
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pvt = edac_align_ptr(&chi[nr_chans * nr_csrows], sz_pvt);
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dimm = edac_align_ptr(&chi[nr_chans * nr_csrows], sizeof(*dimm));
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pvt = edac_align_ptr(&dimm[nr_chans * nr_csrows], sz_pvt);
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size = ((unsigned long)pvt) + sz_pvt;
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mci = kzalloc(size, GFP_KERNEL);
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@ -182,14 +184,22 @@ struct mem_ctl_info *edac_mc_alloc(unsigned sz_pvt, unsigned nr_csrows,
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*/
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csi = (struct csrow_info *)(((char *)mci) + ((unsigned long)csi));
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chi = (struct rank_info *)(((char *)mci) + ((unsigned long)chi));
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dimm = (struct dimm_info *)(((char *)mci) + ((unsigned long)dimm));
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pvt = sz_pvt ? (((char *)mci) + ((unsigned long)pvt)) : NULL;
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/* setup index and various internal pointers */
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mci->mc_idx = edac_index;
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mci->csrows = csi;
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mci->dimms = dimm;
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mci->pvt_info = pvt;
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mci->nr_csrows = nr_csrows;
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/*
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* For now, assumes that a per-csrow arrangement for dimms.
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* This will be latter changed.
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*/
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dimm = mci->dimms;
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for (row = 0; row < nr_csrows; row++) {
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csrow = &csi[row];
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csrow->csrow_idx = row;
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@ -202,6 +212,12 @@ struct mem_ctl_info *edac_mc_alloc(unsigned sz_pvt, unsigned nr_csrows,
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chan = &chp[chn];
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chan->chan_idx = chn;
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chan->csrow = csrow;
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mci->csrows[row].channels[chn].dimm = dimm;
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dimm->csrow = row;
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dimm->csrow_channel = chn;
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dimm++;
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mci->nr_dimms++;
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}
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}
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@ -678,6 +694,7 @@ void edac_mc_handle_ce(struct mem_ctl_info *mci,
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int row, int channel, const char *msg)
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{
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unsigned long remapped_page;
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char *label = NULL;
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debugf3("MC%d: %s()\n", mci->mc_idx, __func__);
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@ -701,6 +718,8 @@ void edac_mc_handle_ce(struct mem_ctl_info *mci,
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return;
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}
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label = mci->csrows[row].channels[channel].dimm->label;
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if (edac_mc_get_log_ce())
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/* FIXME - put in DIMM location */
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edac_mc_printk(mci, KERN_WARNING,
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@ -708,7 +727,7 @@ void edac_mc_handle_ce(struct mem_ctl_info *mci,
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"0x%lx, row %d, channel %d, label \"%s\": %s\n",
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page_frame_number, offset_in_page,
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mci->csrows[row].grain, syndrome, row, channel,
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mci->csrows[row].channels[channel].label, msg);
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label, msg);
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mci->ce_count++;
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mci->csrows[row].ce_count++;
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@ -754,6 +773,7 @@ void edac_mc_handle_ue(struct mem_ctl_info *mci,
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char *pos = labels;
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int chan;
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int chars;
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char *label = NULL;
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debugf3("MC%d: %s()\n", mci->mc_idx, __func__);
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@ -767,15 +787,15 @@ void edac_mc_handle_ue(struct mem_ctl_info *mci,
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return;
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}
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chars = snprintf(pos, len + 1, "%s",
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mci->csrows[row].channels[0].label);
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label = mci->csrows[row].channels[0].dimm->label;
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chars = snprintf(pos, len + 1, "%s", label);
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len -= chars;
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pos += chars;
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for (chan = 1; (chan < mci->csrows[row].nr_channels) && (len > 0);
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chan++) {
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chars = snprintf(pos, len + 1, ":%s",
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mci->csrows[row].channels[chan].label);
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label = mci->csrows[row].channels[chan].dimm->label;
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chars = snprintf(pos, len + 1, ":%s", label);
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len -= chars;
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pos += chars;
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}
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@ -824,6 +844,7 @@ void edac_mc_handle_fbd_ue(struct mem_ctl_info *mci,
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char labels[len + 1];
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char *pos = labels;
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int chars;
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char *label;
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if (csrow >= mci->nr_csrows) {
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/* something is wrong */
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@ -858,12 +879,12 @@ void edac_mc_handle_fbd_ue(struct mem_ctl_info *mci,
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mci->csrows[csrow].ue_count++;
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/* Generate the DIMM labels from the specified channels */
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chars = snprintf(pos, len + 1, "%s",
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mci->csrows[csrow].channels[channela].label);
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label = mci->csrows[csrow].channels[channela].dimm->label;
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chars = snprintf(pos, len + 1, "%s", label);
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len -= chars;
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pos += chars;
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chars = snprintf(pos, len + 1, "-%s",
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mci->csrows[csrow].channels[channelb].label);
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mci->csrows[csrow].channels[channelb].dimm->label);
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if (edac_mc_get_log_ue())
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edac_mc_printk(mci, KERN_EMERG,
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@ -885,6 +906,7 @@ EXPORT_SYMBOL(edac_mc_handle_fbd_ue);
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void edac_mc_handle_fbd_ce(struct mem_ctl_info *mci,
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unsigned int csrow, unsigned int channel, char *msg)
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{
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char *label = NULL;
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/* Ensure boundary values */
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if (csrow >= mci->nr_csrows) {
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@ -904,12 +926,13 @@ void edac_mc_handle_fbd_ce(struct mem_ctl_info *mci,
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return;
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}
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label = mci->csrows[csrow].channels[channel].dimm->label;
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if (edac_mc_get_log_ce())
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/* FIXME - put in DIMM location */
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edac_mc_printk(mci, KERN_WARNING,
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"CE row %d, channel %d, label \"%s\": %s\n",
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csrow, channel,
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mci->csrows[csrow].channels[channel].label, msg);
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csrow, channel, label, msg);
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mci->ce_count++;
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mci->csrows[csrow].ce_count++;
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@ -170,11 +170,11 @@ static ssize_t channel_dimm_label_show(struct csrow_info *csrow,
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char *data, int channel)
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{
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/* if field has not been initialized, there is nothing to send */
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if (!csrow->channels[channel].label[0])
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if (!csrow->channels[channel].dimm->label[0])
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return 0;
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return snprintf(data, EDAC_MC_LABEL_LEN, "%s\n",
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csrow->channels[channel].label);
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csrow->channels[channel].dimm->label);
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}
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static ssize_t channel_dimm_label_store(struct csrow_info *csrow,
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@ -184,8 +184,8 @@ static ssize_t channel_dimm_label_store(struct csrow_info *csrow,
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ssize_t max_size = 0;
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max_size = min((ssize_t) count, (ssize_t) EDAC_MC_LABEL_LEN - 1);
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strncpy(csrow->channels[channel].label, data, max_size);
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csrow->channels[channel].label[max_size] = '\0';
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strncpy(csrow->channels[channel].dimm->label, data, max_size);
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csrow->channels[channel].dimm->label[max_size] = '\0';
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return max_size;
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}
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@ -952,9 +952,8 @@ int edac_create_sysfs_mci_device(struct mem_ctl_info *mci)
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/* CSROW error: backout what has already been registered, */
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fail1:
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for (i--; i >= 0; i--) {
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if (csrow->nr_pages > 0) {
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if (mci->csrows[i].nr_pages > 0)
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kobject_put(&mci->csrows[i].kobj);
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}
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}
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/* remove the mci instance's attributes, if any */
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@ -433,7 +433,7 @@ static void i5100_handle_ce(struct mem_ctl_info *mci,
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"CE chan %d, bank %u, rank %u, syndrome 0x%lx, "
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"cas %u, ras %u, csrow %u, label \"%s\": %s\n",
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chan, bank, rank, syndrome, cas, ras,
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csrow, mci->csrows[csrow].channels[0].label, msg);
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csrow, mci->csrows[csrow].channels[0].dimm->label, msg);
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mci->ce_count++;
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mci->csrows[csrow].ce_count++;
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@ -455,7 +455,7 @@ static void i5100_handle_ue(struct mem_ctl_info *mci,
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"UE chan %d, bank %u, rank %u, syndrome 0x%lx, "
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"cas %u, ras %u, csrow %u, label \"%s\": %s\n",
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chan, bank, rank, syndrome, cas, ras,
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csrow, mci->csrows[csrow].channels[0].label, msg);
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csrow, mci->csrows[csrow].channels[0].dimm->label, msg);
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mci->ue_count++;
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mci->csrows[csrow].ue_count++;
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@ -868,8 +868,8 @@ static void __devinit i5100_init_csrows(struct mem_ctl_info *mci)
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mci->csrows[i].channels[0].chan_idx = 0;
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mci->csrows[i].channels[0].ce_count = 0;
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mci->csrows[i].channels[0].csrow = mci->csrows + i;
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snprintf(mci->csrows[i].channels[0].label,
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sizeof(mci->csrows[i].channels[0].label),
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snprintf(mci->csrows[i].channels[0].dimm->label,
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sizeof(mci->csrows[i].channels[0].dimm->label),
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"DIMM%u", i5100_rank_to_slot(mci, chan, rank));
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total_pages += npages;
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@ -746,8 +746,8 @@ static int get_dimm_config(const struct mem_ctl_info *mci)
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csr->edac_mode = mode;
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csr->mtype = mtype;
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snprintf(csr->channels[0].label,
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sizeof(csr->channels[0].label),
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snprintf(csr->channels[0].dimm->label,
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sizeof(csr->channels[0].dimm->label),
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"CPU#%uChannel#%u_DIMM#%u",
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pvt->i7core_dev->socket, i, j);
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* [0-3] for dual-channel; i.e. csrow->nr_channels = 2
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*/
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for (chan = 0; chan < csrow->nr_channels; chan++)
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strncpy(csrow->channels[chan].label,
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strncpy(csrow->channels[chan].dimm->label,
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labels[(index >> 1) + (chan * 2)],
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EDAC_MC_LABEL_LEN);
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@ -651,8 +651,8 @@ static int get_dimm_config(const struct mem_ctl_info *mci)
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csr->channels[0].chan_idx = i;
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csr->channels[0].ce_count = 0;
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pvt->csrow_map[i][j] = csrow;
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snprintf(csr->channels[0].label,
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sizeof(csr->channels[0].label),
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snprintf(csr->channels[0].dimm->label,
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sizeof(csr->channels[0].dimm->label),
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"CPU_SrcID#%u_Channel#%u_DIMM#%u",
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pvt->sbridge_dev->source_id, i, j);
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last_page += npages;
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@ -312,23 +312,34 @@ enum scrub_type {
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* PS - I enjoyed writing all that about as much as you enjoyed reading it.
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*/
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/* FIXME: add a per-dimm ce error count */
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struct dimm_info {
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char label[EDAC_MC_LABEL_LEN + 1]; /* DIMM label on motherboard */
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unsigned memory_controller;
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unsigned csrow;
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unsigned csrow_channel;
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};
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/**
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* struct rank_info - contains the information for one DIMM rank
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*
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* @chan_idx: channel number where the rank is (typically, 0 or 1)
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* @ce_count: number of correctable errors for this rank
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* @label: DIMM label. Different ranks for the same DIMM should be
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* filled, on userspace, with the same label.
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* FIXME: The core currently won't enforce it.
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* @csrow: A pointer to the chip select row structure (the parent
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* structure). The location of the rank is given by
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* the (csrow->csrow_idx, chan_idx) vector.
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* @dimm: A pointer to the DIMM structure, where the DIMM label
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* information is stored.
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*
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* FIXME: Currently, the EDAC core model will assume one DIMM per rank.
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* This is a bad assumption, but it makes this patch easier. Later
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* patches in this series will fix this issue.
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*/
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struct rank_info {
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int chan_idx;
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u32 ce_count;
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char label[EDAC_MC_LABEL_LEN + 1];
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struct csrow_info *csrow; /* the parent */
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struct csrow_info *csrow;
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struct dimm_info *dimm;
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};
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struct csrow_info {
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@ -428,6 +439,13 @@ struct mem_ctl_info {
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int mc_idx;
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int nr_csrows;
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struct csrow_info *csrows;
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/*
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* DIMM info. Will eventually remove the entire csrows_info some day
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*/
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unsigned nr_dimms;
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struct dimm_info *dimms;
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/*
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* FIXME - what about controllers on other busses? - IDs must be
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* unique. dev pointer should be sufficiently unique, but
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