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arm64: dts: amlogic: add libretech cottonwood support
Add support for the Libretech cottonwood board family. These 2 boards are based on the same PCB, with an RPi B form factor. The "Alta" board uses an a311d while the "Solitude" variant uses an s905d3. Co-developed-by: Da Xue <da.xue@libretech.co> Signed-off-by: Da Xue <da.xue@libretech.co> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20231006103500.2015183-3-jbrunet@baylibre.com [narmstrong: squashed blue/green led inversion fix] Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
This commit is contained in:
Jerome Brunet
Neil Armstrong
parent
7eb73b8abd
commit
a702d4f016
@ -18,6 +18,7 @@ dtb-$(CONFIG_ARCH_MESON) += meson-g12b-bananapi-cm4-cm4io.dtb
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dtb-$(CONFIG_ARCH_MESON) += meson-g12b-gsking-x.dtb
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dtb-$(CONFIG_ARCH_MESON) += meson-g12b-gtking-pro.dtb
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dtb-$(CONFIG_ARCH_MESON) += meson-g12b-gtking.dtb
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dtb-$(CONFIG_ARCH_MESON) += meson-g12b-a311d-libretech-cc.dtb
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dtb-$(CONFIG_ARCH_MESON) += meson-g12b-odroid-go-ultra.dtb
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dtb-$(CONFIG_ARCH_MESON) += meson-g12b-odroid-n2-plus.dtb
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dtb-$(CONFIG_ARCH_MESON) += meson-g12b-odroid-n2.dtb
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@ -73,6 +74,7 @@ dtb-$(CONFIG_ARCH_MESON) += meson-sm1-bananapi-m2-pro.dtb
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dtb-$(CONFIG_ARCH_MESON) += meson-sm1-bananapi-m5.dtb
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dtb-$(CONFIG_ARCH_MESON) += meson-sm1-h96-max.dtb
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dtb-$(CONFIG_ARCH_MESON) += meson-sm1-khadas-vim3l.dtb
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dtb-$(CONFIG_ARCH_MESON) += meson-sm1-s905d3-libretech-cc.dtb
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dtb-$(CONFIG_ARCH_MESON) += meson-sm1-odroid-c4.dtb
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dtb-$(CONFIG_ARCH_MESON) += meson-sm1-odroid-hc4.dtb
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dtb-$(CONFIG_ARCH_MESON) += meson-sm1-sei610.dtb
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121
arch/arm64/boot/dts/amlogic/meson-g12b-a311d-libretech-cc.dts
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121
arch/arm64/boot/dts/amlogic/meson-g12b-a311d-libretech-cc.dts
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@ -0,0 +1,121 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2023 BayLibre, SAS.
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* Author: Jerome Brunet <jbrunet@baylibre.com>
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*/
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/dts-v1/;
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#include <dt-bindings/clock/g12a-clkc.h>
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#include "meson-g12b-a311d.dtsi"
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#include "meson-libretech-cottonwood.dtsi"
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/ {
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compatible = "libretech,aml-a311d-cc", "amlogic,a311d", "amlogic,g12b";
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model = "Libre Computer AML-A311D-CC Alta";
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vddcpu_a: regulator-vddcpu-a {
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compatible = "pwm-regulator";
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regulator-name = "VDDCPU_A";
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regulator-min-microvolt = <730000>;
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regulator-max-microvolt = <1011000>;
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regulator-boot-on;
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regulator-always-on;
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pwm-supply = <&dc_in>;
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pwms = <&pwm_ab 0 1250 0>;
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pwm-dutycycle-range = <100 0>;
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};
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sound {
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model = "LC-ALTA";
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audio-routing = "TDMOUT_A IN 0", "FRDDR_A OUT 0",
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"TDMOUT_A IN 1", "FRDDR_B OUT 0",
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"TDMOUT_A IN 2", "FRDDR_C OUT 0",
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"TDM_A Playback", "TDMOUT_A OUT",
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"TDMOUT_B IN 0", "FRDDR_A OUT 1",
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"TDMOUT_B IN 1", "FRDDR_B OUT 1",
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"TDMOUT_B IN 2", "FRDDR_C OUT 1",
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"TDM_B Playback", "TDMOUT_B OUT",
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"TDMOUT_C IN 0", "FRDDR_A OUT 2",
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"TDMOUT_C IN 1", "FRDDR_B OUT 2",
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"TDMOUT_C IN 2", "FRDDR_C OUT 2",
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"TDM_C Playback", "TDMOUT_C OUT",
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"TDMIN_A IN 0", "TDM_A Capture",
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"TDMIN_B IN 0", "TDM_A Capture",
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"TDMIN_C IN 0", "TDM_A Capture",
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"TDMIN_A IN 3", "TDM_A Loopback",
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"TDMIN_B IN 3", "TDM_A Loopback",
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"TDMIN_C IN 3", "TDM_A Loopback",
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"TDMIN_A IN 1", "TDM_B Capture",
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"TDMIN_B IN 1", "TDM_B Capture",
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"TDMIN_C IN 1", "TDM_B Capture",
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"TDMIN_A IN 4", "TDM_B Loopback",
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"TDMIN_B IN 4", "TDM_B Loopback",
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"TDMIN_C IN 4", "TDM_B Loopback",
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"TDMIN_A IN 2", "TDM_C Capture",
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"TDMIN_B IN 2", "TDM_C Capture",
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"TDMIN_C IN 2", "TDM_C Capture",
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"TDMIN_A IN 5", "TDM_C Loopback",
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"TDMIN_B IN 5", "TDM_C Loopback",
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"TDMIN_C IN 5", "TDM_C Loopback",
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"TODDR_A IN 0", "TDMIN_A OUT",
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"TODDR_B IN 0", "TDMIN_A OUT",
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"TODDR_C IN 0", "TDMIN_A OUT",
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"TODDR_A IN 1", "TDMIN_B OUT",
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"TODDR_B IN 1", "TDMIN_B OUT",
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"TODDR_C IN 1", "TDMIN_B OUT",
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"TODDR_A IN 2", "TDMIN_C OUT",
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"TODDR_B IN 2", "TDMIN_C OUT",
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"TODDR_C IN 2", "TDMIN_C OUT",
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"Lineout", "ACODEC LOLP",
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"Lineout", "ACODEC LORP";
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};
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};
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&cpu0 {
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cpu-supply = <&vddcpu_b>;
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operating-points-v2 = <&cpu_opp_table_0>;
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clocks = <&clkc CLKID_CPU_CLK>;
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clock-latency = <50000>;
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};
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&cpu1 {
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cpu-supply = <&vddcpu_b>;
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operating-points-v2 = <&cpu_opp_table_0>;
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clocks = <&clkc CLKID_CPU_CLK>;
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clock-latency = <50000>;
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};
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&cpu100 {
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cpu-supply = <&vddcpu_a>;
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operating-points-v2 = <&cpub_opp_table_1>;
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clocks = <&clkc CLKID_CPUB_CLK>;
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clock-latency = <50000>;
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};
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&cpu101 {
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cpu-supply = <&vddcpu_a>;
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operating-points-v2 = <&cpub_opp_table_1>;
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clocks = <&clkc CLKID_CPUB_CLK>;
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clock-latency = <50000>;
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};
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&cpu102 {
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cpu-supply = <&vddcpu_a>;
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operating-points-v2 = <&cpub_opp_table_1>;
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clocks = <&clkc CLKID_CPUB_CLK>;
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clock-latency = <50000>;
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};
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&cpu103 {
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cpu-supply = <&vddcpu_a>;
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operating-points-v2 = <&cpub_opp_table_1>;
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clocks = <&clkc CLKID_CPUB_CLK>;
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clock-latency = <50000>;
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};
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&pwm_ab {
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pinctrl-0 = <&pwm_a_e_pins>, <&pwm_b_x7_pins>;
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clocks = <&xtal>, <&xtal>;
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clock-names = "clkin0", "clkin1";
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};
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614
arch/arm64/boot/dts/amlogic/meson-libretech-cottonwood.dtsi
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614
arch/arm64/boot/dts/amlogic/meson-libretech-cottonwood.dtsi
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@ -0,0 +1,614 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2023 BayLibre, SAS.
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* Author: Jerome Brunet <jbrunet@baylibre.com>
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*/
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#include <dt-bindings/clock/g12a-clkc.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/leds/common.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/gpio/meson-g12a-gpio.h>
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#include <dt-bindings/sound/meson-g12a-toacodec.h>
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#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
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/ {
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aliases {
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serial0 = &uart_AO;
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ethernet0 = ðmac;
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spi0 = &spifc;
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};
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memory@0 {
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device_type = "memory";
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reg = <0x0 0x0 0x0 0x80000000>;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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dioo2133: audio-amplifier-0 {
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compatible = "simple-audio-amplifier";
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enable-gpios = <&gpio GPIOX_0 GPIO_ACTIVE_HIGH>;
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VCC-supply = <&vcc_5v>;
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sound-name-prefix = "10U2";
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};
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/* TOFIX: handle CVBS_DET on SARADC channel 0 */
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cvbs-connector {
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compatible = "composite-video-connector";
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port {
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cvbs_connector_in: endpoint {
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remote-endpoint = <&cvbs_vdac_out>;
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};
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};
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};
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emmc_pwrseq: emmc-pwrseq {
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compatible = "mmc-pwrseq-emmc";
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reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
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};
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hdmi-connector {
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compatible = "hdmi-connector";
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type = "a";
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port {
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hdmi_connector_in: endpoint {
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remote-endpoint = <&hdmi_tx_tmds_out>;
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};
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};
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};
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led-blue {
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compatible = "pwm-leds";
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led {
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color = <LED_COLOR_ID_BLUE>;
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function = LED_FUNCTION_ACTIVITY;
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linux,default-trigger = "heartbeat";
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max-brightness = <255>;
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pwms = <&pwm_ab 1 1250 0>;
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active-low;
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};
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};
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led-green {
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compatible = "pwm-leds";
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led {
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color = <LED_COLOR_ID_GREEN>;
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function = LED_FUNCTION_STATUS;
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linux,default-trigger = "default-on";
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max-brightness = <255>;
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pwms = <&pwm_cd 1 1250 0>;
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active-low;
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};
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};
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led-orange {
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compatible = "gpio-leds";
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led {
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color = <LED_COLOR_ID_AMBER>;
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function = LED_FUNCTION_STANDBY;
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gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
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panic-indicator;
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};
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};
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dc_in: regulator-dc-in {
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compatible = "regulator-fixed";
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regulator-name = "5V_IN";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-always-on;
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};
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flash_1v8: regulator-flash-1v8 {
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compatible = "regulator-fixed";
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regulator-name = "FLASH_1V8";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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vin-supply = <&vcc_3v3>;
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};
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vcc_card: regulator-vcc-card {
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compatible = "regulator-fixed";
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regulator-name = "VCC_CARD";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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vin-supply = <&vddao_3v3>;
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gpio = <&gpio GPIOX_2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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enable-active-high;
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gpio-open-drain;
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};
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vcc_3v3: regulator-vcc-3v3 {
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compatible = "regulator-fixed";
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regulator-name = "VCC_3V3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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vin-supply = <&vddao_3v3>;
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/* FIXME: controlled by TEST_N */
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};
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vcc_5v: regulator-vcc-5v {
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compatible = "regulator-fixed";
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regulator-name = "VCC_5V";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-always-on;
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vin-supply = <&dc_in>;
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gpio = <&gpio GPIOH_8 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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enable-active-high;
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gpio-open-drain;
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};
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vddao_3v3: regulator-vddao_3v3 {
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compatible = "regulator-fixed";
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regulator-name = "VDDAO_3V3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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vin-supply = <&dc_in>;
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};
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vddcpu_b: regulator-vddcpu-b {
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compatible = "pwm-regulator";
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regulator-name = "VDDCPU_B";
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regulator-min-microvolt = <730000>;
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regulator-max-microvolt = <1011000>;
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regulator-boot-on;
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regulator-always-on;
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pwm-supply = <&dc_in>;
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pwms = <&pwm_AO_cd 1 1250 0>;
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pwm-dutycycle-range = <100 0>;
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};
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vddio_ao18: regulator-vddio_ao18 {
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compatible = "regulator-fixed";
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regulator-name = "VDDIO_AO18";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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vin-supply = <&vddao_3v3>;
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};
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vddio_c: regulator-vddio_c {
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compatible = "regulator-gpio";
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regulator-name = "VDDIO_C";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-settling-time-up-us = <200>;
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regulator-settling-time-down-us = <50000>;
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vin-supply = <&vddao_3v3>;
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gpios = <&gpio GPIOX_4 GPIO_ACTIVE_HIGH>;
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states = <3300000 0>,
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<1800000 1>;
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};
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sound {
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compatible = "amlogic,axg-sound-card";
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audio-widgets = "Line", "Lineout";
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audio-aux-devs = <&tdmout_a>, <&tdmout_b>, <&tdmout_c>,
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<&tdmin_a>, <&tdmin_b>, <&tdmin_c>,
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<&dioo2133>;
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assigned-clocks = <&clkc CLKID_MPLL2>,
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<&clkc CLKID_MPLL0>,
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<&clkc CLKID_MPLL1>;
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assigned-clock-parents = <0>, <0>, <0>;
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assigned-clock-rates = <294912000>,
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<270950400>,
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<393216000>;
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dai-link-0 {
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sound-dai = <&frddr_a>;
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};
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dai-link-1 {
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sound-dai = <&frddr_b>;
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};
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dai-link-2 {
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sound-dai = <&frddr_c>;
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};
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dai-link-3 {
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sound-dai = <&toddr_a>;
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};
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dai-link-4 {
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sound-dai = <&toddr_b>;
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};
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dai-link-5 {
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sound-dai = <&toddr_c>;
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};
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/*
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* Audio setup: The 40 pins header provides access to 2 TDMs,
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* SPDIF In/Out and PDM inputs.
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* - TDM A: 2 lanes
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* D0: 40/X9
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* D1: 38/X8
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* BCLK: 12/X11
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* FS: 35/X10
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* - TDM B: 4 lanes
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* D0: 37/A3
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* D1: 16/A4
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* D2: 18/A5 or 7/AO6
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* D3: 22/A6 or 21/H5
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* BCLK: 29/A1 or 8/AO8
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* FS: 31/A2 or 11/AO7
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* - 2 Master Clocks:
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* MCLK0: 15/A0 or 10/AO9
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* MCLK1: 33/X15
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* - SPDIF:
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* OUT: 32/A11
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* IN: 21/H5
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* - PDM Input:
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* DO: 13/A8
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* D1: 26/A9
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* D2: 22/A6
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* D3: 18/A5
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* DCLK: 36/A7
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*
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* TDM C is not usable on the 40 pins connector so it is
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* setup for the HDMI 4 lanes i2s.
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*
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* No pinctrl is enabled by default to preserve the
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* genericity of the 40 pins header. Many configurations are
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* possible based on the desired use case. Please adjust TDM
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* masks, clock setups and pinctrl accordingly.
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*/
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dai-link-6 {
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sound-dai = <&tdmif_a>;
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||||
dai-format = "dsp_a";
|
||||
dai-tdm-slot-tx-mask-0 = <1 1>;
|
||||
mclk-fs = <256>;
|
||||
|
||||
codec-0 {
|
||||
sound-dai = <&tohdmitx TOHDMITX_I2S_IN_A>;
|
||||
};
|
||||
|
||||
codec-1 {
|
||||
sound-dai = <&toacodec TOACODEC_IN_A>;
|
||||
};
|
||||
};
|
||||
|
||||
dai-link-7 {
|
||||
sound-dai = <&tdmif_b>;
|
||||
dai-format = "i2s";
|
||||
dai-tdm-slot-tx-mask-0 = <1 1>;
|
||||
dai-tdm-slot-rx-mask-1 = <1 1>;
|
||||
mclk-fs = <256>;
|
||||
|
||||
codec-0 {
|
||||
sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
|
||||
};
|
||||
|
||||
codec-1 {
|
||||
sound-dai = <&toacodec TOACODEC_IN_B>;
|
||||
};
|
||||
};
|
||||
|
||||
dai-link-8 {
|
||||
sound-dai = <&tdmif_c>;
|
||||
dai-format = "i2s";
|
||||
dai-tdm-slot-tx-mask-0 = <1 1>;
|
||||
dai-tdm-slot-tx-mask-1 = <1 1>;
|
||||
dai-tdm-slot-tx-mask-2 = <1 1>;
|
||||
dai-tdm-slot-tx-mask-3 = <1 1>;
|
||||
mclk-fs = <256>;
|
||||
|
||||
codec-0 {
|
||||
sound-dai = <&tohdmitx TOHDMITX_I2S_IN_C>;
|
||||
};
|
||||
|
||||
codec-1 {
|
||||
sound-dai = <&toacodec TOACODEC_IN_C>;
|
||||
};
|
||||
};
|
||||
|
||||
dai-link-9 {
|
||||
sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
|
||||
|
||||
codec {
|
||||
sound-dai = <&hdmi_tx>;
|
||||
};
|
||||
};
|
||||
|
||||
dai-link-10 {
|
||||
sound-dai = <&toacodec TOACODEC_OUT>;
|
||||
|
||||
codec {
|
||||
sound-dai = <&acodec>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&acodec {
|
||||
status = "okay";
|
||||
AVDD-supply = <&vddio_ao18>;
|
||||
};
|
||||
|
||||
&arb {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cecb_AO {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&cec_ao_b_h_pins>;
|
||||
pinctrl-names = "default";
|
||||
hdmi-phandle = <&hdmi_tx>;
|
||||
};
|
||||
|
||||
&clkc_audio {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cvbs_vdac_port {
|
||||
cvbs_vdac_out: endpoint {
|
||||
remote-endpoint = <&cvbs_connector_in>;
|
||||
};
|
||||
};
|
||||
|
||||
&dwc3 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
hub: hub@1 {
|
||||
compatible = "usb5e3,626";
|
||||
reg = <1>;
|
||||
reset-gpios = <&gpio GPIOC_7 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>;
|
||||
vdd-supply = <&vcc_5v>;
|
||||
};
|
||||
};
|
||||
|
||||
ðmac {
|
||||
pinctrl-0 = <ð_pins>, <ð_rgmii_pins>, <ð_phy_irq_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
phy-mode = "rgmii";
|
||||
phy-handle = <&external_phy>;
|
||||
amlogic,tx-delay-ns = <2>;
|
||||
};
|
||||
|
||||
&ext_mdio {
|
||||
external_phy: ethernet-phy@0 {
|
||||
/* Realtek RTL8211F (0x001cc916) */
|
||||
reg = <0>;
|
||||
max-speed = <1000>;
|
||||
|
||||
reset-assert-us = <100000>;
|
||||
reset-deassert-us = <100000>;
|
||||
reset-gpios = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>;
|
||||
|
||||
interrupt-parent = <&gpio_intc>;
|
||||
/* MAC_INTR on GPIOZ_14 */
|
||||
interrupts = <26 IRQ_TYPE_LEVEL_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
&frddr_a {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&frddr_b {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&frddr_c {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&hdmi_tx {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>;
|
||||
pinctrl-names = "default";
|
||||
hdmi-supply = <&vcc_5v>;
|
||||
};
|
||||
|
||||
&hdmi_tx_tmds_port {
|
||||
hdmi_tx_tmds_out: endpoint {
|
||||
remote-endpoint = <&hdmi_connector_in>;
|
||||
};
|
||||
};
|
||||
|
||||
&ir {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&remote_input_ao_pins>;
|
||||
pinctrl-names = "default";
|
||||
};
|
||||
|
||||
&periphs_pinctrl {
|
||||
spi_cs_disable_pins: spi-cs-disable {
|
||||
mux {
|
||||
groups = "BOOT_14";
|
||||
function = "gpio_periphs";
|
||||
bias-disable;
|
||||
output-high;
|
||||
};
|
||||
};
|
||||
|
||||
eth_phy_irq_pins: eth-phy-irq {
|
||||
mux {
|
||||
groups = "GPIOZ_14";
|
||||
function = "gpio_periphs";
|
||||
bias-pull-up;
|
||||
output-disable;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pwm_AO_cd {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&pwm_ao_d_e_pins>;
|
||||
pinctrl-names = "default";
|
||||
clocks = <&xtal>;
|
||||
clock-names = "clkin1";
|
||||
};
|
||||
|
||||
&pwm_ab {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&pwm_b_x7_pins>;
|
||||
pinctrl-names = "default";
|
||||
clocks = <&xtal>;
|
||||
clock-names = "clkin1";
|
||||
};
|
||||
|
||||
&pwm_cd {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&pwm_d_x3_pins>;
|
||||
pinctrl-names = "default";
|
||||
clocks = <&xtal>;
|
||||
clock-names = "clkin1";
|
||||
};
|
||||
|
||||
&saradc {
|
||||
status = "okay";
|
||||
vref-supply = <&vddio_ao18>;
|
||||
};
|
||||
|
||||
/* SD card */
|
||||
&sd_emmc_b {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&sdcard_c_pins>;
|
||||
pinctrl-1 = <&sdcard_clk_gate_c_pins>;
|
||||
pinctrl-names = "default", "clk-gate";
|
||||
|
||||
bus-width = <4>;
|
||||
cap-sd-highspeed;
|
||||
sd-uhs-sdr12;
|
||||
sd-uhs-sdr25;
|
||||
sd-uhs-sdr50;
|
||||
sd-uhs-sdr104;
|
||||
max-frequency = <200000000>;
|
||||
disable-wp;
|
||||
|
||||
cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
|
||||
vmmc-supply = <&vcc_card>;
|
||||
vqmmc-supply = <&vddio_c>;
|
||||
};
|
||||
|
||||
/*
|
||||
* EMMC_D4, EMMC_D5, EMMC_D6 and EMMC_D7 pins are shared between SPI NOR CS
|
||||
* and eMMC Data 4 to 7 pins.
|
||||
* Replace emmc_data_8b_pins to emmc_data_4b_pins from sd_emmc_c pinctrl-0,
|
||||
* and change bus-width to 4 then spifc can be enabled.
|
||||
*/
|
||||
&sd_emmc_c {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>,
|
||||
<&spi_cs_disable_pins>;
|
||||
pinctrl-1 = <&emmc_clk_gate_pins>;
|
||||
pinctrl-names = "default", "clk-gate";
|
||||
|
||||
bus-width = <8>;
|
||||
cap-mmc-highspeed;
|
||||
mmc-hs200-1_8v;
|
||||
max-frequency = <200000000>;
|
||||
disable-wp;
|
||||
|
||||
mmc-pwrseq = <&emmc_pwrseq>;
|
||||
vmmc-supply = <&vcc_3v3>;
|
||||
vqmmc-supply = <&flash_1v8>;
|
||||
};
|
||||
|
||||
&spifc {
|
||||
status = "disabled";
|
||||
pinctrl-0 = <&nor_pins>;
|
||||
pinctrl-names = "default";
|
||||
cs-gpios = <&gpio BOOT_14 GPIO_ACTIVE_LOW>;
|
||||
|
||||
w25lq128d: flash@0 {
|
||||
compatible = "jedec,spi-nor";
|
||||
reg = <0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
spi-max-frequency = <80000000>;
|
||||
};
|
||||
};
|
||||
|
||||
&tdmif_a {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&tdmif_b {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&tdmif_c {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&tdmin_a {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&tdmin_b {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&tdmin_c {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&tdmout_a {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&tdmout_b {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&tdmout_c {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&toacodec {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&toddr_a {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&toddr_b {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&toddr_c {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&tohdmitx {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart_AO {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&uart_ao_a_pins>;
|
||||
pinctrl-names = "default";
|
||||
};
|
||||
|
||||
&usb2_phy1 {
|
||||
phy-supply = <&dc_in>;
|
||||
};
|
||||
|
||||
&usb3_pcie_phy {
|
||||
phy-supply = <&vcc_5v>;
|
||||
};
|
||||
|
||||
&usb {
|
||||
status = "okay";
|
||||
};
|
||||
@ -0,0 +1,89 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (c) 2023 BayLibre, SAS.
|
||||
* Author: Jerome Brunet <jbrunet@baylibre.com>
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include <dt-bindings/clock/g12a-clkc.h>
|
||||
#include "meson-sm1.dtsi"
|
||||
#include "meson-libretech-cottonwood.dtsi"
|
||||
|
||||
/ {
|
||||
compatible = "libretech,aml-s905d3-cc", "amlogic,sm1";
|
||||
model = "Libre Computer AML-S905D3-CC Solitude";
|
||||
|
||||
sound {
|
||||
model = "LC-SOLITUDE";
|
||||
audio-routing = "TDMOUT_A IN 0", "FRDDR_A OUT 0",
|
||||
"TDMOUT_A IN 1", "FRDDR_B OUT 0",
|
||||
"TDMOUT_A IN 2", "FRDDR_C OUT 0",
|
||||
"TDM_A Playback", "TDMOUT_A OUT",
|
||||
"TDMOUT_B IN 0", "FRDDR_A OUT 1",
|
||||
"TDMOUT_B IN 1", "FRDDR_B OUT 1",
|
||||
"TDMOUT_B IN 2", "FRDDR_C OUT 1",
|
||||
"TDM_B Playback", "TDMOUT_B OUT",
|
||||
"TDMOUT_C IN 0", "FRDDR_A OUT 2",
|
||||
"TDMOUT_C IN 1", "FRDDR_B OUT 2",
|
||||
"TDMOUT_C IN 2", "FRDDR_C OUT 2",
|
||||
"TDM_C Playback", "TDMOUT_C OUT",
|
||||
"TDMIN_A IN 0", "TDM_A Capture",
|
||||
"TDMIN_B IN 0", "TDM_A Capture",
|
||||
"TDMIN_C IN 0", "TDM_A Capture",
|
||||
"TDMIN_A IN 13", "TDM_A Loopback",
|
||||
"TDMIN_B IN 13", "TDM_A Loopback",
|
||||
"TDMIN_C IN 13", "TDM_A Loopback",
|
||||
"TDMIN_A IN 1", "TDM_B Capture",
|
||||
"TDMIN_B IN 1", "TDM_B Capture",
|
||||
"TDMIN_C IN 1", "TDM_B Capture",
|
||||
"TDMIN_A IN 14", "TDM_B Loopback",
|
||||
"TDMIN_B IN 14", "TDM_B Loopback",
|
||||
"TDMIN_C IN 14", "TDM_B Loopback",
|
||||
"TDMIN_A IN 2", "TDM_C Capture",
|
||||
"TDMIN_B IN 2", "TDM_C Capture",
|
||||
"TDMIN_C IN 2", "TDM_C Capture",
|
||||
"TDMIN_A IN 15", "TDM_C Loopback",
|
||||
"TDMIN_B IN 15", "TDM_C Loopback",
|
||||
"TDMIN_C IN 15", "TDM_C Loopback",
|
||||
"TODDR_A IN 0", "TDMIN_A OUT",
|
||||
"TODDR_B IN 0", "TDMIN_A OUT",
|
||||
"TODDR_C IN 0", "TDMIN_A OUT",
|
||||
"TODDR_A IN 1", "TDMIN_B OUT",
|
||||
"TODDR_B IN 1", "TDMIN_B OUT",
|
||||
"TODDR_C IN 1", "TDMIN_B OUT",
|
||||
"TODDR_A IN 2", "TDMIN_C OUT",
|
||||
"TODDR_B IN 2", "TDMIN_C OUT",
|
||||
"TODDR_C IN 2", "TDMIN_C OUT",
|
||||
"Lineout", "ACODEC LOLP",
|
||||
"Lineout", "ACODEC LORP";
|
||||
};
|
||||
};
|
||||
|
||||
&cpu0 {
|
||||
cpu-supply = <&vddcpu_b>;
|
||||
operating-points-v2 = <&cpu_opp_table>;
|
||||
clocks = <&clkc CLKID_CPU_CLK>;
|
||||
clock-latency = <50000>;
|
||||
};
|
||||
|
||||
&cpu1 {
|
||||
cpu-supply = <&vddcpu_b>;
|
||||
operating-points-v2 = <&cpu_opp_table>;
|
||||
clocks = <&clkc CLKID_CPU1_CLK>;
|
||||
clock-latency = <50000>;
|
||||
};
|
||||
|
||||
&cpu2 {
|
||||
cpu-supply = <&vddcpu_b>;
|
||||
operating-points-v2 = <&cpu_opp_table>;
|
||||
clocks = <&clkc CLKID_CPU2_CLK>;
|
||||
clock-latency = <50000>;
|
||||
};
|
||||
|
||||
&cpu3 {
|
||||
cpu-supply = <&vddcpu_b>;
|
||||
operating-points-v2 = <&cpu_opp_table>;
|
||||
clocks = <&clkc CLKID_CPU3_CLK>;
|
||||
clock-latency = <50000>;
|
||||
};
|
||||
Loading…
Reference in New Issue
Block a user