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Pin control fixes for the v5.6 kernel series:
- Fix some inverted pins in the Meson GLX driver. - Align the i.MX SC message structs causing warnings from KASan. - Balance the kref in pinctrl hogs so they are actually free:d when removing a pin control module. We haven't seen it before as people don't use modules for pin control that much, I think. - Add a missing call to pinctrl_unregister_mappings() another memory leak when using modules. - Fix the fwspec parsing in the Qualcomm driver. - Fix a syntax error in the Falcon driver. - Assign .irq_eoi conditionally in the Qualcomm driver, fixing a bug affecting elder Qualcomm platforms. -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEElDRnuGcz/wPCXQWMQRCzN7AZXXMFAl5orH8ACgkQQRCzN7AZ XXOIwA/+P8i/v3kTrw7HwAvVwWkVLCCEAz6qUYd/msoFHupGQUoXimR3I6btUQP6 b946kJwFQqsryFbY9HvEOXpwr6oyknKxomj8SsYbg/lGnAVAy84CRnt+P/l5sGQ0 LokjisC9V/FcLcIkiPWwLMBASqVEVM8JQnWWtXDn8EuVnZy2ibEMXBy3mhVOLvMV irBM0M1FxYrLaZxYJaZwWL+nLiX3UHkqeoHJEiWjQTp8sx71ScAE5st0+4meVCaS 7sCHMt8Zh5LqmMOYhOWxQMKuHjhEvEiXooItB2eWh7LREkPt0Xn5KfjAK0weNnqR vJCcQukoQJoR5KWnW6lQNDqX6eU5OQO0Bl53RZna1wIKNt5Uu319lXDVr8AcYN5n 4SIl21QBujTA5A/Jbqh6szq1dp0NbR+aWXqRA5Yu+cl+5TLUQ25zCra/sqEAIJE1 lhXl2435fKP32rDKLj8jMsNQ1Gtf5IJH/28MaKu5eTeyb0maqmD/i7C350MH1ss7 QFZtw6Loeph3LHvn+F1eZeCnEyrLDq4mulSM1fiFrfWzOTndAoyiJTcvsy6Lmrtg KiP6+qug8bIrDl/XNuRly0NhGNMn7dHBXGdaWiBiGlpoE5kguiQ/i8DCXsdwpKrH fRNogzOq7Wu6+EeRAmLG7+8fyeIMW1JCJ1Rrn0I8ne7FtAIx+RU= =QXHl -----END PGP SIGNATURE----- Merge tag 'pinctrl-v5.6-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control fixes from Linus Walleij: "Some pin control fixes for the v5.6 series. It comes down to memory leaks in the core and driver fixes. Some should have been sent earlier but they kept piling up and the world is just so full of distractions these days. - Fix some inverted pins in the Meson GLX driver. - Align the i.MX SC message structs causing warnings from KASan. - Balance the kref in pinctrl hogs so they are actually free:d when removing a pin control module. We haven't seen it before as people don't use modules for pin control that much, I think. - Add a missing call to pinctrl_unregister_mappings() another memory leak when using modules. - Fix the fwspec parsing in the Qualcomm driver. - Fix a syntax error in the Falcon driver. - Assign .irq_eoi conditionally in the Qualcomm driver, fixing a bug affecting elder Qualcomm platforms" * tag 'pinctrl-v5.6-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: pinctrl: qcom: Assign irq_eoi conditionally pinctrl: falcon: fix syntax error pinctrl: qcom: ssbi-gpio: Fix fwspec parsing bug pinctrl: madera: Add missing call to pinctrl_unregister_mappings pinctrl: core: Remove extra kref_get which blocks hogs being freed pinctrl: imx: scu: Align imx sc msg structs to 4 pinctrl: meson-gxl: fix GPIOX sdio pins
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commit
a6ff4631a6
@ -1073,13 +1073,26 @@ static int madera_pin_probe(struct platform_device *pdev)
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return ret;
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}
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platform_set_drvdata(pdev, priv);
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dev_dbg(priv->dev, "pinctrl probed ok\n");
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return 0;
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}
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static int madera_pin_remove(struct platform_device *pdev)
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{
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struct madera_pin_private *priv = platform_get_drvdata(pdev);
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if (priv->madera->pdata.gpio_configs)
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pinctrl_unregister_mappings(priv->madera->pdata.gpio_configs);
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return 0;
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}
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static struct platform_driver madera_pin_driver = {
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.probe = madera_pin_probe,
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.remove = madera_pin_remove,
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.driver = {
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.name = "madera-pinctrl",
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},
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@ -2021,7 +2021,6 @@ static int pinctrl_claim_hogs(struct pinctrl_dev *pctldev)
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return PTR_ERR(pctldev->p);
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}
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kref_get(&pctldev->p->users);
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pctldev->hog_default =
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pinctrl_lookup_state(pctldev->p, PINCTRL_STATE_DEFAULT);
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if (IS_ERR(pctldev->hog_default)) {
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@ -23,12 +23,12 @@ struct imx_sc_msg_req_pad_set {
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struct imx_sc_rpc_msg hdr;
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u32 val;
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u16 pad;
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} __packed;
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} __packed __aligned(4);
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struct imx_sc_msg_req_pad_get {
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struct imx_sc_rpc_msg hdr;
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u16 pad;
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} __packed;
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} __packed __aligned(4);
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struct imx_sc_msg_resp_pad_get {
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struct imx_sc_rpc_msg hdr;
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@ -147,8 +147,8 @@ static const unsigned int sdio_d0_pins[] = { GPIOX_0 };
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static const unsigned int sdio_d1_pins[] = { GPIOX_1 };
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static const unsigned int sdio_d2_pins[] = { GPIOX_2 };
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static const unsigned int sdio_d3_pins[] = { GPIOX_3 };
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static const unsigned int sdio_cmd_pins[] = { GPIOX_4 };
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static const unsigned int sdio_clk_pins[] = { GPIOX_5 };
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static const unsigned int sdio_clk_pins[] = { GPIOX_4 };
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static const unsigned int sdio_cmd_pins[] = { GPIOX_5 };
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static const unsigned int sdio_irq_pins[] = { GPIOX_7 };
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static const unsigned int nand_ce0_pins[] = { BOOT_8 };
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@ -451,7 +451,7 @@ static int pinctrl_falcon_probe(struct platform_device *pdev)
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falcon_info.clk[*bank] = clk_get(&ppdev->dev, NULL);
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if (IS_ERR(falcon_info.clk[*bank])) {
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dev_err(&ppdev->dev, "failed to get clock\n");
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of_node_put(np)
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of_node_put(np);
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return PTR_ERR(falcon_info.clk[*bank]);
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}
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falcon_info.membase[*bank] = devm_ioremap_resource(&pdev->dev,
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@ -1104,7 +1104,6 @@ static int msm_gpio_init(struct msm_pinctrl *pctrl)
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pctrl->irq_chip.irq_mask = msm_gpio_irq_mask;
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pctrl->irq_chip.irq_unmask = msm_gpio_irq_unmask;
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pctrl->irq_chip.irq_ack = msm_gpio_irq_ack;
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pctrl->irq_chip.irq_eoi = irq_chip_eoi_parent;
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pctrl->irq_chip.irq_set_type = msm_gpio_irq_set_type;
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pctrl->irq_chip.irq_set_wake = msm_gpio_irq_set_wake;
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pctrl->irq_chip.irq_request_resources = msm_gpio_irq_reqres;
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@ -1118,7 +1117,7 @@ static int msm_gpio_init(struct msm_pinctrl *pctrl)
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if (!chip->irq.parent_domain)
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return -EPROBE_DEFER;
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chip->irq.child_to_parent_hwirq = msm_gpio_wakeirq;
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pctrl->irq_chip.irq_eoi = irq_chip_eoi_parent;
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/*
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* Let's skip handling the GPIOs, if the parent irqchip
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* is handling the direct connect IRQ of the GPIO.
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@ -794,7 +794,7 @@ static int pm8xxx_gpio_probe(struct platform_device *pdev)
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girq->fwnode = of_node_to_fwnode(pctrl->dev->of_node);
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girq->parent_domain = parent_domain;
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girq->child_to_parent_hwirq = pm8xxx_child_to_parent_hwirq;
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girq->populate_parent_alloc_arg = gpiochip_populate_parent_fwspec_fourcell;
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girq->populate_parent_alloc_arg = gpiochip_populate_parent_fwspec_twocell;
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girq->child_offset_to_irq = pm8xxx_child_offset_to_irq;
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girq->child_irq_domain_ops.translate = pm8xxx_domain_translate;
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