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ASoC: codecs: msm*: rename to snd_soc_component_read()
We need to use snd_soc_component_read() instead of snd_soc_component_read32() This patch renames _read32() to _read() Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://lore.kernel.org/r/87h7vb4mdf.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -510,7 +510,7 @@ static void pm8916_wcd_setup_mbhc(struct pm8916_wcd_analog_priv *wcd)
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DIG_CLK_CTL_D_MBHC_CLK_EN_MASK,
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DIG_CLK_CTL_D_MBHC_CLK_EN);
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if (snd_soc_component_read32(component, CDC_A_MICB_2_EN) & CDC_A_MICB_2_EN_ENABLE)
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if (snd_soc_component_read(component, CDC_A_MICB_2_EN) & CDC_A_MICB_2_EN_ENABLE)
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micbias_enabled = true;
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pm8916_mbhc_configure_bias(wcd, micbias_enabled);
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@ -730,8 +730,8 @@ static int pm8916_wcd_analog_probe(struct snd_soc_component *component)
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snd_soc_component_init_regmap(component,
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dev_get_regmap(component->dev->parent, NULL));
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snd_soc_component_set_drvdata(component, priv);
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priv->pmic_rev = snd_soc_component_read32(component, CDC_D_REVISION1);
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priv->codec_version = snd_soc_component_read32(component, CDC_D_PERPH_SUBTYPE);
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priv->pmic_rev = snd_soc_component_read(component, CDC_D_REVISION1);
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priv->codec_version = snd_soc_component_read(component, CDC_D_PERPH_SUBTYPE);
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dev_info(component->dev, "PMIC REV: %d\t CODEC Version: %d\n",
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priv->pmic_rev, priv->codec_version);
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@ -990,7 +990,7 @@ static irqreturn_t mbhc_btn_release_irq_handler(int irq, void *arg)
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if (priv->detect_accessory_type) {
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struct snd_soc_component *component = priv->component;
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u32 val = snd_soc_component_read32(component, CDC_A_MBHC_RESULT_1);
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u32 val = snd_soc_component_read(component, CDC_A_MBHC_RESULT_1);
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/* check if its BTN0 thats released */
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if ((val != -1) && !(val & CDC_A_MBHC_RESULT_1_BTN_RESULT_MASK))
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@ -1009,7 +1009,7 @@ static irqreturn_t mbhc_btn_press_irq_handler(int irq, void *arg)
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struct snd_soc_component *component = priv->component;
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u32 btn_result;
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btn_result = snd_soc_component_read32(component, CDC_A_MBHC_RESULT_1) &
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btn_result = snd_soc_component_read(component, CDC_A_MBHC_RESULT_1) &
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CDC_A_MBHC_RESULT_1_BTN_RESULT_MASK;
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switch (btn_result) {
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@ -1046,7 +1046,7 @@ static irqreturn_t pm8916_mbhc_switch_irq_handler(int irq, void *arg)
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struct snd_soc_component *component = priv->component;
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bool ins = false;
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if (snd_soc_component_read32(component, CDC_A_MBHC_DET_CTL_1) &
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if (snd_soc_component_read(component, CDC_A_MBHC_DET_CTL_1) &
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CDC_A_MBHC_DET_CTL_MECH_DET_TYPE_MASK)
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ins = true;
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@ -1059,7 +1059,7 @@ static irqreturn_t pm8916_mbhc_switch_irq_handler(int irq, void *arg)
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if (ins) { /* hs insertion */
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bool micbias_enabled = false;
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if (snd_soc_component_read32(component, CDC_A_MICB_2_EN) &
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if (snd_soc_component_read(component, CDC_A_MICB_2_EN) &
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CDC_A_MICB_2_EN_ENABLE)
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micbias_enabled = true;
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@ -366,7 +366,7 @@ static int msm8x16_wcd_codec_set_iir_gain(struct snd_soc_dapm_widget *w,
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reg = LPASS_CDC_IIR1_GAIN_B1_CTL;
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else if (w->shift == 1)
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reg = LPASS_CDC_IIR2_GAIN_B1_CTL;
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value = snd_soc_component_read32(component, reg);
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value = snd_soc_component_read(component, reg);
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snd_soc_component_write(component, reg, value);
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break;
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default:
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@ -387,7 +387,7 @@ static uint32_t get_iir_band_coeff(struct snd_soc_component *component,
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((band_idx * BAND_MAX + coeff_idx)
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* sizeof(uint32_t)) & 0x7F);
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value |= snd_soc_component_read32(component,
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value |= snd_soc_component_read(component,
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(LPASS_CDC_IIR1_COEF_B2_CTL + 64 * iir_idx));
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snd_soc_component_write(component,
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@ -395,7 +395,7 @@ static uint32_t get_iir_band_coeff(struct snd_soc_component *component,
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((band_idx * BAND_MAX + coeff_idx)
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* sizeof(uint32_t) + 1) & 0x7F);
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value |= (snd_soc_component_read32(component,
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value |= (snd_soc_component_read(component,
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(LPASS_CDC_IIR1_COEF_B2_CTL + 64 * iir_idx)) << 8);
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snd_soc_component_write(component,
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@ -403,7 +403,7 @@ static uint32_t get_iir_band_coeff(struct snd_soc_component *component,
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((band_idx * BAND_MAX + coeff_idx)
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* sizeof(uint32_t) + 2) & 0x7F);
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value |= (snd_soc_component_read32(component,
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value |= (snd_soc_component_read(component,
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(LPASS_CDC_IIR1_COEF_B2_CTL + 64 * iir_idx)) << 16);
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snd_soc_component_write(component,
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@ -412,7 +412,7 @@ static uint32_t get_iir_band_coeff(struct snd_soc_component *component,
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* sizeof(uint32_t) + 3) & 0x7F);
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/* Mask bits top 2 bits since they are reserved */
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value |= ((snd_soc_component_read32(component,
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value |= ((snd_soc_component_read(component,
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(LPASS_CDC_IIR1_COEF_B2_CTL + 64 * iir_idx)) & 0x3f) << 24);
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return value;
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@ -584,7 +584,7 @@ static int msm8916_wcd_digital_enable_interpolator(
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/* apply the digital gain after the interpolator is enabled */
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usleep_range(10000, 10100);
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snd_soc_component_write(component, rx_gain_reg[w->shift],
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snd_soc_component_read32(component, rx_gain_reg[w->shift]));
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snd_soc_component_read(component, rx_gain_reg[w->shift]));
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break;
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case SND_SOC_DAPM_POST_PMD:
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snd_soc_component_update_bits(component, LPASS_CDC_CLK_RX_RESET_CTL,
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@ -615,7 +615,7 @@ static int msm8916_wcd_digital_enable_dec(struct snd_soc_dapm_widget *w,
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snd_soc_component_update_bits(component, tx_vol_ctl_reg,
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TX_VOL_CTL_CFG_MUTE_EN_MASK,
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TX_VOL_CTL_CFG_MUTE_EN_ENABLE);
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dec_hpf_cut_of_freq = snd_soc_component_read32(component, tx_mux_ctl_reg) &
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dec_hpf_cut_of_freq = snd_soc_component_read(component, tx_mux_ctl_reg) &
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TX_MUX_CTL_CUT_OFF_FREQ_MASK;
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dec_hpf_cut_of_freq >>= TX_MUX_CTL_CUT_OFF_FREQ_SHIFT;
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if (dec_hpf_cut_of_freq != TX_MUX_CTL_CF_NEG_3DB_150HZ) {
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@ -632,7 +632,7 @@ static int msm8916_wcd_digital_enable_dec(struct snd_soc_dapm_widget *w,
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TX_MUX_CTL_HPF_BP_SEL_NO_BYPASS);
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/* apply the digital gain after the decimator is enabled */
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snd_soc_component_write(component, tx_gain_reg[w->shift],
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snd_soc_component_read32(component, tx_gain_reg[w->shift]));
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snd_soc_component_read(component, tx_gain_reg[w->shift]));
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snd_soc_component_update_bits(component, tx_vol_ctl_reg,
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TX_VOL_CTL_CFG_MUTE_EN_MASK, 0);
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break;
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