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drm/amdgpu: use PT for VM sync on unmap
Instead of the array which is used for ID management. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
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@ -627,9 +627,14 @@ static int amdgpu_vm_update_ptes(struct amdgpu_device *adev,
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{
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uint64_t mask = AMDGPU_VM_PTE_COUNT - 1;
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uint64_t last_pte = ~0, last_dst = ~0;
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void *owner = AMDGPU_FENCE_OWNER_VM;
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unsigned count = 0;
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uint64_t addr;
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/* sync to everything on unmapping */
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if (!(flags & AMDGPU_PTE_VALID))
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owner = AMDGPU_FENCE_OWNER_UNDEFINED;
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/* walk over the address space and update the page tables */
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for (addr = start; addr < end; ) {
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uint64_t pt_idx = addr >> amdgpu_vm_block_size;
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@ -638,8 +643,7 @@ static int amdgpu_vm_update_ptes(struct amdgpu_device *adev,
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uint64_t pte;
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int r;
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amdgpu_sync_resv(adev, &ib->sync, pt->tbo.resv,
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AMDGPU_FENCE_OWNER_VM);
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amdgpu_sync_resv(adev, &ib->sync, pt->tbo.resv, owner);
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r = reservation_object_reserve_shared(pt->tbo.resv);
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if (r)
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return r;
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@ -790,17 +794,6 @@ static int amdgpu_vm_bo_update_mapping(struct amdgpu_device *adev,
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ib->length_dw = 0;
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if (!(flags & AMDGPU_PTE_VALID)) {
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unsigned i;
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for (i = 0; i < AMDGPU_MAX_RINGS; ++i) {
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struct amdgpu_fence *f = vm->ids[i].last_id_use;
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r = amdgpu_sync_fence(adev, &ib->sync, &f->base);
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if (r)
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return r;
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}
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}
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r = amdgpu_vm_update_ptes(adev, vm, ib, mapping->it.start,
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mapping->it.last + 1, addr + mapping->offset,
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flags, gtt_flags);
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