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irqchip fixes for 5.3
- Fix a couple of UAF on error paths (RZA1, GICv3 ITS) - Fix iMX GPCv2 trigger setting - Add missing of_node_put on error path in MBIGEN - Add another bunch of /* fall-through */ to silence warnings -----BEGIN PGP SIGNATURE----- iQJDBAABCgAtFiEEn9UcU+C1Yxj9lZw9I9DQutE9ekMFAl1B0ysPHG1hekBrZXJu ZWwub3JnAAoJECPQ0LrRPXpDEq0P/19TlvVhBzRBQ7xrZsh7RYGYddgHZeYxEwcJ iZaZnEwYPqrQXS7UIOyMmpdhDOE89sntgCfQWWhPqZdVMAPPAanucbcIA9vNxy+U OI9ue90Eeo5MAm7T2qp3MgEROQ21npYeTNGPHM6Rhh3twbsLX5S7rQCOZBeuY1zT l9FGOUsUgYfUgdEGAv4wZLdIakfTbwAlk+9QaryEn7leu4s/vzHIdyMmJ/RDlt/i YPWFD4XfDV8WSE0CE88oy1T4ppD8e71C6LjS+NfJsY5brUGPDvcbllCm3tFudy/9 D/4kM6yjpNIGZK23p5ux8dBTZB/9+z/PadFJc6J78cFH+IMf2Clv40GrZ50cG8MK GIDBgwGmooUU+vsmTTPeqtEn30CIyVGb1AkoZnTR/vRltsg0zaLhuqIHnhLTo5av dEeTv1sBOcPR3b4NkX4WAHd5UJrF/a3/fSdW9h95rF/xlP3fto5lhRmtI9UOqlra 1X+GJXRWoEbMvLP75PlSOQkDiG8zKko9/5JX/da5Q0Qztl/gZPFaGexL/c36DLoJ kKuHut/1TXu3xfoGPotYm8mainSHkEF1OThCOWX6sjS4m9JMYZMejjg9l1pNXfKw lZVKKygYOwOeBubsYqmVOEliFai2EggSWmq77csu5FP84M/8JNRX+69yQLO0Cwea ukYEvrvA =oXHS -----END PGP SIGNATURE----- Merge tag 'irqchip-fixes-5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/urgent Pull irqchip fixes from Marc Zyngier: A small bunch of fixes from the irqchip department: - Fix a couple of UAF on error paths (RZA1, GICv3 ITS) - Fix iMX GPCv2 trigger setting - Add missing of_node_put on error path in MBIGEN - Add another bunch of /* fall-through */ to silence warnings
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commit
a5dbba8f44
@ -3010,7 +3010,7 @@ static int its_vpe_init(struct its_vpe *vpe)
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if (!its_alloc_vpe_table(vpe_id)) {
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its_vpe_id_free(vpe_id);
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its_free_pending_table(vpe->vpt_page);
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its_free_pending_table(vpt_page);
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return -ENOMEM;
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}
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@ -771,8 +771,10 @@ static void gic_cpu_sys_reg_init(void)
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case 7:
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write_gicreg(0, ICC_AP0R3_EL1);
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write_gicreg(0, ICC_AP0R2_EL1);
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/* Fall through */
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case 6:
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write_gicreg(0, ICC_AP0R1_EL1);
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/* Fall through */
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case 5:
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case 4:
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write_gicreg(0, ICC_AP0R0_EL1);
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@ -786,8 +788,10 @@ static void gic_cpu_sys_reg_init(void)
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case 7:
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write_gicreg(0, ICC_AP1R3_EL1);
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write_gicreg(0, ICC_AP1R2_EL1);
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/* Fall through */
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case 6:
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write_gicreg(0, ICC_AP1R1_EL1);
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/* Fall through */
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case 5:
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case 4:
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write_gicreg(0, ICC_AP1R0_EL1);
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@ -131,6 +131,7 @@ static struct irq_chip gpcv2_irqchip_data_chip = {
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.irq_unmask = imx_gpcv2_irq_unmask,
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.irq_set_wake = imx_gpcv2_irq_set_wake,
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.irq_retrigger = irq_chip_retrigger_hierarchy,
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.irq_set_type = irq_chip_set_type_parent,
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#ifdef CONFIG_SMP
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.irq_set_affinity = irq_chip_set_affinity_parent,
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#endif
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@ -241,12 +241,15 @@ static int mbigen_of_create_domain(struct platform_device *pdev,
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parent = platform_bus_type.dev_root;
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child = of_platform_device_create(np, NULL, parent);
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if (!child)
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if (!child) {
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of_node_put(np);
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return -ENOMEM;
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}
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if (of_property_read_u32(child->dev.of_node, "num-pins",
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&num_pins) < 0) {
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dev_err(&pdev->dev, "No num-pins property\n");
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of_node_put(np);
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return -EINVAL;
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}
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@ -254,8 +257,10 @@ static int mbigen_of_create_domain(struct platform_device *pdev,
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mbigen_write_msg,
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&mbigen_domain_ops,
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mgn_chip);
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if (!domain)
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if (!domain) {
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of_node_put(np);
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return -ENOMEM;
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}
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}
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return 0;
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