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kvm: selftests: aarch64: fix some vgic related comments
Fix the formatting of some comments and the wording of one of them (in gicv3_access_reg). Signed-off-by: Ricardo Koller <ricarkol@google.com> Reported-by: Reiji Watanabe <reijiw@google.com> Cc: Andrew Jones <drjones@redhat.com> Reviewed-by: Andrew Jones <drjones@redhat.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20220127030858.3269036-5-ricarkol@google.com
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@ -306,7 +306,8 @@ static void guest_restore_active(struct test_args *args,
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uint32_t prio, intid, ap1r;
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int i;
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/* Set the priorities of the first (KVM_NUM_PRIOS - 1) IRQs
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/*
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* Set the priorities of the first (KVM_NUM_PRIOS - 1) IRQs
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* in descending order, so intid+1 can preempt intid.
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*/
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for (i = 0, prio = (num - 1) * 8; i < num; i++, prio -= 8) {
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@ -315,7 +316,8 @@ static void guest_restore_active(struct test_args *args,
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gic_set_priority(intid, prio);
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}
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/* In a real migration, KVM would restore all GIC state before running
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/*
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* In a real migration, KVM would restore all GIC state before running
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* guest code.
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*/
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for (i = 0; i < num; i++) {
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@ -503,7 +505,8 @@ static void guest_code(struct test_args *args)
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test_injection_failure(args, f);
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}
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/* Restore the active state of IRQs. This would happen when live
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/*
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* Restore the active state of IRQs. This would happen when live
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* migrating IRQs in the middle of being handled.
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*/
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for_each_supported_activate_fn(args, set_active_fns, f)
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@ -840,7 +843,8 @@ int main(int argc, char **argv)
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}
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}
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/* If the user just specified nr_irqs and/or gic_version, then run all
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/*
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* If the user just specified nr_irqs and/or gic_version, then run all
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* combinations.
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*/
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if (default_args) {
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@ -19,7 +19,7 @@ struct gicv3_data {
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unsigned int nr_spis;
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};
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#define sgi_base_from_redist(redist_base) (redist_base + SZ_64K)
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#define sgi_base_from_redist(redist_base) (redist_base + SZ_64K)
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#define DIST_BIT (1U << 31)
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enum gicv3_intid_range {
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@ -105,7 +105,8 @@ static void gicv3_set_eoi_split(bool split)
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{
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uint32_t val;
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/* All other fields are read-only, so no need to read CTLR first. In
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/*
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* All other fields are read-only, so no need to read CTLR first. In
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* fact, the kernel does the same.
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*/
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val = split ? (1U << 1) : 0;
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@ -160,8 +161,9 @@ static void gicv3_access_reg(uint32_t intid, uint64_t offset,
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GUEST_ASSERT(bits_per_field <= reg_bits);
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GUEST_ASSERT(!write || *val < (1U << bits_per_field));
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/* Some registers like IROUTER are 64 bit long. Those are currently not
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* supported by readl nor writel, so just asserting here until then.
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/*
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* This function does not support 64 bit accesses. Just asserting here
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* until we implement readq/writeq.
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*/
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GUEST_ASSERT(reg_bits == 32);
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@ -150,7 +150,8 @@ static void vgic_poke_irq(int gic_fd, uint32_t intid,
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attr += SZ_64K;
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}
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/* All calls will succeed, even with invalid intid's, as long as the
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/*
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* All calls will succeed, even with invalid intid's, as long as the
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* addr part of the attr is within 32 bits (checked above). An invalid
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* intid will just make the read/writes point to above the intended
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* register space (i.e., ICPENDR after ISPENDR).
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