korg/linux
0
0
Fork 0
mirror of https://mirrors.bfsu.edu.cn/git/linux.git synced 2024-11-13 23:34:05 +08:00
Code Issues Packages Projects Releases Wiki Activity

PM / devfreq: rk3399_dmc: Use bitfield macro definitions for ODT_PD

Browse Source 
We're going to add new usages, and it's cleaner to work with macros
instead of comments and magic numbers.

Signed-off-by: Brian Norris <briannorris@chromium.org>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
This commit is contained in:
Brian Norris 2022-03-08 11:08:54 -08:00 committed by Chanwoo Choi
parent b82acf8215
commit a5ca18540d
1 changed files with 24 additions and 19 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

43
drivers/devfreq/rk3399_dmc.c
View File

@ -5,6 +5,7 @@
*/
#include <linux/arm-smccc.h>
#include <linux/bitfield.h>
#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/devfreq.h>
@ -23,6 +24,15 @@
#include <soc/rockchip/rk3399_grf.h>
#include <soc/rockchip/rockchip_sip.h>
#define RK3399_SET_ODT_PD_0_SR_IDLE GENMASK(7, 0)
#define RK3399_SET_ODT_PD_0_SR_MC_GATE_IDLE GENMASK(15, 8)
#define RK3399_SET_ODT_PD_0_STANDBY_IDLE GENMASK(31, 16)
#define RK3399_SET_ODT_PD_1_PD_IDLE GENMASK(11, 0)
#define RK3399_SET_ODT_PD_1_SRPD_LITE_IDLE GENMASK(27, 16)
#define RK3399_SET_ODT_PD_2_ODT_ENABLE BIT(0)
struct rk3399_dmcfreq {
struct device *dev;
struct devfreq *devfreq;
@ -55,7 +65,6 @@ static int rk3399_dmcfreq_target(struct device *dev, unsigned long *freq,
unsigned long old_clk_rate = dmcfreq->rate;
unsigned long target_volt, target_rate;
struct arm_smccc_res res;
bool odt_enable = false;
int err;
opp = devfreq_recommended_opp(dev, freq, flags);
@ -72,8 +81,10 @@ static int rk3399_dmcfreq_target(struct device *dev, unsigned long *freq,
mutex_lock(&dmcfreq->lock);
if (dmcfreq->regmap_pmu) {
unsigned int odt_pd_arg2 = 0;
if (target_rate >= dmcfreq->odt_dis_freq)
odt_enable = true;
odt_pd_arg2 |= RK3399_SET_ODT_PD_2_ODT_ENABLE;
/*
* This makes a SMC call to the TF-A to set the DDR PD
@ -83,7 +94,7 @@ static int rk3399_dmcfreq_target(struct device *dev, unsigned long *freq,
arm_smccc_smc(ROCKCHIP_SIP_DRAM_FREQ, dmcfreq->odt_pd_arg0,
dmcfreq->odt_pd_arg1,
ROCKCHIP_SIP_CONFIG_DRAM_SET_ODT_PD,
odt_enable, 0, 0, 0, &res);
odt_pd_arg2, 0, 0, 0, &res);
}
/*
@ -316,23 +327,17 @@ no_pmu:
/*
* In TF-A there is a platform SIP call to set the PD (power-down)
* timings and to enable or disable the ODT (on-die termination).
* This call needs three arguments as follows:
*
* arg0:
* bit[0-7] : sr_idle
* bit[8-15] : sr_mc_gate_idle
* bit[16-31] : standby idle
* arg1:
* bit[0-11] : pd_idle
* bit[16-27] : srpd_lite_idle
* arg2:
* bit[0] : odt enable
*/
data->odt_pd_arg0 = (data->sr_idle & 0xff) |
((data->sr_mc_gate_idle & 0xff) << 8) |
((data->standby_idle & 0xffff) << 16);
data->odt_pd_arg1 = (data->pd_idle & 0xfff) |
((data->srpd_lite_idle & 0xfff) << 16);
data->odt_pd_arg0 =
FIELD_PREP(RK3399_SET_ODT_PD_0_SR_IDLE, data->sr_idle) |
FIELD_PREP(RK3399_SET_ODT_PD_0_SR_MC_GATE_IDLE,
data->sr_mc_gate_idle) |
FIELD_PREP(RK3399_SET_ODT_PD_0_STANDBY_IDLE,
data->standby_idle);
data->odt_pd_arg1 =
FIELD_PREP(RK3399_SET_ODT_PD_1_PD_IDLE, data->pd_idle) |
FIELD_PREP(RK3399_SET_ODT_PD_1_SRPD_LITE_IDLE,
data->srpd_lite_idle);
/*
* We add a devfreq driver to our parent since it has a device tree node