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perf/x86/intel/uncore: Fix the bits of the CHA extended umask for SPR
The perf stat errors out with UNC_CHA_TOR_INSERTS.IA_HIT_CXL_ACC_LOCAL
event.
$perf stat -e uncore_cha_55/event=0x35,umask=0x10c0008101/ -a -- ls
event syntax error: '..0x35,umask=0x10c0008101/'
\___ Bad event or PMU
The definition of the CHA umask is config:8-15,32-55, which is 32bit.
However, the umask of the event is bigger than 32bit.
This is an error in the original uncore spec.
Add a new umask_ext5 for the new CHA umask range.
Fixes: 949b11381f
("perf/x86/intel/uncore: Add Sapphire Rapids server CHA support")
Closes: https://lore.kernel.org/linux-perf-users/alpine.LRH.2.20.2401300733310.11354@Diego/
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Reviewed-by: Ian Rogers <irogers@google.com>
Cc: stable@vger.kernel.org
Link: https://lkml.kernel.org/r/20240708185524.1185505-1-kan.liang@linux.intel.com
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@ -462,6 +462,7 @@
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#define SPR_UBOX_DID 0x3250
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/* SPR CHA */
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#define SPR_CHA_EVENT_MASK_EXT 0xffffffff
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#define SPR_CHA_PMON_CTL_TID_EN (1 << 16)
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#define SPR_CHA_PMON_EVENT_MASK (SNBEP_PMON_RAW_EVENT_MASK | \
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SPR_CHA_PMON_CTL_TID_EN)
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@ -478,6 +479,7 @@ DEFINE_UNCORE_FORMAT_ATTR(umask_ext, umask, "config:8-15,32-43,45-55");
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DEFINE_UNCORE_FORMAT_ATTR(umask_ext2, umask, "config:8-15,32-57");
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DEFINE_UNCORE_FORMAT_ATTR(umask_ext3, umask, "config:8-15,32-39");
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DEFINE_UNCORE_FORMAT_ATTR(umask_ext4, umask, "config:8-15,32-55");
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DEFINE_UNCORE_FORMAT_ATTR(umask_ext5, umask, "config:8-15,32-63");
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DEFINE_UNCORE_FORMAT_ATTR(qor, qor, "config:16");
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DEFINE_UNCORE_FORMAT_ATTR(edge, edge, "config:18");
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DEFINE_UNCORE_FORMAT_ATTR(tid_en, tid_en, "config:19");
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@ -5959,7 +5961,7 @@ static struct intel_uncore_ops spr_uncore_chabox_ops = {
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static struct attribute *spr_uncore_cha_formats_attr[] = {
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&format_attr_event.attr,
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&format_attr_umask_ext4.attr,
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&format_attr_umask_ext5.attr,
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&format_attr_tid_en2.attr,
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&format_attr_edge.attr,
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&format_attr_inv.attr,
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@ -5995,7 +5997,7 @@ ATTRIBUTE_GROUPS(uncore_alias);
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static struct intel_uncore_type spr_uncore_chabox = {
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.name = "cha",
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.event_mask = SPR_CHA_PMON_EVENT_MASK,
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.event_mask_ext = SPR_RAW_EVENT_MASK_EXT,
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.event_mask_ext = SPR_CHA_EVENT_MASK_EXT,
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.num_shared_regs = 1,
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.constraints = skx_uncore_chabox_constraints,
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.ops = &spr_uncore_chabox_ops,
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