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powerpc: bpf: eliminate zero extension code-gen
Cc: Naveen N. Rao <naveen.n.rao@linux.ibm.com> Cc: Sandipan Das <sandipan@linux.ibm.com> Signed-off-by: Jiong Wang <jiong.wang@netronome.com> Signed-off-by: Alexei Starovoitov <ast@kernel.org>
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@ -504,6 +504,9 @@ static int bpf_jit_build_body(struct bpf_prog *fp, u32 *image,
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case BPF_ALU | BPF_LSH | BPF_X: /* (u32) dst <<= (u32) src */
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/* slw clears top 32 bits */
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PPC_SLW(dst_reg, dst_reg, src_reg);
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/* skip zero extension move, but set address map. */
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if (insn_is_zext(&insn[i + 1]))
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addrs[++i] = ctx->idx * 4;
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break;
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case BPF_ALU64 | BPF_LSH | BPF_X: /* dst <<= src; */
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PPC_SLD(dst_reg, dst_reg, src_reg);
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@ -511,6 +514,8 @@ static int bpf_jit_build_body(struct bpf_prog *fp, u32 *image,
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case BPF_ALU | BPF_LSH | BPF_K: /* (u32) dst <<== (u32) imm */
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/* with imm 0, we still need to clear top 32 bits */
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PPC_SLWI(dst_reg, dst_reg, imm);
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if (insn_is_zext(&insn[i + 1]))
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addrs[++i] = ctx->idx * 4;
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break;
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case BPF_ALU64 | BPF_LSH | BPF_K: /* dst <<== imm */
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if (imm != 0)
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@ -518,12 +523,16 @@ static int bpf_jit_build_body(struct bpf_prog *fp, u32 *image,
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break;
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case BPF_ALU | BPF_RSH | BPF_X: /* (u32) dst >>= (u32) src */
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PPC_SRW(dst_reg, dst_reg, src_reg);
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if (insn_is_zext(&insn[i + 1]))
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addrs[++i] = ctx->idx * 4;
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break;
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case BPF_ALU64 | BPF_RSH | BPF_X: /* dst >>= src */
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PPC_SRD(dst_reg, dst_reg, src_reg);
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break;
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case BPF_ALU | BPF_RSH | BPF_K: /* (u32) dst >>= (u32) imm */
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PPC_SRWI(dst_reg, dst_reg, imm);
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if (insn_is_zext(&insn[i + 1]))
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addrs[++i] = ctx->idx * 4;
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break;
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case BPF_ALU64 | BPF_RSH | BPF_K: /* dst >>= imm */
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if (imm != 0)
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@ -548,6 +557,11 @@ static int bpf_jit_build_body(struct bpf_prog *fp, u32 *image,
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*/
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case BPF_ALU | BPF_MOV | BPF_X: /* (u32) dst = src */
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case BPF_ALU64 | BPF_MOV | BPF_X: /* dst = src */
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if (imm == 1) {
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/* special mov32 for zext */
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PPC_RLWINM(dst_reg, dst_reg, 0, 0, 31);
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break;
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}
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PPC_MR(dst_reg, src_reg);
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goto bpf_alu32_trunc;
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case BPF_ALU | BPF_MOV | BPF_K: /* (u32) dst = imm */
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@ -555,11 +569,13 @@ static int bpf_jit_build_body(struct bpf_prog *fp, u32 *image,
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PPC_LI32(dst_reg, imm);
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if (imm < 0)
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goto bpf_alu32_trunc;
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else if (insn_is_zext(&insn[i + 1]))
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addrs[++i] = ctx->idx * 4;
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break;
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bpf_alu32_trunc:
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/* Truncate to 32-bits */
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if (BPF_CLASS(code) == BPF_ALU)
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if (BPF_CLASS(code) == BPF_ALU && !fp->aux->verifier_zext)
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PPC_RLWINM(dst_reg, dst_reg, 0, 0, 31);
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break;
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@ -618,10 +634,13 @@ emit_clear:
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case 16:
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/* zero-extend 16 bits into 64 bits */
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PPC_RLDICL(dst_reg, dst_reg, 0, 48);
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if (insn_is_zext(&insn[i + 1]))
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addrs[++i] = ctx->idx * 4;
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break;
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case 32:
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/* zero-extend 32 bits into 64 bits */
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PPC_RLDICL(dst_reg, dst_reg, 0, 32);
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if (!fp->aux->verifier_zext)
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/* zero-extend 32 bits into 64 bits */
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PPC_RLDICL(dst_reg, dst_reg, 0, 32);
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break;
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case 64:
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/* nop */
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@ -698,14 +717,20 @@ emit_clear:
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/* dst = *(u8 *)(ul) (src + off) */
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case BPF_LDX | BPF_MEM | BPF_B:
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PPC_LBZ(dst_reg, src_reg, off);
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if (insn_is_zext(&insn[i + 1]))
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addrs[++i] = ctx->idx * 4;
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break;
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/* dst = *(u16 *)(ul) (src + off) */
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case BPF_LDX | BPF_MEM | BPF_H:
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PPC_LHZ(dst_reg, src_reg, off);
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if (insn_is_zext(&insn[i + 1]))
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addrs[++i] = ctx->idx * 4;
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break;
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/* dst = *(u32 *)(ul) (src + off) */
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case BPF_LDX | BPF_MEM | BPF_W:
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PPC_LWZ(dst_reg, src_reg, off);
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if (insn_is_zext(&insn[i + 1]))
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addrs[++i] = ctx->idx * 4;
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break;
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/* dst = *(u64 *)(ul) (src + off) */
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case BPF_LDX | BPF_MEM | BPF_DW:
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@ -1046,6 +1071,11 @@ struct powerpc64_jit_data {
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struct codegen_context ctx;
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};
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bool bpf_jit_needs_zext(void)
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{
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return true;
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}
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struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *fp)
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{
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u32 proglen;
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