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drm/msm/dpu: squash power handle event types

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DPU power handler maintained PRE/POST versions of power
ENABLE/DISABLE events to accommodate tasks which need be
handled before/after data bus voting. But since the bus voting
API's are deprecated and removed from the driver, squash
the events and their clients respective event handlers
to handle only ENABLE/DISABLE events.

changes in v5:
	- introduced in the series

Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
[seanpaul converted #defines to BIT(x) in dpu_power_handle.h]
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
This commit is contained in:
Jeykumar Sankaran 2018-09-05 19:08:11 -07:00 committed by Rob Clark
parent ad8e5c2d77
commit a41a8ccc12
4 changed files with 15 additions and 50 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

28
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
View File

@ -1281,26 +1281,12 @@ static void dpu_crtc_handle_power_event(u32 event_type, void *arg)
trace_dpu_crtc_handle_power_event(DRMID(crtc), event_type);
switch (event_type) {
case DPU_POWER_EVENT_POST_ENABLE:
/* restore encoder; crtc will be programmed during commit */
drm_for_each_encoder(encoder, crtc->dev) {
if (encoder->crtc != crtc)
continue;
/* restore encoder; crtc will be programmed during commit */
drm_for_each_encoder(encoder, crtc->dev) {
if (encoder->crtc != crtc)
continue;
dpu_encoder_virt_restore(encoder);
}
break;
case DPU_POWER_EVENT_PRE_DISABLE:
case DPU_POWER_EVENT_POST_DISABLE:
/**
* Nothing to do. All the planes on the CRTC will be
* programmed for every frame
*/
break;
default:
DPU_DEBUG("event:%d not handled\n", event_type);
break;
dpu_encoder_virt_restore(encoder);
}
mutex_unlock(&dpu_crtc->crtc_lock);
@ -1429,9 +1415,7 @@ static void dpu_crtc_enable(struct drm_crtc *crtc,
drm_crtc_vblank_on(crtc);
dpu_crtc->power_event = dpu_power_handle_register_event(
dpu_crtc->phandle,
DPU_POWER_EVENT_POST_ENABLE | DPU_POWER_EVENT_POST_DISABLE |
DPU_POWER_EVENT_PRE_DISABLE,
dpu_crtc->phandle, DPU_POWER_EVENT_ENABLE,
dpu_crtc_handle_power_event, crtc, dpu_crtc->name);
}

8
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
View File

@ -967,8 +967,7 @@ static void dpu_kms_handle_power_event(u32 event_type, void *usr)
if (!dpu_kms)
return;
if (event_type == DPU_POWER_EVENT_POST_ENABLE)
dpu_vbif_init_memtypes(dpu_kms);
dpu_vbif_init_memtypes(dpu_kms);
}
static int dpu_kms_hw_init(struct msm_kms *kms)
@ -1155,10 +1154,9 @@ static int dpu_kms_hw_init(struct msm_kms *kms)
/*
* Handle (re)initializations during power enable
*/
dpu_kms_handle_power_event(DPU_POWER_EVENT_POST_ENABLE, dpu_kms);
dpu_kms_handle_power_event(DPU_POWER_EVENT_ENABLE, dpu_kms);
dpu_kms->power_event = dpu_power_handle_register_event(
&dpu_kms->phandle,
DPU_POWER_EVENT_POST_ENABLE,
&dpu_kms->phandle, DPU_POWER_EVENT_ENABLE,
dpu_kms_handle_power_event, dpu_kms, "kms");
pm_runtime_put_sync(&dpu_kms->pdev->dev);

15
drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.c
View File

@ -145,6 +145,7 @@ int dpu_power_resource_enable(struct dpu_power_handle *phandle,
bool changed = false;
u32 max_usecase_ndx = VOTE_INDEX_DISABLE, prev_usecase_ndx;
struct dpu_power_client *client;
u32 event_type;
if (!phandle || !pclient) {
pr_err("invalid input argument\n");
@ -181,19 +182,9 @@ int dpu_power_resource_enable(struct dpu_power_handle *phandle,
if (!changed)
goto end;
if (enable) {
dpu_power_event_trigger_locked(phandle,
DPU_POWER_EVENT_PRE_ENABLE);
dpu_power_event_trigger_locked(phandle,
DPU_POWER_EVENT_POST_ENABLE);
} else {
dpu_power_event_trigger_locked(phandle,
DPU_POWER_EVENT_PRE_DISABLE);
dpu_power_event_trigger_locked(phandle,
DPU_POWER_EVENT_POST_DISABLE);
}
event_type = enable ? DPU_POWER_EVENT_ENABLE : DPU_POWER_EVENT_DISABLE;
dpu_power_event_trigger_locked(phandle, event_type);
end:
mutex_unlock(&phandle->phandle_lock);
return 0;

14
drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.h
View File

@ -23,17 +23,9 @@
#include "dpu_io_util.h"
/* event will be triggered before power handler disable */
#define DPU_POWER_EVENT_PRE_DISABLE 0x1
/* event will be triggered after power handler disable */
#define DPU_POWER_EVENT_POST_DISABLE 0x2
/* event will be triggered before power handler enable */
#define DPU_POWER_EVENT_PRE_ENABLE 0x4
/* event will be triggered after power handler enable */
#define DPU_POWER_EVENT_POST_ENABLE 0x8
/* events will be triggered on power handler enable/disable */
#define DPU_POWER_EVENT_DISABLE BIT(0)
#define DPU_POWER_EVENT_ENABLE BIT(1)
/**
* mdss_bus_vote_type: register bus vote type