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ARM: PXA SoCs: irq_data conversion.

Browse Source 
Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
This commit is contained in:
Lennert Buytenhek 2010-11-29 11:18:26 +01:00
parent 406b005045
commit a3f4c927d3
15 changed files with 144 additions and 129 deletions
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23
arch/arm/mach-pxa/balloon3.c
View File

@ -477,25 +477,25 @@ static inline void balloon3_leds_init(void) {}
/****************************************************************************** /******************************************************************************
* FPGA IRQ * FPGA IRQ
******************************************************************************/ ******************************************************************************/
static void balloon3_mask_irq(unsigned int irq) static void balloon3_mask_irq(struct irq_data *d)
{ {
int balloon3_irq = (irq - BALLOON3_IRQ(0)); int balloon3_irq = (d->irq - BALLOON3_IRQ(0));
balloon3_irq_enabled &= ~(1 << balloon3_irq); balloon3_irq_enabled &= ~(1 << balloon3_irq);
__raw_writel(~balloon3_irq_enabled, BALLOON3_INT_CONTROL_REG); __raw_writel(~balloon3_irq_enabled, BALLOON3_INT_CONTROL_REG);
} }
static void balloon3_unmask_irq(unsigned int irq) static void balloon3_unmask_irq(struct irq_data *d)
{ {
int balloon3_irq = (irq - BALLOON3_IRQ(0)); int balloon3_irq = (d->irq - BALLOON3_IRQ(0));
balloon3_irq_enabled |= (1 << balloon3_irq); balloon3_irq_enabled |= (1 << balloon3_irq);
__raw_writel(~balloon3_irq_enabled, BALLOON3_INT_CONTROL_REG); __raw_writel(~balloon3_irq_enabled, BALLOON3_INT_CONTROL_REG);
} }
static struct irq_chip balloon3_irq_chip = { static struct irq_chip balloon3_irq_chip = {
.name = "FPGA", .name = "FPGA",
.ack = balloon3_mask_irq, .irq_ack = balloon3_mask_irq,
.mask = balloon3_mask_irq, .irq_mask = balloon3_mask_irq,
.unmask = balloon3_unmask_irq, .irq_unmask = balloon3_unmask_irq,
}; };
static void balloon3_irq_handler(unsigned int irq, struct irq_desc *desc) static void balloon3_irq_handler(unsigned int irq, struct irq_desc *desc)
@ -504,8 +504,13 @@ static void balloon3_irq_handler(unsigned int irq, struct irq_desc *desc)
balloon3_irq_enabled; balloon3_irq_enabled;
do { do {
/* clear useless edge notification */ /* clear useless edge notification */
if (desc->chip->ack) if (desc->irq_data.chip->irq_ack) {
desc->chip->ack(BALLOON3_AUX_NIRQ); struct irq_data *d;
d = irq_get_irq_data(BALLOON3_AUX_NIRQ);
desc->irq_data.chip->irq_ack(d);
}
while (pending) { while (pending) {
irq = BALLOON3_IRQ(0) + __ffs(pending); irq = BALLOON3_IRQ(0) + __ffs(pending);
generic_handle_irq(irq); generic_handle_irq(irq);

2
arch/arm/mach-pxa/cm-x2xx-pci.c
View File

@ -59,7 +59,7 @@ void __init cmx2xx_pci_adjust_zones(unsigned long *zone_size,
static void cmx2xx_it8152_irq_demux(unsigned int irq, struct irq_desc *desc) static void cmx2xx_it8152_irq_demux(unsigned int irq, struct irq_desc *desc)
{ {
/* clear our parent irq */ /* clear our parent irq */
desc->chip->ack(irq); desc->irq_data.chip->irq_ack(&desc->irq_data);
it8152_irq_demux(irq, desc); it8152_irq_demux(irq, desc);
} }

4
arch/arm/mach-pxa/generic.h
View File

@ -9,11 +9,13 @@
* published by the Free Software Foundation. * published by the Free Software Foundation.
*/ */
struct irq_data;
struct sys_timer; struct sys_timer;
extern struct sys_timer pxa_timer; extern struct sys_timer pxa_timer;
extern void __init pxa_init_irq(int irq_nr, extern void __init pxa_init_irq(int irq_nr,
int (*set_wake)(unsigned int, unsigned int)); int (*set_wake)(struct irq_data *,
unsigned int));
extern void __init pxa25x_init_irq(void); extern void __init pxa25x_init_irq(void);
#ifdef CONFIG_CPU_PXA26x #ifdef CONFIG_CPU_PXA26x
extern void __init pxa26x_init_irq(void); extern void __init pxa26x_init_irq(void);

50
arch/arm/mach-pxa/irq.c
View File

@ -53,37 +53,37 @@ static inline int cpu_has_ipr(void)
return !cpu_is_pxa25x(); return !cpu_is_pxa25x();
} }
static void pxa_mask_irq(unsigned int irq) static void pxa_mask_irq(struct irq_data *d)
{ {
void __iomem *base = get_irq_chip_data(irq); void __iomem *base = irq_data_get_irq_chip_data(d);
uint32_t icmr = __raw_readl(base + ICMR); uint32_t icmr = __raw_readl(base + ICMR);
icmr &= ~(1 << IRQ_BIT(irq)); icmr &= ~(1 << IRQ_BIT(d->irq));
__raw_writel(icmr, base + ICMR); __raw_writel(icmr, base + ICMR);
} }
static void pxa_unmask_irq(unsigned int irq) static void pxa_unmask_irq(struct irq_data *d)
{ {
void __iomem *base = get_irq_chip_data(irq); void __iomem *base = irq_data_get_irq_chip_data(d);
uint32_t icmr = __raw_readl(base + ICMR); uint32_t icmr = __raw_readl(base + ICMR);
icmr |= 1 << IRQ_BIT(irq); icmr |= 1 << IRQ_BIT(d->irq);
__raw_writel(icmr, base + ICMR); __raw_writel(icmr, base + ICMR);
} }
static struct irq_chip pxa_internal_irq_chip = { static struct irq_chip pxa_internal_irq_chip = {
.name = "SC", .name = "SC",
.ack = pxa_mask_irq, .irq_ack = pxa_mask_irq,
.mask = pxa_mask_irq, .irq_mask = pxa_mask_irq,
.unmask = pxa_unmask_irq, .irq_unmask = pxa_unmask_irq,
}; };
/* /*
* GPIO IRQs for GPIO 0 and 1 * GPIO IRQs for GPIO 0 and 1
*/ */
static int pxa_set_low_gpio_type(unsigned int irq, unsigned int type) static int pxa_set_low_gpio_type(struct irq_data *d, unsigned int type)
{ {
int gpio = irq - IRQ_GPIO0; int gpio = d->irq - IRQ_GPIO0;
if (__gpio_is_occupied(gpio)) { if (__gpio_is_occupied(gpio)) {
pr_err("%s failed: GPIO is configured\n", __func__); pr_err("%s failed: GPIO is configured\n", __func__);
@ -103,31 +103,31 @@ static int pxa_set_low_gpio_type(unsigned int irq, unsigned int type)
return 0; return 0;
} }
static void pxa_ack_low_gpio(unsigned int irq) static void pxa_ack_low_gpio(struct irq_data *d)
{ {
GEDR0 = (1 << (irq - IRQ_GPIO0)); GEDR0 = (1 << (d->irq - IRQ_GPIO0));
} }
static void pxa_mask_low_gpio(unsigned int irq) static void pxa_mask_low_gpio(struct irq_data *d)
{ {
struct irq_desc *desc = irq_to_desc(irq); struct irq_desc *desc = irq_to_desc(d->irq);
desc->chip->mask(irq); desc->irq_data.chip->irq_mask(d);
} }
static void pxa_unmask_low_gpio(unsigned int irq) static void pxa_unmask_low_gpio(struct irq_data *d)
{ {
struct irq_desc *desc = irq_to_desc(irq); struct irq_desc *desc = irq_to_desc(d->irq);
desc->chip->unmask(irq); desc->irq_data.chip->irq_unmask(d);
} }
static struct irq_chip pxa_low_gpio_chip = { static struct irq_chip pxa_low_gpio_chip = {
.name = "GPIO-l", .name = "GPIO-l",
.ack = pxa_ack_low_gpio, .irq_ack = pxa_ack_low_gpio,
.mask = pxa_mask_low_gpio, .irq_mask = pxa_mask_low_gpio,
.unmask = pxa_unmask_low_gpio, .irq_unmask = pxa_unmask_low_gpio,
.set_type = pxa_set_low_gpio_type, .irq_set_type = pxa_set_low_gpio_type,
}; };
static void __init pxa_init_low_gpio_irq(set_wake_t fn) static void __init pxa_init_low_gpio_irq(set_wake_t fn)
@ -145,7 +145,7 @@ static void __init pxa_init_low_gpio_irq(set_wake_t fn)
set_irq_flags(irq, IRQF_VALID); set_irq_flags(irq, IRQF_VALID);
} }
pxa_low_gpio_chip.set_wake = fn; pxa_low_gpio_chip.irq_set_wake = fn;
} }
static inline void __iomem *irq_base(int i) static inline void __iomem *irq_base(int i)
@ -188,7 +188,7 @@ void __init pxa_init_irq(int irq_nr, set_wake_t fn)
/* only unmasked interrupts kick us out of idle */ /* only unmasked interrupts kick us out of idle */
__raw_writel(1, irq_base(0) + ICCR); __raw_writel(1, irq_base(0) + ICCR);
pxa_internal_irq_chip.set_wake = fn; pxa_internal_irq_chip.irq_set_wake = fn;
pxa_init_low_gpio_irq(fn); pxa_init_low_gpio_irq(fn);
} }

17
arch/arm/mach-pxa/lpd270.c
View File

@ -95,9 +95,9 @@ static unsigned long lpd270_pin_config[] __initdata = {
static unsigned int lpd270_irq_enabled; static unsigned int lpd270_irq_enabled;
static void lpd270_mask_irq(unsigned int irq) static void lpd270_mask_irq(struct irq_data *d)
{ {
int lpd270_irq = irq - LPD270_IRQ(0); int lpd270_irq = d->irq - LPD270_IRQ(0);
__raw_writew(~(1 << lpd270_irq), LPD270_INT_STATUS); __raw_writew(~(1 << lpd270_irq), LPD270_INT_STATUS);
@ -105,9 +105,9 @@ static void lpd270_mask_irq(unsigned int irq)
__raw_writew(lpd270_irq_enabled, LPD270_INT_MASK); __raw_writew(lpd270_irq_enabled, LPD270_INT_MASK);
} }
static void lpd270_unmask_irq(unsigned int irq) static void lpd270_unmask_irq(struct irq_data *d)
{ {
int lpd270_irq = irq - LPD270_IRQ(0); int lpd270_irq = d->irq - LPD270_IRQ(0);
lpd270_irq_enabled |= 1 << lpd270_irq; lpd270_irq_enabled |= 1 << lpd270_irq;
__raw_writew(lpd270_irq_enabled, LPD270_INT_MASK); __raw_writew(lpd270_irq_enabled, LPD270_INT_MASK);
@ -115,9 +115,9 @@ static void lpd270_unmask_irq(unsigned int irq)
static struct irq_chip lpd270_irq_chip = { static struct irq_chip lpd270_irq_chip = {
.name = "CPLD", .name = "CPLD",
.ack = lpd270_mask_irq, .irq_ack = lpd270_mask_irq,
.mask = lpd270_mask_irq, .irq_mask = lpd270_mask_irq,
.unmask = lpd270_unmask_irq, .irq_unmask = lpd270_unmask_irq,
}; };
static void lpd270_irq_handler(unsigned int irq, struct irq_desc *desc) static void lpd270_irq_handler(unsigned int irq, struct irq_desc *desc)
@ -126,7 +126,8 @@ static void lpd270_irq_handler(unsigned int irq, struct irq_desc *desc)
pending = __raw_readw(LPD270_INT_STATUS) & lpd270_irq_enabled; pending = __raw_readw(LPD270_INT_STATUS) & lpd270_irq_enabled;
do { do {
desc->chip->ack(irq); /* clear useless edge notification */ /* clear useless edge notification */
desc->irq_data.chip->irq_ack(&desc->irq_data);
if (likely(pending)) { if (likely(pending)) {
irq = LPD270_IRQ(0) + __ffs(pending); irq = LPD270_IRQ(0) + __ffs(pending);
generic_handle_irq(irq); generic_handle_irq(irq);

17
arch/arm/mach-pxa/lubbock.c
View File

@ -122,15 +122,15 @@ EXPORT_SYMBOL(lubbock_set_misc_wr);
static unsigned long lubbock_irq_enabled; static unsigned long lubbock_irq_enabled;
static void lubbock_mask_irq(unsigned int irq) static void lubbock_mask_irq(struct irq_data *d)
{ {
int lubbock_irq = (irq - LUBBOCK_IRQ(0)); int lubbock_irq = (d->irq - LUBBOCK_IRQ(0));
LUB_IRQ_MASK_EN = (lubbock_irq_enabled &= ~(1 << lubbock_irq)); LUB_IRQ_MASK_EN = (lubbock_irq_enabled &= ~(1 << lubbock_irq));
} }
static void lubbock_unmask_irq(unsigned int irq) static void lubbock_unmask_irq(struct irq_data *d)
{ {
int lubbock_irq = (irq - LUBBOCK_IRQ(0)); int lubbock_irq = (d->irq - LUBBOCK_IRQ(0));
/* the irq can be acknowledged only if deasserted, so it's done here */ /* the irq can be acknowledged only if deasserted, so it's done here */
LUB_IRQ_SET_CLR &= ~(1 << lubbock_irq); LUB_IRQ_SET_CLR &= ~(1 << lubbock_irq);
LUB_IRQ_MASK_EN = (lubbock_irq_enabled |= (1 << lubbock_irq)); LUB_IRQ_MASK_EN = (lubbock_irq_enabled |= (1 << lubbock_irq));
@ -138,16 +138,17 @@ static void lubbock_unmask_irq(unsigned int irq)
static struct irq_chip lubbock_irq_chip = { static struct irq_chip lubbock_irq_chip = {
.name = "FPGA", .name = "FPGA",
.ack = lubbock_mask_irq, .irq_ack = lubbock_mask_irq,
.mask = lubbock_mask_irq, .irq_mask = lubbock_mask_irq,
.unmask = lubbock_unmask_irq, .irq_unmask = lubbock_unmask_irq,
}; };
static void lubbock_irq_handler(unsigned int irq, struct irq_desc *desc) static void lubbock_irq_handler(unsigned int irq, struct irq_desc *desc)
{ {
unsigned long pending = LUB_IRQ_SET_CLR & lubbock_irq_enabled; unsigned long pending = LUB_IRQ_SET_CLR & lubbock_irq_enabled;
do { do {
desc->chip->ack(irq); /* clear our parent irq */ /* clear our parent irq */
desc->irq_data.chip->irq_ack(&desc->irq_data);
if (likely(pending)) { if (likely(pending)) {
irq = LUBBOCK_IRQ(0) + __ffs(pending); irq = LUBBOCK_IRQ(0) + __ffs(pending);
generic_handle_irq(irq); generic_handle_irq(irq);

17
arch/arm/mach-pxa/mainstone.c
View File

@ -123,15 +123,15 @@ static unsigned long mainstone_pin_config[] = {
static unsigned long mainstone_irq_enabled; static unsigned long mainstone_irq_enabled;
static void mainstone_mask_irq(unsigned int irq) static void mainstone_mask_irq(struct irq_data *d)
{ {
int mainstone_irq = (irq - MAINSTONE_IRQ(0)); int mainstone_irq = (d->irq - MAINSTONE_IRQ(0));
MST_INTMSKENA = (mainstone_irq_enabled &= ~(1 << mainstone_irq)); MST_INTMSKENA = (mainstone_irq_enabled &= ~(1 << mainstone_irq));
} }
static void mainstone_unmask_irq(unsigned int irq) static void mainstone_unmask_irq(struct irq_data *d)
{ {
int mainstone_irq = (irq - MAINSTONE_IRQ(0)); int mainstone_irq = (d->irq - MAINSTONE_IRQ(0));
/* the irq can be acknowledged only if deasserted, so it's done here */ /* the irq can be acknowledged only if deasserted, so it's done here */
MST_INTSETCLR &= ~(1 << mainstone_irq); MST_INTSETCLR &= ~(1 << mainstone_irq);
MST_INTMSKENA = (mainstone_irq_enabled |= (1 << mainstone_irq)); MST_INTMSKENA = (mainstone_irq_enabled |= (1 << mainstone_irq));
@ -139,16 +139,17 @@ static void mainstone_unmask_irq(unsigned int irq)
static struct irq_chip mainstone_irq_chip = { static struct irq_chip mainstone_irq_chip = {
.name = "FPGA", .name = "FPGA",
.ack = mainstone_mask_irq, .irq_ack = mainstone_mask_irq,
.mask = mainstone_mask_irq, .irq_mask = mainstone_mask_irq,
.unmask = mainstone_unmask_irq, .irq_unmask = mainstone_unmask_irq,
}; };
static void mainstone_irq_handler(unsigned int irq, struct irq_desc *desc) static void mainstone_irq_handler(unsigned int irq, struct irq_desc *desc)
{ {
unsigned long pending = MST_INTSETCLR & mainstone_irq_enabled; unsigned long pending = MST_INTSETCLR & mainstone_irq_enabled;
do { do {
desc->chip->ack(irq); /* clear useless edge notification */ /* clear useless edge notification */
desc->irq_data.chip->irq_ack(&desc->irq_data);
if (likely(pending)) { if (likely(pending)) {
irq = MAINSTONE_IRQ(0) + __ffs(pending); irq = MAINSTONE_IRQ(0) + __ffs(pending);
generic_handle_irq(irq); generic_handle_irq(irq);

15
arch/arm/mach-pxa/pcm990-baseboard.c
View File

@ -241,23 +241,23 @@ static struct platform_device pcm990_backlight_device = {
static unsigned long pcm990_irq_enabled; static unsigned long pcm990_irq_enabled;
static void pcm990_mask_ack_irq(unsigned int irq) static void pcm990_mask_ack_irq(struct irq_data *d)
{ {
int pcm990_irq = (irq - PCM027_IRQ(0)); int pcm990_irq = (d->irq - PCM027_IRQ(0));
PCM990_INTMSKENA = (pcm990_irq_enabled &= ~(1 << pcm990_irq)); PCM990_INTMSKENA = (pcm990_irq_enabled &= ~(1 << pcm990_irq));
} }
static void pcm990_unmask_irq(unsigned int irq) static void pcm990_unmask_irq(struct irq_data *d)
{ {
int pcm990_irq = (irq - PCM027_IRQ(0)); int pcm990_irq = (d->irq - PCM027_IRQ(0));
/* the irq can be acknowledged only if deasserted, so it's done here */ /* the irq can be acknowledged only if deasserted, so it's done here */
PCM990_INTSETCLR |= 1 << pcm990_irq; PCM990_INTSETCLR |= 1 << pcm990_irq;
PCM990_INTMSKENA = (pcm990_irq_enabled |= (1 << pcm990_irq)); PCM990_INTMSKENA = (pcm990_irq_enabled |= (1 << pcm990_irq));
} }
static struct irq_chip pcm990_irq_chip = { static struct irq_chip pcm990_irq_chip = {
.mask_ack = pcm990_mask_ack_irq, .irq_mask_ack = pcm990_mask_ack_irq,
.unmask = pcm990_unmask_irq, .irq_unmask = pcm990_unmask_irq,
}; };
static void pcm990_irq_handler(unsigned int irq, struct irq_desc *desc) static void pcm990_irq_handler(unsigned int irq, struct irq_desc *desc)
@ -265,7 +265,8 @@ static void pcm990_irq_handler(unsigned int irq, struct irq_desc *desc)
unsigned long pending = (~PCM990_INTSETCLR) & pcm990_irq_enabled; unsigned long pending = (~PCM990_INTSETCLR) & pcm990_irq_enabled;
do { do {
desc->chip->ack(irq); /* clear our parent IRQ */ /* clear our parent IRQ */
desc->irq_data.chip->irq_ack(&desc->irq_data);
if (likely(pending)) { if (likely(pending)) {
irq = PCM027_IRQ(0) + __ffs(pending); irq = PCM027_IRQ(0) + __ffs(pending);
generic_handle_irq(irq); generic_handle_irq(irq);

7
arch/arm/mach-pxa/pxa25x.c
View File

@ -22,6 +22,7 @@
#include <linux/platform_device.h> #include <linux/platform_device.h>
#include <linux/suspend.h> #include <linux/suspend.h>
#include <linux/sysdev.h> #include <linux/sysdev.h>
#include <linux/irq.h>
#include <asm/mach/map.h> #include <asm/mach/map.h>
#include <mach/hardware.h> #include <mach/hardware.h>
@ -282,15 +283,15 @@ static inline void pxa25x_init_pm(void) {}
/* PXA25x: supports wakeup from GPIO0..GPIO15 and RTC alarm /* PXA25x: supports wakeup from GPIO0..GPIO15 and RTC alarm
*/ */
static int pxa25x_set_wake(unsigned int irq, unsigned int on) static int pxa25x_set_wake(struct irq_data *d, unsigned int on)
{ {
int gpio = IRQ_TO_GPIO(irq); int gpio = IRQ_TO_GPIO(d->irq);
uint32_t mask = 0; uint32_t mask = 0;
if (gpio >= 0 && gpio < 85) if (gpio >= 0 && gpio < 85)
return gpio_set_wake(gpio, on); return gpio_set_wake(gpio, on);
if (irq == IRQ_RTCAlrm) { if (d->irq == IRQ_RTCAlrm) {
mask = PWER_RTC; mask = PWER_RTC;
goto set_pwer; goto set_pwer;
} }

9
arch/arm/mach-pxa/pxa27x.c
View File

@ -18,6 +18,7 @@
#include <linux/platform_device.h> #include <linux/platform_device.h>
#include <linux/sysdev.h> #include <linux/sysdev.h>
#include <linux/io.h> #include <linux/io.h>
#include <linux/irq.h>
#include <asm/mach/map.h> #include <asm/mach/map.h>
#include <mach/hardware.h> #include <mach/hardware.h>
@ -343,18 +344,18 @@ static inline void pxa27x_init_pm(void) {}
/* PXA27x: Various gpios can issue wakeup events. This logic only /* PXA27x: Various gpios can issue wakeup events. This logic only
* handles the simple cases, not the WEMUX2 and WEMUX3 options * handles the simple cases, not the WEMUX2 and WEMUX3 options
*/ */
static int pxa27x_set_wake(unsigned int irq, unsigned int on) static int pxa27x_set_wake(struct irq_data *d, unsigned int on)
{ {
int gpio = IRQ_TO_GPIO(irq); int gpio = IRQ_TO_GPIO(d->irq);
uint32_t mask; uint32_t mask;
if (gpio >= 0 && gpio < 128) if (gpio >= 0 && gpio < 128)
return gpio_set_wake(gpio, on); return gpio_set_wake(gpio, on);
if (irq == IRQ_KEYPAD) if (d->irq == IRQ_KEYPAD)
return keypad_set_wake(on); return keypad_set_wake(on);
switch (irq) { switch (d->irq) {
case IRQ_RTCAlrm: case IRQ_RTCAlrm:
mask = PWER_RTC; mask = PWER_RTC;
break; break;

36
arch/arm/mach-pxa/pxa3xx.c
View File

@ -229,11 +229,11 @@ static void __init pxa3xx_init_pm(void)
pxa_cpu_pm_fns = &pxa3xx_cpu_pm_fns; pxa_cpu_pm_fns = &pxa3xx_cpu_pm_fns;
} }
static int pxa3xx_set_wake(unsigned int irq, unsigned int on) static int pxa3xx_set_wake(struct irq_data *d, unsigned int on)
{ {
unsigned long flags, mask = 0; unsigned long flags, mask = 0;
switch (irq) { switch (d->irq) {
case IRQ_SSP3: case IRQ_SSP3:
mask = ADXER_MFP_WSSP3; mask = ADXER_MFP_WSSP3;
break; break;
@ -322,40 +322,40 @@ static inline void pxa3xx_init_pm(void) {}
#define pxa3xx_set_wake NULL #define pxa3xx_set_wake NULL
#endif #endif
static void pxa_ack_ext_wakeup(unsigned int irq) static void pxa_ack_ext_wakeup(struct irq_data *d)
{ {
PECR |= PECR_IS(irq - IRQ_WAKEUP0); PECR |= PECR_IS(d->irq - IRQ_WAKEUP0);
} }
static void pxa_mask_ext_wakeup(unsigned int irq) static void pxa_mask_ext_wakeup(struct irq_data *d)
{ {
ICMR2 &= ~(1 << ((irq - PXA_IRQ(0)) & 0x1f)); ICMR2 &= ~(1 << ((d->irq - PXA_IRQ(0)) & 0x1f));
PECR &= ~PECR_IE(irq - IRQ_WAKEUP0); PECR &= ~PECR_IE(d->irq - IRQ_WAKEUP0);
} }
static void pxa_unmask_ext_wakeup(unsigned int irq) static void pxa_unmask_ext_wakeup(struct irq_data *d)
{ {
ICMR2 |= 1 << ((irq - PXA_IRQ(0)) & 0x1f); ICMR2 |= 1 << ((d->irq - PXA_IRQ(0)) & 0x1f);
PECR |= PECR_IE(irq - IRQ_WAKEUP0); PECR |= PECR_IE(d->irq - IRQ_WAKEUP0);
} }
static int pxa_set_ext_wakeup_type(unsigned int irq, unsigned int flow_type) static int pxa_set_ext_wakeup_type(struct irq_data *d, unsigned int flow_type)
{ {
if (flow_type & IRQ_TYPE_EDGE_RISING) if (flow_type & IRQ_TYPE_EDGE_RISING)
PWER |= 1 << (irq - IRQ_WAKEUP0); PWER |= 1 << (d->irq - IRQ_WAKEUP0);
if (flow_type & IRQ_TYPE_EDGE_FALLING) if (flow_type & IRQ_TYPE_EDGE_FALLING)
PWER |= 1 << (irq - IRQ_WAKEUP0 + 2); PWER |= 1 << (d->irq - IRQ_WAKEUP0 + 2);
return 0; return 0;
} }
static struct irq_chip pxa_ext_wakeup_chip = { static struct irq_chip pxa_ext_wakeup_chip = {
.name = "WAKEUP", .name = "WAKEUP",
.ack = pxa_ack_ext_wakeup, .irq_ack = pxa_ack_ext_wakeup,
.mask = pxa_mask_ext_wakeup, .irq_mask = pxa_mask_ext_wakeup,
.unmask = pxa_unmask_ext_wakeup, .irq_unmask = pxa_unmask_ext_wakeup,
.set_type = pxa_set_ext_wakeup_type, .irq_set_type = pxa_set_ext_wakeup_type,
}; };
static void __init pxa_init_ext_wakeup_irq(set_wake_t fn) static void __init pxa_init_ext_wakeup_irq(set_wake_t fn)
@ -368,7 +368,7 @@ static void __init pxa_init_ext_wakeup_irq(set_wake_t fn)
set_irq_flags(irq, IRQF_VALID); set_irq_flags(irq, IRQF_VALID);
} }
pxa_ext_wakeup_chip.set_wake = fn; pxa_ext_wakeup_chip.irq_set_wake = fn;
} }
void __init pxa3xx_init_irq(void) void __init pxa3xx_init_irq(void)

22
arch/arm/mach-pxa/viper.c
View File

@ -249,9 +249,9 @@ static inline int viper_bit_to_irq(int bit)
return viper_isa_irqs[bit] + PXA_ISA_IRQ(0); return viper_isa_irqs[bit] + PXA_ISA_IRQ(0);
} }
static void viper_ack_irq(unsigned int irq) static void viper_ack_irq(struct irq_data *d)
{ {
int viper_irq = viper_irq_to_bitmask(irq); int viper_irq = viper_irq_to_bitmask(d->irq);
if (viper_irq & 0xff) if (viper_irq & 0xff)
VIPER_LO_IRQ_STATUS = viper_irq; VIPER_LO_IRQ_STATUS = viper_irq;
@ -259,14 +259,14 @@ static void viper_ack_irq(unsigned int irq)
VIPER_HI_IRQ_STATUS = (viper_irq >> 8); VIPER_HI_IRQ_STATUS = (viper_irq >> 8);
} }
static void viper_mask_irq(unsigned int irq) static void viper_mask_irq(struct irq_data *d)
{ {
viper_irq_enabled_mask &= ~(viper_irq_to_bitmask(irq)); viper_irq_enabled_mask &= ~(viper_irq_to_bitmask(d->irq));
} }
static void viper_unmask_irq(unsigned int irq) static void viper_unmask_irq(struct irq_data *d)
{ {
viper_irq_enabled_mask |= viper_irq_to_bitmask(irq); viper_irq_enabled_mask |= viper_irq_to_bitmask(d->irq);
} }
static inline unsigned long viper_irq_pending(void) static inline unsigned long viper_irq_pending(void)
@ -283,7 +283,7 @@ static void viper_irq_handler(unsigned int irq, struct irq_desc *desc)
do { do {
/* we're in a chained irq handler, /* we're in a chained irq handler,
* so ack the interrupt by hand */ * so ack the interrupt by hand */
desc->chip->ack(irq); desc->irq_data.chip->irq_ack(&desc->irq_data);
if (likely(pending)) { if (likely(pending)) {
irq = viper_bit_to_irq(__ffs(pending)); irq = viper_bit_to_irq(__ffs(pending));
@ -294,10 +294,10 @@ static void viper_irq_handler(unsigned int irq, struct irq_desc *desc)
} }
static struct irq_chip viper_irq_chip = { static struct irq_chip viper_irq_chip = {
.name = "ISA", .name = "ISA",
.ack = viper_ack_irq, .irq_ack = viper_ack_irq,
.mask = viper_mask_irq, .irq_mask = viper_mask_irq,
.unmask = viper_unmask_irq .irq_unmask = viper_unmask_irq
}; };
static void __init viper_init_irq(void) static void __init viper_init_irq(void)

22
arch/arm/mach-pxa/zeus.c
View File

@ -83,19 +83,19 @@ static inline int zeus_bit_to_irq(int bit)
return zeus_isa_irqs[bit] + PXA_ISA_IRQ(0); return zeus_isa_irqs[bit] + PXA_ISA_IRQ(0);
} }
static void zeus_ack_irq(unsigned int irq) static void zeus_ack_irq(struct irq_data *d)
{ {
__raw_writew(zeus_irq_to_bitmask(irq), ZEUS_CPLD_ISA_IRQ); __raw_writew(zeus_irq_to_bitmask(d->irq), ZEUS_CPLD_ISA_IRQ);
} }
static void zeus_mask_irq(unsigned int irq) static void zeus_mask_irq(struct irq_data *d)
{ {
zeus_irq_enabled_mask &= ~(zeus_irq_to_bitmask(irq)); zeus_irq_enabled_mask &= ~(zeus_irq_to_bitmask(d->irq));
} }
static void zeus_unmask_irq(unsigned int irq) static void zeus_unmask_irq(struct irq_data *d)
{ {
zeus_irq_enabled_mask |= zeus_irq_to_bitmask(irq); zeus_irq_enabled_mask |= zeus_irq_to_bitmask(d->irq);
} }
static inline unsigned long zeus_irq_pending(void) static inline unsigned long zeus_irq_pending(void)
@ -111,7 +111,7 @@ static void zeus_irq_handler(unsigned int irq, struct irq_desc *desc)
do { do {
/* we're in a chained irq handler, /* we're in a chained irq handler,
* so ack the interrupt by hand */ * so ack the interrupt by hand */
desc->chip->ack(gpio_to_irq(ZEUS_ISA_GPIO)); desc->irq_data.chip->irq_ack(&desc->irq_data);
if (likely(pending)) { if (likely(pending)) {
irq = zeus_bit_to_irq(__ffs(pending)); irq = zeus_bit_to_irq(__ffs(pending));
@ -122,10 +122,10 @@ static void zeus_irq_handler(unsigned int irq, struct irq_desc *desc)
} }
static struct irq_chip zeus_irq_chip = { static struct irq_chip zeus_irq_chip = {
.name = "ISA", .name = "ISA",
.ack = zeus_ack_irq, .irq_ack = zeus_ack_irq,
.mask = zeus_mask_irq, .irq_mask = zeus_mask_irq,
.unmask = zeus_unmask_irq, .irq_unmask = zeus_unmask_irq,
}; };
static void __init zeus_init_irq(void) static void __init zeus_init_irq(void)

28
arch/arm/plat-pxa/gpio.c
View File

@ -155,10 +155,10 @@ static inline void update_edge_detect(struct pxa_gpio_chip *c)
__raw_writel(gfer, c->regbase + GFER_OFFSET); __raw_writel(gfer, c->regbase + GFER_OFFSET);
} }
static int pxa_gpio_irq_type(unsigned int irq, unsigned int type) static int pxa_gpio_irq_type(struct irq_data *d, unsigned int type)
{ {
struct pxa_gpio_chip *c; struct pxa_gpio_chip *c;
int gpio = irq_to_gpio(irq); int gpio = irq_to_gpio(d->irq);
unsigned long gpdr, mask = GPIO_bit(gpio); unsigned long gpdr, mask = GPIO_bit(gpio);
c = gpio_to_chip(gpio); c = gpio_to_chip(gpio);
@ -195,7 +195,7 @@ static int pxa_gpio_irq_type(unsigned int irq, unsigned int type)
update_edge_detect(c); update_edge_detect(c);
pr_debug("%s: IRQ%d (GPIO%d) - edge%s%s\n", __func__, irq, gpio, pr_debug("%s: IRQ%d (GPIO%d) - edge%s%s\n", __func__, d->irq, gpio,
((type & IRQ_TYPE_EDGE_RISING) ? " rising" : ""), ((type & IRQ_TYPE_EDGE_RISING) ? " rising" : ""),
((type & IRQ_TYPE_EDGE_FALLING) ? " falling" : "")); ((type & IRQ_TYPE_EDGE_FALLING) ? " falling" : ""));
return 0; return 0;
@ -227,17 +227,17 @@ static void pxa_gpio_demux_handler(unsigned int irq, struct irq_desc *desc)
} while (loop); } while (loop);
} }
static void pxa_ack_muxed_gpio(unsigned int irq) static void pxa_ack_muxed_gpio(struct irq_data *d)
{ {
int gpio = irq_to_gpio(irq); int gpio = irq_to_gpio(d->irq);
struct pxa_gpio_chip *c = gpio_to_chip(gpio); struct pxa_gpio_chip *c = gpio_to_chip(gpio);
__raw_writel(GPIO_bit(gpio), c->regbase + GEDR_OFFSET); __raw_writel(GPIO_bit(gpio), c->regbase + GEDR_OFFSET);
} }
static void pxa_mask_muxed_gpio(unsigned int irq) static void pxa_mask_muxed_gpio(struct irq_data *d)
{ {
int gpio = irq_to_gpio(irq); int gpio = irq_to_gpio(d->irq);
struct pxa_gpio_chip *c = gpio_to_chip(gpio); struct pxa_gpio_chip *c = gpio_to_chip(gpio);
uint32_t grer, gfer; uint32_t grer, gfer;
@ -249,9 +249,9 @@ static void pxa_mask_muxed_gpio(unsigned int irq)
__raw_writel(gfer, c->regbase + GFER_OFFSET); __raw_writel(gfer, c->regbase + GFER_OFFSET);
} }
static void pxa_unmask_muxed_gpio(unsigned int irq) static void pxa_unmask_muxed_gpio(struct irq_data *d)
{ {
int gpio = irq_to_gpio(irq); int gpio = irq_to_gpio(d->irq);
struct pxa_gpio_chip *c = gpio_to_chip(gpio); struct pxa_gpio_chip *c = gpio_to_chip(gpio);
c->irq_mask |= GPIO_bit(gpio); c->irq_mask |= GPIO_bit(gpio);
@ -260,10 +260,10 @@ static void pxa_unmask_muxed_gpio(unsigned int irq)
static struct irq_chip pxa_muxed_gpio_chip = { static struct irq_chip pxa_muxed_gpio_chip = {
.name = "GPIO", .name = "GPIO",
.ack = pxa_ack_muxed_gpio, .irq_ack = pxa_ack_muxed_gpio,
.mask = pxa_mask_muxed_gpio, .irq_mask = pxa_mask_muxed_gpio,
.unmask = pxa_unmask_muxed_gpio, .irq_unmask = pxa_unmask_muxed_gpio,
.set_type = pxa_gpio_irq_type, .irq_set_type = pxa_gpio_irq_type,
}; };
void __init pxa_init_gpio(int mux_irq, int start, int end, set_wake_t fn) void __init pxa_init_gpio(int mux_irq, int start, int end, set_wake_t fn)
@ -291,7 +291,7 @@ void __init pxa_init_gpio(int mux_irq, int start, int end, set_wake_t fn)
/* Install handler for GPIO>=2 edge detect interrupts */ /* Install handler for GPIO>=2 edge detect interrupts */
set_irq_chained_handler(mux_irq, pxa_gpio_demux_handler); set_irq_chained_handler(mux_irq, pxa_gpio_demux_handler);
pxa_muxed_gpio_chip.set_wake = fn; pxa_muxed_gpio_chip.irq_set_wake = fn;
} }
#ifdef CONFIG_PM #ifdef CONFIG_PM

4
arch/arm/plat-pxa/include/plat/gpio.h
View File

@ -1,6 +1,8 @@
#ifndef __PLAT_GPIO_H #ifndef __PLAT_GPIO_H
#define __PLAT_GPIO_H #define __PLAT_GPIO_H
struct irq_data;
/* /*
* We handle the GPIOs by banks, each bank covers up to 32 GPIOs with * We handle the GPIOs by banks, each bank covers up to 32 GPIOs with
* one set of registers. The register offsets are organized below: * one set of registers. The register offsets are organized below:
@ -56,7 +58,7 @@ static inline void gpio_set_value(unsigned gpio, int value)
*/ */
extern int pxa_last_gpio; extern int pxa_last_gpio;
typedef int (*set_wake_t)(unsigned int irq, unsigned int on); typedef int (*set_wake_t)(struct irq_data *d, unsigned int on);
extern void pxa_init_gpio(int mux_irq, int start, int end, set_wake_t fn); extern void pxa_init_gpio(int mux_irq, int start, int end, set_wake_t fn);
#endif /* __PLAT_GPIO_H */ #endif /* __PLAT_GPIO_H */