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arm64/sme: Fix tests for 0b1111 value ID registers
For both ID_AA64SMFR0_EL1.I16I64 and ID_AA64SMFR0_EL1.I8I32 we check for
the presence of the feature by looking for a specific ID value of 0x4 but
should instead be checking for the value 0xf defined by the architecture.
This had no practical effect since we are looking for values >= our define
and the only valid values in the architecture are 0b0000 and 0b1111 so we
would detect things appropriately with the architecture as it stands even
with the incorrect defines.
Signed-off-by: Mark Brown <broonie@kernel.org>
Fixes: b4adc83b07
("arm64/sme: System register and exception syndrome definitions")
Link: https://lore.kernel.org/r/20220607165128.2833157-1-broonie@kernel.org
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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@ -843,9 +843,9 @@
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#define ID_AA64SMFR0_F32F32_SHIFT 32
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#define ID_AA64SMFR0_F32F32_SHIFT 32
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#define ID_AA64SMFR0_FA64 0x1
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#define ID_AA64SMFR0_FA64 0x1
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#define ID_AA64SMFR0_I16I64 0x4
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#define ID_AA64SMFR0_I16I64 0xf
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#define ID_AA64SMFR0_F64F64 0x1
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#define ID_AA64SMFR0_F64F64 0x1
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#define ID_AA64SMFR0_I8I32 0x4
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#define ID_AA64SMFR0_I8I32 0xf
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#define ID_AA64SMFR0_F16F32 0x1
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#define ID_AA64SMFR0_F16F32 0x1
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#define ID_AA64SMFR0_B16F32 0x1
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#define ID_AA64SMFR0_B16F32 0x1
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#define ID_AA64SMFR0_F32F32 0x1
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#define ID_AA64SMFR0_F32F32 0x1
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