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powerpc/mm/book3s/radix: Add mapping statistics
Add statistics that show how memory is mapped within the kernel linear mapping.
This is similar to commit 37cd944c8d
("s390/pgtable: add mapping statistics")
We don't do this with Hash translation mode. Hash uses one size (mmu_linear_psize)
to map the kernel linear mapping and we print the linear psize during boot as
below.
"Page orders: linear mapping = 24, virtual = 16, io = 16, vmemmap = 24"
A sample output looks like:
DirectMap4k: 0 kB
DirectMap64k: 18432 kB
DirectMap2M: 1030144 kB
DirectMap1G: 11534336 kB
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
This commit is contained in:
parent
241b5f7ffc
commit
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@ -227,4 +227,11 @@ static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t table,
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#define check_pgt_cache() do { } while (0)
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extern atomic_long_t direct_pages_count[MMU_PAGE_COUNT];
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static inline void update_page_count(int psize, long count)
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{
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if (IS_ENABLED(CONFIG_PROC_FS))
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atomic_long_add(count, &direct_pages_count[psize]);
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}
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#endif /* _ASM_POWERPC_BOOK3S_64_PGALLOC_H */
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@ -32,6 +32,9 @@
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#define RADIX_PUD_BAD_BITS 0x60000000000000e0UL
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#define RADIX_PGD_BAD_BITS 0x60000000000000e0UL
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#define RADIX_PMD_SHIFT (PAGE_SHIFT + RADIX_PTE_INDEX_SIZE)
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#define RADIX_PUD_SHIFT (RADIX_PMD_SHIFT + RADIX_PMD_INDEX_SIZE)
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#define RADIX_PGD_SHIFT (RADIX_PUD_SHIFT + RADIX_PUD_INDEX_SIZE)
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/*
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* Size of EA range mapped by our pagetables.
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*/
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@ -455,3 +455,25 @@ void pgtable_free_tlb(struct mmu_gather *tlb, void *table, int index)
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return pgtable_free(table, index);
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}
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#endif
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#ifdef CONFIG_PROC_FS
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atomic_long_t direct_pages_count[MMU_PAGE_COUNT];
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void arch_report_meminfo(struct seq_file *m)
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{
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/*
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* Hash maps the memory with one size mmu_linear_psize.
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* So don't bother to print these on hash
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*/
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if (!radix_enabled())
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return;
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seq_printf(m, "DirectMap4k: %8lu kB\n",
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atomic_long_read(&direct_pages_count[MMU_PAGE_4K]) << 2);
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seq_printf(m, "DirectMap64k: %8lu kB\n",
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atomic_long_read(&direct_pages_count[MMU_PAGE_64K]) << 6);
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seq_printf(m, "DirectMap2M: %8lu kB\n",
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atomic_long_read(&direct_pages_count[MMU_PAGE_2M]) << 11);
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seq_printf(m, "DirectMap1G: %8lu kB\n",
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atomic_long_read(&direct_pages_count[MMU_PAGE_1G]) << 20);
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}
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#endif /* CONFIG_PROC_FS */
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@ -267,6 +267,7 @@ static int __meminit create_physical_mapping(unsigned long start,
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#else
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int split_text_mapping = 0;
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#endif
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int psize;
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start = _ALIGN_UP(start, PAGE_SIZE);
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for (addr = start; addr < end; addr += mapping_size) {
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@ -280,13 +281,17 @@ static int __meminit create_physical_mapping(unsigned long start,
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retry:
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if (IS_ALIGNED(addr, PUD_SIZE) && gap >= PUD_SIZE &&
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mmu_psize_defs[MMU_PAGE_1G].shift &&
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PUD_SIZE <= max_mapping_size)
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PUD_SIZE <= max_mapping_size) {
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mapping_size = PUD_SIZE;
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else if (IS_ALIGNED(addr, PMD_SIZE) && gap >= PMD_SIZE &&
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mmu_psize_defs[MMU_PAGE_2M].shift)
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psize = MMU_PAGE_1G;
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} else if (IS_ALIGNED(addr, PMD_SIZE) && gap >= PMD_SIZE &&
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mmu_psize_defs[MMU_PAGE_2M].shift) {
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mapping_size = PMD_SIZE;
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else
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psize = MMU_PAGE_2M;
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} else {
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mapping_size = PAGE_SIZE;
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psize = mmu_virtual_psize;
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}
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if (split_text_mapping && (mapping_size == PUD_SIZE) &&
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(addr <= __pa_symbol(__init_begin)) &&
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@ -297,8 +302,10 @@ retry:
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if (split_text_mapping && (mapping_size == PMD_SIZE) &&
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(addr <= __pa_symbol(__init_begin)) &&
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(addr + mapping_size) >= __pa_symbol(_stext))
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(addr + mapping_size) >= __pa_symbol(_stext)) {
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mapping_size = PAGE_SIZE;
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psize = mmu_virtual_psize;
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}
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if (mapping_size != previous_size) {
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print_mapping(start, addr, previous_size);
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@ -316,6 +323,8 @@ retry:
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rc = __map_kernel_page(vaddr, addr, prot, mapping_size, nid, start, end);
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if (rc)
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return rc;
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update_page_count(psize, 1);
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}
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print_mapping(start, addr, mapping_size);
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