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drm/nouveau/fault/gv100-: expose VoltaFaultBufferA
This nvclass exposes the replayable fault buffer, which will be used by SVM to manage GPU page faults. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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@ -55,6 +55,7 @@
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#define VOLTA_USERMODE_A 0x0000c361
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#define MAXWELL_FAULT_BUFFER_A /* clb069.h */ 0x0000b069
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#define VOLTA_FAULT_BUFFER_A /* clb069.h */ 0x0000c369
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#define NV03_CHANNEL_DMA /* cl506b.h */ 0x0000006b
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#define NV10_CHANNEL_DMA /* cl506b.h */ 0x0000006e
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@ -25,6 +25,8 @@
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#include <subdev/mmu.h>
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#include <engine/fifo.h>
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#include <nvif/class.h>
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static void
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gv100_fault_buffer_process(struct nvkm_fault_buffer *buffer)
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{
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@ -166,6 +168,13 @@ gv100_fault_intr(struct nvkm_fault *fault)
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}
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}
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if (stat & 0x08000000) {
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if (fault->buffer[1]) {
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nvkm_event_send(&fault->event, 1, 1, NULL, 0);
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stat &= ~0x08000000;
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}
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}
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if (stat) {
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nvkm_debug(subdev, "intr %08x\n", stat);
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}
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@ -208,6 +217,13 @@ gv100_fault = {
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.buffer.init = gv100_fault_buffer_init,
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.buffer.fini = gv100_fault_buffer_fini,
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.buffer.intr = gv100_fault_buffer_intr,
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/*TODO: Figure out how to expose non-replayable fault buffer, which,
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* for some reason, is where recoverable CE faults appear...
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*
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* It's a bit tricky, as both NVKM and SVM will need access to
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* the non-replayable fault buffer.
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*/
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.user = { { 0, 0, VOLTA_FAULT_BUFFER_A }, 1 },
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};
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int
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@ -157,6 +157,7 @@ tu102_fault = {
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.buffer.init = tu102_fault_buffer_init,
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.buffer.fini = tu102_fault_buffer_fini,
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.buffer.intr = tu102_fault_buffer_intr,
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.user = { { 0, 0, VOLTA_FAULT_BUFFER_A }, 1 },
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};
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int
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