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drm/amdgpu: fix VCE ib alignment value
The VCE rings only require single dword alignment. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -299,7 +299,7 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file
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for (i = 0; i < AMDGPU_MAX_VCE_RINGS; i++)
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ring_mask |= ((adev->vce.ring[i].ready ? 1 : 0) << i);
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ib_start_alignment = AMDGPU_GPU_PAGE_SIZE;
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ib_size_alignment = 8;
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ib_size_alignment = 1;
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break;
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default:
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return -EINVAL;
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