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MIPS: Alchemy: fold mach-db1xxx/db1x00 headers into board code
Merge the db1200.h and db1300.h headers into their only users. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Cc: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/6660/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Manuel Lauss
Ralf Baechle
parent
970e268d6e
commit
a16afa5327
@ -38,13 +38,59 @@
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#include <asm/mach-au1x00/au1000.h>
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#include <asm/mach-au1x00/au1100_mmc.h>
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#include <asm/mach-au1x00/au1xxx_dbdma.h>
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#include <asm/mach-au1x00/au1xxx_psc.h>
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#include <asm/mach-au1x00/au1200fb.h>
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#include <asm/mach-au1x00/au1550_spi.h>
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#include <asm/mach-db1x00/bcsr.h>
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#include <asm/mach-db1x00/db1200.h>
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#include "platform.h"
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#define BCSR_INT_IDE 0x0001
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#define BCSR_INT_ETH 0x0002
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#define BCSR_INT_PC0 0x0004
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#define BCSR_INT_PC0STSCHG 0x0008
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#define BCSR_INT_PC1 0x0010
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#define BCSR_INT_PC1STSCHG 0x0020
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#define BCSR_INT_DC 0x0040
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#define BCSR_INT_FLASHBUSY 0x0080
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#define BCSR_INT_PC0INSERT 0x0100
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#define BCSR_INT_PC0EJECT 0x0200
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#define BCSR_INT_PC1INSERT 0x0400
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#define BCSR_INT_PC1EJECT 0x0800
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#define BCSR_INT_SD0INSERT 0x1000
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#define BCSR_INT_SD0EJECT 0x2000
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#define BCSR_INT_SD1INSERT 0x4000
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#define BCSR_INT_SD1EJECT 0x8000
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#define DB1200_IDE_PHYS_ADDR 0x18800000
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#define DB1200_IDE_REG_SHIFT 5
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#define DB1200_IDE_PHYS_LEN (16 << DB1200_IDE_REG_SHIFT)
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#define DB1200_ETH_PHYS_ADDR 0x19000300
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#define DB1200_NAND_PHYS_ADDR 0x20000000
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#define PB1200_IDE_PHYS_ADDR 0x0C800000
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#define PB1200_ETH_PHYS_ADDR 0x0D000300
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#define PB1200_NAND_PHYS_ADDR 0x1C000000
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#define DB1200_INT_BEGIN (AU1000_MAX_INTR + 1)
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#define DB1200_IDE_INT (DB1200_INT_BEGIN + 0)
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#define DB1200_ETH_INT (DB1200_INT_BEGIN + 1)
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#define DB1200_PC0_INT (DB1200_INT_BEGIN + 2)
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#define DB1200_PC0_STSCHG_INT (DB1200_INT_BEGIN + 3)
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#define DB1200_PC1_INT (DB1200_INT_BEGIN + 4)
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#define DB1200_PC1_STSCHG_INT (DB1200_INT_BEGIN + 5)
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#define DB1200_DC_INT (DB1200_INT_BEGIN + 6)
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#define DB1200_FLASHBUSY_INT (DB1200_INT_BEGIN + 7)
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#define DB1200_PC0_INSERT_INT (DB1200_INT_BEGIN + 8)
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#define DB1200_PC0_EJECT_INT (DB1200_INT_BEGIN + 9)
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#define DB1200_PC1_INSERT_INT (DB1200_INT_BEGIN + 10)
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#define DB1200_PC1_EJECT_INT (DB1200_INT_BEGIN + 11)
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#define DB1200_SD0_INSERT_INT (DB1200_INT_BEGIN + 12)
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#define DB1200_SD0_EJECT_INT (DB1200_INT_BEGIN + 13)
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#define PB1200_SD1_INSERT_INT (DB1200_INT_BEGIN + 14)
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#define PB1200_SD1_EJECT_INT (DB1200_INT_BEGIN + 15)
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#define DB1200_INT_END (DB1200_INT_BEGIN + 15)
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const char *get_system_type(void);
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static int __init db1200_detect_board(void)
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@ -26,12 +26,44 @@
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#include <asm/mach-au1x00/au1200fb.h>
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#include <asm/mach-au1x00/au1xxx_dbdma.h>
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#include <asm/mach-au1x00/au1xxx_psc.h>
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#include <asm/mach-db1x00/db1300.h>
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#include <asm/mach-db1x00/bcsr.h>
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#include <asm/mach-au1x00/prom.h>
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#include "platform.h"
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/* FPGA (external mux) interrupt sources */
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#define DB1300_FIRST_INT (ALCHEMY_GPIC_INT_LAST + 1)
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#define DB1300_IDE_INT (DB1300_FIRST_INT + 0)
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#define DB1300_ETH_INT (DB1300_FIRST_INT + 1)
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#define DB1300_CF_INT (DB1300_FIRST_INT + 2)
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#define DB1300_VIDEO_INT (DB1300_FIRST_INT + 4)
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#define DB1300_HDMI_INT (DB1300_FIRST_INT + 5)
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#define DB1300_DC_INT (DB1300_FIRST_INT + 6)
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#define DB1300_FLASH_INT (DB1300_FIRST_INT + 7)
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#define DB1300_CF_INSERT_INT (DB1300_FIRST_INT + 8)
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#define DB1300_CF_EJECT_INT (DB1300_FIRST_INT + 9)
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#define DB1300_AC97_INT (DB1300_FIRST_INT + 10)
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#define DB1300_AC97_PEN_INT (DB1300_FIRST_INT + 11)
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#define DB1300_SD1_INSERT_INT (DB1300_FIRST_INT + 12)
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#define DB1300_SD1_EJECT_INT (DB1300_FIRST_INT + 13)
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#define DB1300_OTG_VBUS_OC_INT (DB1300_FIRST_INT + 14)
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#define DB1300_HOST_VBUS_OC_INT (DB1300_FIRST_INT + 15)
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#define DB1300_LAST_INT (DB1300_FIRST_INT + 15)
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/* SMSC9210 CS */
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#define DB1300_ETH_PHYS_ADDR 0x19000000
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#define DB1300_ETH_PHYS_END 0x197fffff
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/* ATA CS */
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#define DB1300_IDE_PHYS_ADDR 0x18800000
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#define DB1300_IDE_REG_SHIFT 5
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#define DB1300_IDE_PHYS_LEN (16 << DB1300_IDE_REG_SHIFT)
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/* NAND CS */
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#define DB1300_NAND_PHYS_ADDR 0x20000000
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#define DB1300_NAND_PHYS_END 0x20000fff
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static struct i2c_board_info db1300_i2c_devs[] __initdata = {
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{ I2C_BOARD_INFO("wm8731", 0x1b), }, /* I2S audio codec */
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{ I2C_BOARD_INFO("ne1619", 0x2d), }, /* adm1025-compat hwmon */
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@ -1,91 +0,0 @@
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/*
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* AMD Alchemy DBAu1200 Reference Board
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* Board register defines.
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*
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* ########################################################################
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*
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* This program is free software; you can distribute it and/or modify it
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* under the terms of the GNU General Public License (Version 2) as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
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*
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* ########################################################################
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*
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*
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*/
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#ifndef __ASM_DB1200_H
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#define __ASM_DB1200_H
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#include <linux/types.h>
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#include <asm/mach-au1x00/au1000.h>
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#include <asm/mach-au1x00/au1xxx_psc.h>
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/* Bit positions for the different interrupt sources */
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#define BCSR_INT_IDE 0x0001
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#define BCSR_INT_ETH 0x0002
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#define BCSR_INT_PC0 0x0004
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#define BCSR_INT_PC0STSCHG 0x0008
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#define BCSR_INT_PC1 0x0010
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#define BCSR_INT_PC1STSCHG 0x0020
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#define BCSR_INT_DC 0x0040
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#define BCSR_INT_FLASHBUSY 0x0080
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#define BCSR_INT_PC0INSERT 0x0100
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#define BCSR_INT_PC0EJECT 0x0200
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#define BCSR_INT_PC1INSERT 0x0400
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#define BCSR_INT_PC1EJECT 0x0800
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#define BCSR_INT_SD0INSERT 0x1000
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#define BCSR_INT_SD0EJECT 0x2000
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#define BCSR_INT_SD1INSERT 0x4000
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#define BCSR_INT_SD1EJECT 0x8000
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#define IDE_REG_SHIFT 5
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#define DB1200_IDE_PHYS_ADDR 0x18800000
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#define DB1200_IDE_PHYS_LEN (16 << IDE_REG_SHIFT)
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#define DB1200_ETH_PHYS_ADDR 0x19000300
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#define DB1200_NAND_PHYS_ADDR 0x20000000
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#define PB1200_IDE_PHYS_ADDR 0x0C800000
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#define PB1200_ETH_PHYS_ADDR 0x0D000300
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#define PB1200_NAND_PHYS_ADDR 0x1C000000
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/*
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* External Interrupts for DBAu1200 as of 8/6/2004.
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* Bit positions in the CPLD registers can be calculated by taking
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* the interrupt define and subtracting the DB1200_INT_BEGIN value.
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*
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* Example: IDE bis pos is = 64 - 64
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* ETH bit pos is = 65 - 64
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*/
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enum external_db1200_ints {
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DB1200_INT_BEGIN = AU1000_MAX_INTR + 1,
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DB1200_IDE_INT = DB1200_INT_BEGIN,
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DB1200_ETH_INT,
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DB1200_PC0_INT,
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DB1200_PC0_STSCHG_INT,
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DB1200_PC1_INT,
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DB1200_PC1_STSCHG_INT,
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DB1200_DC_INT,
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DB1200_FLASHBUSY_INT,
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DB1200_PC0_INSERT_INT,
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DB1200_PC0_EJECT_INT,
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DB1200_PC1_INSERT_INT,
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DB1200_PC1_EJECT_INT,
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DB1200_SD0_INSERT_INT,
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DB1200_SD0_EJECT_INT,
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PB1200_SD1_INSERT_INT,
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PB1200_SD1_EJECT_INT,
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DB1200_INT_END = DB1200_INT_BEGIN + 15,
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};
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#endif /* __ASM_DB1200_H */
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@ -1,40 +0,0 @@
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/*
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* NetLogic DB1300 board constants
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*/
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#ifndef _DB1300_H_
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#define _DB1300_H_
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/* FPGA (external mux) interrupt sources */
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#define DB1300_FIRST_INT (ALCHEMY_GPIC_INT_LAST + 1)
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#define DB1300_IDE_INT (DB1300_FIRST_INT + 0)
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#define DB1300_ETH_INT (DB1300_FIRST_INT + 1)
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#define DB1300_CF_INT (DB1300_FIRST_INT + 2)
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#define DB1300_VIDEO_INT (DB1300_FIRST_INT + 4)
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#define DB1300_HDMI_INT (DB1300_FIRST_INT + 5)
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#define DB1300_DC_INT (DB1300_FIRST_INT + 6)
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#define DB1300_FLASH_INT (DB1300_FIRST_INT + 7)
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#define DB1300_CF_INSERT_INT (DB1300_FIRST_INT + 8)
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#define DB1300_CF_EJECT_INT (DB1300_FIRST_INT + 9)
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#define DB1300_AC97_INT (DB1300_FIRST_INT + 10)
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#define DB1300_AC97_PEN_INT (DB1300_FIRST_INT + 11)
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#define DB1300_SD1_INSERT_INT (DB1300_FIRST_INT + 12)
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#define DB1300_SD1_EJECT_INT (DB1300_FIRST_INT + 13)
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#define DB1300_OTG_VBUS_OC_INT (DB1300_FIRST_INT + 14)
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#define DB1300_HOST_VBUS_OC_INT (DB1300_FIRST_INT + 15)
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#define DB1300_LAST_INT (DB1300_FIRST_INT + 15)
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/* SMSC9210 CS */
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#define DB1300_ETH_PHYS_ADDR 0x19000000
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#define DB1300_ETH_PHYS_END 0x197fffff
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/* ATA CS */
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#define DB1300_IDE_PHYS_ADDR 0x18800000
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#define DB1300_IDE_REG_SHIFT 5
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#define DB1300_IDE_PHYS_LEN (16 << DB1300_IDE_REG_SHIFT)
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/* NAND CS */
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#define DB1300_NAND_PHYS_ADDR 0x20000000
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#define DB1300_NAND_PHYS_END 0x20000fff
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#endif /* _DB1300_H_ */
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