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drm/amdgpu: add atombios headers
These headers define the atombios table structure and driver interface. Acked-by: Christian König <christian.koenig@amd.com> Acked-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Alex Deucher
parent
81629cba1f
commit
a02860aa2b
736
drivers/gpu/drm/amd/amdgpu/ObjectID.h
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736
drivers/gpu/drm/amd/amdgpu/ObjectID.h
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/*
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* Copyright 2006-2007 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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/* based on stg/asic_reg/drivers/inc/asic_reg/ObjectID.h ver 23 */
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#ifndef _OBJECTID_H
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#define _OBJECTID_H
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#if defined(_X86_)
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#pragma pack(1)
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#endif
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/****************************************************/
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/* Graphics Object Type Definition */
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/****************************************************/
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#define GRAPH_OBJECT_TYPE_NONE 0x0
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#define GRAPH_OBJECT_TYPE_GPU 0x1
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#define GRAPH_OBJECT_TYPE_ENCODER 0x2
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#define GRAPH_OBJECT_TYPE_CONNECTOR 0x3
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#define GRAPH_OBJECT_TYPE_ROUTER 0x4
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/* deleted */
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#define GRAPH_OBJECT_TYPE_DISPLAY_PATH 0x6
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#define GRAPH_OBJECT_TYPE_GENERIC 0x7
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/****************************************************/
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/* Encoder Object ID Definition */
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/****************************************************/
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#define ENCODER_OBJECT_ID_NONE 0x00
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/* Radeon Class Display Hardware */
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#define ENCODER_OBJECT_ID_INTERNAL_LVDS 0x01
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#define ENCODER_OBJECT_ID_INTERNAL_TMDS1 0x02
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#define ENCODER_OBJECT_ID_INTERNAL_TMDS2 0x03
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#define ENCODER_OBJECT_ID_INTERNAL_DAC1 0x04
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#define ENCODER_OBJECT_ID_INTERNAL_DAC2 0x05 /* TV/CV DAC */
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#define ENCODER_OBJECT_ID_INTERNAL_SDVOA 0x06
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#define ENCODER_OBJECT_ID_INTERNAL_SDVOB 0x07
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/* External Third Party Encoders */
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#define ENCODER_OBJECT_ID_SI170B 0x08
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#define ENCODER_OBJECT_ID_CH7303 0x09
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#define ENCODER_OBJECT_ID_CH7301 0x0A
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#define ENCODER_OBJECT_ID_INTERNAL_DVO1 0x0B /* This belongs to Radeon Class Display Hardware */
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#define ENCODER_OBJECT_ID_EXTERNAL_SDVOA 0x0C
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#define ENCODER_OBJECT_ID_EXTERNAL_SDVOB 0x0D
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#define ENCODER_OBJECT_ID_TITFP513 0x0E
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#define ENCODER_OBJECT_ID_INTERNAL_LVTM1 0x0F /* not used for Radeon */
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#define ENCODER_OBJECT_ID_VT1623 0x10
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#define ENCODER_OBJECT_ID_HDMI_SI1930 0x11
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#define ENCODER_OBJECT_ID_HDMI_INTERNAL 0x12
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#define ENCODER_OBJECT_ID_ALMOND 0x22
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#define ENCODER_OBJECT_ID_TRAVIS 0x23
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#define ENCODER_OBJECT_ID_NUTMEG 0x22
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#define ENCODER_OBJECT_ID_HDMI_ANX9805 0x26
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/* Kaleidoscope (KLDSCP) Class Display Hardware (internal) */
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#define ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1 0x13
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#define ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1 0x14
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#define ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1 0x15
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#define ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2 0x16 /* Shared with CV/TV and CRT */
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#define ENCODER_OBJECT_ID_SI178 0X17 /* External TMDS (dual link, no HDCP.) */
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#define ENCODER_OBJECT_ID_MVPU_FPGA 0x18 /* MVPU FPGA chip */
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#define ENCODER_OBJECT_ID_INTERNAL_DDI 0x19
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#define ENCODER_OBJECT_ID_VT1625 0x1A
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#define ENCODER_OBJECT_ID_HDMI_SI1932 0x1B
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#define ENCODER_OBJECT_ID_DP_AN9801 0x1C
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#define ENCODER_OBJECT_ID_DP_DP501 0x1D
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#define ENCODER_OBJECT_ID_INTERNAL_UNIPHY 0x1E
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#define ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA 0x1F
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#define ENCODER_OBJECT_ID_INTERNAL_UNIPHY1 0x20
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#define ENCODER_OBJECT_ID_INTERNAL_UNIPHY2 0x21
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#define ENCODER_OBJECT_ID_INTERNAL_VCE 0x24
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#define ENCODER_OBJECT_ID_INTERNAL_UNIPHY3 0x25
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#define ENCODER_OBJECT_ID_INTERNAL_AMCLK 0x27
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#define ENCODER_OBJECT_ID_GENERAL_EXTERNAL_DVO 0xFF
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/****************************************************/
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/* Connector Object ID Definition */
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/****************************************************/
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#define CONNECTOR_OBJECT_ID_NONE 0x00
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#define CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I 0x01
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#define CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I 0x02
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#define CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D 0x03
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#define CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D 0x04
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#define CONNECTOR_OBJECT_ID_VGA 0x05
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#define CONNECTOR_OBJECT_ID_COMPOSITE 0x06
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#define CONNECTOR_OBJECT_ID_SVIDEO 0x07
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#define CONNECTOR_OBJECT_ID_YPbPr 0x08
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#define CONNECTOR_OBJECT_ID_D_CONNECTOR 0x09
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#define CONNECTOR_OBJECT_ID_9PIN_DIN 0x0A /* Supports both CV & TV */
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#define CONNECTOR_OBJECT_ID_SCART 0x0B
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#define CONNECTOR_OBJECT_ID_HDMI_TYPE_A 0x0C
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#define CONNECTOR_OBJECT_ID_HDMI_TYPE_B 0x0D
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#define CONNECTOR_OBJECT_ID_LVDS 0x0E
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#define CONNECTOR_OBJECT_ID_7PIN_DIN 0x0F
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#define CONNECTOR_OBJECT_ID_PCIE_CONNECTOR 0x10
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#define CONNECTOR_OBJECT_ID_CROSSFIRE 0x11
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#define CONNECTOR_OBJECT_ID_HARDCODE_DVI 0x12
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#define CONNECTOR_OBJECT_ID_DISPLAYPORT 0x13
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#define CONNECTOR_OBJECT_ID_eDP 0x14
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#define CONNECTOR_OBJECT_ID_MXM 0x15
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#define CONNECTOR_OBJECT_ID_LVDS_eDP 0x16
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/* deleted */
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/****************************************************/
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/* Router Object ID Definition */
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/****************************************************/
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#define ROUTER_OBJECT_ID_NONE 0x00
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#define ROUTER_OBJECT_ID_I2C_EXTENDER_CNTL 0x01
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/****************************************************/
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/* Generic Object ID Definition */
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/****************************************************/
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#define GENERIC_OBJECT_ID_NONE 0x00
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#define GENERIC_OBJECT_ID_GLSYNC 0x01
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#define GENERIC_OBJECT_ID_PX2_NON_DRIVABLE 0x02
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#define GENERIC_OBJECT_ID_MXM_OPM 0x03
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#define GENERIC_OBJECT_ID_STEREO_PIN 0x04 //This object could show up from Misc Object table, it follows ATOM_OBJECT format, and contains one ATOM_OBJECT_GPIO_CNTL_RECORD for the stereo pin
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/****************************************************/
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/* Graphics Object ENUM ID Definition */
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/****************************************************/
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#define GRAPH_OBJECT_ENUM_ID1 0x01
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#define GRAPH_OBJECT_ENUM_ID2 0x02
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#define GRAPH_OBJECT_ENUM_ID3 0x03
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#define GRAPH_OBJECT_ENUM_ID4 0x04
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#define GRAPH_OBJECT_ENUM_ID5 0x05
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#define GRAPH_OBJECT_ENUM_ID6 0x06
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#define GRAPH_OBJECT_ENUM_ID7 0x07
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/****************************************************/
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/* Graphics Object ID Bit definition */
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/****************************************************/
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#define OBJECT_ID_MASK 0x00FF
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#define ENUM_ID_MASK 0x0700
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#define RESERVED1_ID_MASK 0x0800
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#define OBJECT_TYPE_MASK 0x7000
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#define RESERVED2_ID_MASK 0x8000
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#define OBJECT_ID_SHIFT 0x00
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#define ENUM_ID_SHIFT 0x08
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#define OBJECT_TYPE_SHIFT 0x0C
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/****************************************************/
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/* Graphics Object family definition */
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/****************************************************/
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#define CONSTRUCTOBJECTFAMILYID(GRAPHICS_OBJECT_TYPE, GRAPHICS_OBJECT_ID) (GRAPHICS_OBJECT_TYPE << OBJECT_TYPE_SHIFT | \
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GRAPHICS_OBJECT_ID << OBJECT_ID_SHIFT)
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/****************************************************/
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/* GPU Object ID definition - Shared with BIOS */
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/****************************************************/
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#define GPU_ENUM_ID1 ( GRAPH_OBJECT_TYPE_GPU << OBJECT_TYPE_SHIFT |\
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GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT)
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/****************************************************/
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/* Encoder Object ID definition - Shared with BIOS */
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/****************************************************/
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/*
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#define ENCODER_INTERNAL_LVDS_ENUM_ID1 0x2101
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#define ENCODER_INTERNAL_TMDS1_ENUM_ID1 0x2102
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#define ENCODER_INTERNAL_TMDS2_ENUM_ID1 0x2103
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#define ENCODER_INTERNAL_DAC1_ENUM_ID1 0x2104
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#define ENCODER_INTERNAL_DAC2_ENUM_ID1 0x2105
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#define ENCODER_INTERNAL_SDVOA_ENUM_ID1 0x2106
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#define ENCODER_INTERNAL_SDVOB_ENUM_ID1 0x2107
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#define ENCODER_SIL170B_ENUM_ID1 0x2108
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#define ENCODER_CH7303_ENUM_ID1 0x2109
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#define ENCODER_CH7301_ENUM_ID1 0x210A
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#define ENCODER_INTERNAL_DVO1_ENUM_ID1 0x210B
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#define ENCODER_EXTERNAL_SDVOA_ENUM_ID1 0x210C
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#define ENCODER_EXTERNAL_SDVOB_ENUM_ID1 0x210D
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#define ENCODER_TITFP513_ENUM_ID1 0x210E
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#define ENCODER_INTERNAL_LVTM1_ENUM_ID1 0x210F
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#define ENCODER_VT1623_ENUM_ID1 0x2110
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#define ENCODER_HDMI_SI1930_ENUM_ID1 0x2111
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#define ENCODER_HDMI_INTERNAL_ENUM_ID1 0x2112
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#define ENCODER_INTERNAL_KLDSCP_TMDS1_ENUM_ID1 0x2113
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#define ENCODER_INTERNAL_KLDSCP_DVO1_ENUM_ID1 0x2114
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#define ENCODER_INTERNAL_KLDSCP_DAC1_ENUM_ID1 0x2115
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#define ENCODER_INTERNAL_KLDSCP_DAC2_ENUM_ID1 0x2116
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#define ENCODER_SI178_ENUM_ID1 0x2117
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#define ENCODER_MVPU_FPGA_ENUM_ID1 0x2118
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#define ENCODER_INTERNAL_DDI_ENUM_ID1 0x2119
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#define ENCODER_VT1625_ENUM_ID1 0x211A
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#define ENCODER_HDMI_SI1932_ENUM_ID1 0x211B
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#define ENCODER_ENCODER_DP_AN9801_ENUM_ID1 0x211C
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#define ENCODER_DP_DP501_ENUM_ID1 0x211D
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#define ENCODER_INTERNAL_UNIPHY_ENUM_ID1 0x211E
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*/
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#define ENCODER_INTERNAL_LVDS_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
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GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
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ENCODER_OBJECT_ID_INTERNAL_LVDS << OBJECT_ID_SHIFT)
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#define ENCODER_INTERNAL_TMDS1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
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GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
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ENCODER_OBJECT_ID_INTERNAL_TMDS1 << OBJECT_ID_SHIFT)
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#define ENCODER_INTERNAL_TMDS2_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
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GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
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ENCODER_OBJECT_ID_INTERNAL_TMDS2 << OBJECT_ID_SHIFT)
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#define ENCODER_INTERNAL_DAC1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
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GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
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ENCODER_OBJECT_ID_INTERNAL_DAC1 << OBJECT_ID_SHIFT)
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#define ENCODER_INTERNAL_DAC2_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
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GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
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ENCODER_OBJECT_ID_INTERNAL_DAC2 << OBJECT_ID_SHIFT)
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#define ENCODER_INTERNAL_SDVOA_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
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GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
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ENCODER_OBJECT_ID_INTERNAL_SDVOA << OBJECT_ID_SHIFT)
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#define ENCODER_INTERNAL_SDVOA_ENUM_ID2 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
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GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
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ENCODER_OBJECT_ID_INTERNAL_SDVOA << OBJECT_ID_SHIFT)
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#define ENCODER_INTERNAL_SDVOB_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
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GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
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ENCODER_OBJECT_ID_INTERNAL_SDVOB << OBJECT_ID_SHIFT)
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#define ENCODER_SIL170B_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
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GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
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ENCODER_OBJECT_ID_SI170B << OBJECT_ID_SHIFT)
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#define ENCODER_CH7303_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
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GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
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ENCODER_OBJECT_ID_CH7303 << OBJECT_ID_SHIFT)
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#define ENCODER_CH7301_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
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GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
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ENCODER_OBJECT_ID_CH7301 << OBJECT_ID_SHIFT)
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#define ENCODER_INTERNAL_DVO1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
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GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
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ENCODER_OBJECT_ID_INTERNAL_DVO1 << OBJECT_ID_SHIFT)
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#define ENCODER_EXTERNAL_SDVOA_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
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GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
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ENCODER_OBJECT_ID_EXTERNAL_SDVOA << OBJECT_ID_SHIFT)
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#define ENCODER_EXTERNAL_SDVOA_ENUM_ID2 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
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GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
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ENCODER_OBJECT_ID_EXTERNAL_SDVOA << OBJECT_ID_SHIFT)
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#define ENCODER_EXTERNAL_SDVOB_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
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GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
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ENCODER_OBJECT_ID_EXTERNAL_SDVOB << OBJECT_ID_SHIFT)
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#define ENCODER_TITFP513_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
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GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
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ENCODER_OBJECT_ID_TITFP513 << OBJECT_ID_SHIFT)
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#define ENCODER_INTERNAL_LVTM1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
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GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
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ENCODER_OBJECT_ID_INTERNAL_LVTM1 << OBJECT_ID_SHIFT)
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#define ENCODER_VT1623_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
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GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
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ENCODER_OBJECT_ID_VT1623 << OBJECT_ID_SHIFT)
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#define ENCODER_HDMI_SI1930_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
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GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
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ENCODER_OBJECT_ID_HDMI_SI1930 << OBJECT_ID_SHIFT)
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#define ENCODER_HDMI_INTERNAL_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
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GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
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ENCODER_OBJECT_ID_HDMI_INTERNAL << OBJECT_ID_SHIFT)
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#define ENCODER_INTERNAL_KLDSCP_TMDS1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
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GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
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ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1 << OBJECT_ID_SHIFT)
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#define ENCODER_INTERNAL_KLDSCP_TMDS1_ENUM_ID2 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
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GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
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ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1 << OBJECT_ID_SHIFT)
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#define ENCODER_INTERNAL_KLDSCP_DVO1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
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GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
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ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1 << OBJECT_ID_SHIFT)
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#define ENCODER_INTERNAL_KLDSCP_DAC1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
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GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
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ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1 << OBJECT_ID_SHIFT)
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#define ENCODER_INTERNAL_KLDSCP_DAC2_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
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GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
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ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2 << OBJECT_ID_SHIFT) // Shared with CV/TV and CRT
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#define ENCODER_SI178_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
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GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
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ENCODER_OBJECT_ID_SI178 << OBJECT_ID_SHIFT)
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#define ENCODER_MVPU_FPGA_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
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GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
|
||||
ENCODER_OBJECT_ID_MVPU_FPGA << OBJECT_ID_SHIFT)
|
||||
|
||||
#define ENCODER_INTERNAL_DDI_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
|
||||
ENCODER_OBJECT_ID_INTERNAL_DDI << OBJECT_ID_SHIFT)
|
||||
|
||||
#define ENCODER_VT1625_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
|
||||
ENCODER_OBJECT_ID_VT1625 << OBJECT_ID_SHIFT)
|
||||
|
||||
#define ENCODER_HDMI_SI1932_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
|
||||
ENCODER_OBJECT_ID_HDMI_SI1932 << OBJECT_ID_SHIFT)
|
||||
|
||||
#define ENCODER_DP_DP501_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
|
||||
ENCODER_OBJECT_ID_DP_DP501 << OBJECT_ID_SHIFT)
|
||||
|
||||
#define ENCODER_DP_AN9801_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
|
||||
ENCODER_OBJECT_ID_DP_AN9801 << OBJECT_ID_SHIFT)
|
||||
|
||||
#define ENCODER_INTERNAL_UNIPHY_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
|
||||
ENCODER_OBJECT_ID_INTERNAL_UNIPHY << OBJECT_ID_SHIFT)
|
||||
|
||||
#define ENCODER_INTERNAL_UNIPHY_ENUM_ID2 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
|
||||
ENCODER_OBJECT_ID_INTERNAL_UNIPHY << OBJECT_ID_SHIFT)
|
||||
|
||||
#define ENCODER_INTERNAL_KLDSCP_LVTMA_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
|
||||
ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA << OBJECT_ID_SHIFT)
|
||||
|
||||
#define ENCODER_INTERNAL_UNIPHY1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
|
||||
ENCODER_OBJECT_ID_INTERNAL_UNIPHY1 << OBJECT_ID_SHIFT)
|
||||
|
||||
#define ENCODER_INTERNAL_UNIPHY1_ENUM_ID2 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
|
||||
ENCODER_OBJECT_ID_INTERNAL_UNIPHY1 << OBJECT_ID_SHIFT)
|
||||
|
||||
#define ENCODER_INTERNAL_UNIPHY2_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
|
||||
ENCODER_OBJECT_ID_INTERNAL_UNIPHY2 << OBJECT_ID_SHIFT)
|
||||
|
||||
#define ENCODER_INTERNAL_UNIPHY2_ENUM_ID2 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
|
||||
ENCODER_OBJECT_ID_INTERNAL_UNIPHY2 << OBJECT_ID_SHIFT)
|
||||
|
||||
#define ENCODER_INTERNAL_UNIPHY3_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
|
||||
ENCODER_OBJECT_ID_INTERNAL_UNIPHY3 << OBJECT_ID_SHIFT)
|
||||
|
||||
#define ENCODER_INTERNAL_UNIPHY3_ENUM_ID2 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
|
||||
ENCODER_OBJECT_ID_INTERNAL_UNIPHY3 << OBJECT_ID_SHIFT)
|
||||
|
||||
#define ENCODER_GENERAL_EXTERNAL_DVO_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
|
||||
ENCODER_OBJECT_ID_GENERAL_EXTERNAL_DVO << OBJECT_ID_SHIFT)
|
||||
|
||||
#define ENCODER_ALMOND_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
|
||||
ENCODER_OBJECT_ID_ALMOND << OBJECT_ID_SHIFT)
|
||||
|
||||
#define ENCODER_ALMOND_ENUM_ID2 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
|
||||
ENCODER_OBJECT_ID_ALMOND << OBJECT_ID_SHIFT)
|
||||
|
||||
#define ENCODER_TRAVIS_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
|
||||
ENCODER_OBJECT_ID_TRAVIS << OBJECT_ID_SHIFT)
|
||||
|
||||
#define ENCODER_TRAVIS_ENUM_ID2 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
|
||||
ENCODER_OBJECT_ID_TRAVIS << OBJECT_ID_SHIFT)
|
||||
|
||||
#define ENCODER_NUTMEG_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
|
||||
ENCODER_OBJECT_ID_NUTMEG << OBJECT_ID_SHIFT)
|
||||
|
||||
#define ENCODER_VCE_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
|
||||
ENCODER_OBJECT_ID_INTERNAL_VCE << OBJECT_ID_SHIFT)
|
||||
|
||||
#define ENCODER_HDMI_ANX9805_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
|
||||
ENCODER_OBJECT_ID_HDMI_ANX9805 << OBJECT_ID_SHIFT)
|
||||
|
||||
/****************************************************/
|
||||
/* Connector Object ID definition - Shared with BIOS */
|
||||
/****************************************************/
|
||||
/*
|
||||
#define CONNECTOR_SINGLE_LINK_DVI_I_ENUM_ID1 0x3101
|
||||
#define CONNECTOR_DUAL_LINK_DVI_I_ENUM_ID1 0x3102
|
||||
#define CONNECTOR_SINGLE_LINK_DVI_D_ENUM_ID1 0x3103
|
||||
#define CONNECTOR_DUAL_LINK_DVI_D_ENUM_ID1 0x3104
|
||||
#define CONNECTOR_VGA_ENUM_ID1 0x3105
|
||||
#define CONNECTOR_COMPOSITE_ENUM_ID1 0x3106
|
||||
#define CONNECTOR_SVIDEO_ENUM_ID1 0x3107
|
||||
#define CONNECTOR_YPbPr_ENUM_ID1 0x3108
|
||||
#define CONNECTOR_D_CONNECTORE_ENUM_ID1 0x3109
|
||||
#define CONNECTOR_9PIN_DIN_ENUM_ID1 0x310A
|
||||
#define CONNECTOR_SCART_ENUM_ID1 0x310B
|
||||
#define CONNECTOR_HDMI_TYPE_A_ENUM_ID1 0x310C
|
||||
#define CONNECTOR_HDMI_TYPE_B_ENUM_ID1 0x310D
|
||||
#define CONNECTOR_LVDS_ENUM_ID1 0x310E
|
||||
#define CONNECTOR_7PIN_DIN_ENUM_ID1 0x310F
|
||||
#define CONNECTOR_PCIE_CONNECTOR_ENUM_ID1 0x3110
|
||||
*/
|
||||
#define CONNECTOR_LVDS_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
|
||||
CONNECTOR_OBJECT_ID_LVDS << OBJECT_ID_SHIFT)
|
||||
|
||||
#define CONNECTOR_LVDS_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
|
||||
CONNECTOR_OBJECT_ID_LVDS << OBJECT_ID_SHIFT)
|
||||
|
||||
#define CONNECTOR_eDP_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
|
||||
CONNECTOR_OBJECT_ID_eDP << OBJECT_ID_SHIFT)
|
||||
|
||||
#define CONNECTOR_eDP_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
|
||||
CONNECTOR_OBJECT_ID_eDP << OBJECT_ID_SHIFT)
|
||||
|
||||
#define CONNECTOR_SINGLE_LINK_DVI_I_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
|
||||
CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I << OBJECT_ID_SHIFT)
|
||||
|
||||
#define CONNECTOR_SINGLE_LINK_DVI_I_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
|
||||
CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I << OBJECT_ID_SHIFT)
|
||||
|
||||
#define CONNECTOR_DUAL_LINK_DVI_I_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
|
||||
CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I << OBJECT_ID_SHIFT)
|
||||
|
||||
#define CONNECTOR_DUAL_LINK_DVI_I_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
|
||||
CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I << OBJECT_ID_SHIFT)
|
||||
|
||||
#define CONNECTOR_SINGLE_LINK_DVI_D_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
|
||||
CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D << OBJECT_ID_SHIFT)
|
||||
|
||||
#define CONNECTOR_SINGLE_LINK_DVI_D_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
|
||||
CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D << OBJECT_ID_SHIFT)
|
||||
|
||||
#define CONNECTOR_SINGLE_LINK_DVI_D_ENUM_ID3 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID3 << ENUM_ID_SHIFT |\
|
||||
CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D << OBJECT_ID_SHIFT)
|
||||
|
||||
#define CONNECTOR_SINGLE_LINK_DVI_D_ENUM_ID4 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID4 << ENUM_ID_SHIFT |\
|
||||
CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D << OBJECT_ID_SHIFT)
|
||||
|
||||
#define CONNECTOR_SINGLE_LINK_DVI_D_ENUM_ID5 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID5 << ENUM_ID_SHIFT |\
|
||||
CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D << OBJECT_ID_SHIFT)
|
||||
|
||||
#define CONNECTOR_SINGLE_LINK_DVI_D_ENUM_ID6 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID6 << ENUM_ID_SHIFT |\
|
||||
CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D << OBJECT_ID_SHIFT)
|
||||
|
||||
#define CONNECTOR_DUAL_LINK_DVI_D_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
|
||||
CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D << OBJECT_ID_SHIFT)
|
||||
|
||||
#define CONNECTOR_DUAL_LINK_DVI_D_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
|
||||
CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D << OBJECT_ID_SHIFT)
|
||||
|
||||
#define CONNECTOR_DUAL_LINK_DVI_D_ENUM_ID3 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID3 << ENUM_ID_SHIFT |\
|
||||
CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D << OBJECT_ID_SHIFT)
|
||||
|
||||
#define CONNECTOR_DUAL_LINK_DVI_D_ENUM_ID4 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID4 << ENUM_ID_SHIFT |\
|
||||
CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D << OBJECT_ID_SHIFT)
|
||||
|
||||
#define CONNECTOR_VGA_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
|
||||
CONNECTOR_OBJECT_ID_VGA << OBJECT_ID_SHIFT)
|
||||
|
||||
#define CONNECTOR_VGA_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
|
||||
CONNECTOR_OBJECT_ID_VGA << OBJECT_ID_SHIFT)
|
||||
|
||||
#define CONNECTOR_COMPOSITE_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
|
||||
CONNECTOR_OBJECT_ID_COMPOSITE << OBJECT_ID_SHIFT)
|
||||
|
||||
#define CONNECTOR_COMPOSITE_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
|
||||
CONNECTOR_OBJECT_ID_COMPOSITE << OBJECT_ID_SHIFT)
|
||||
|
||||
#define CONNECTOR_SVIDEO_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
|
||||
CONNECTOR_OBJECT_ID_SVIDEO << OBJECT_ID_SHIFT)
|
||||
|
||||
#define CONNECTOR_SVIDEO_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
|
||||
CONNECTOR_OBJECT_ID_SVIDEO << OBJECT_ID_SHIFT)
|
||||
|
||||
#define CONNECTOR_YPbPr_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
|
||||
CONNECTOR_OBJECT_ID_YPbPr << OBJECT_ID_SHIFT)
|
||||
|
||||
#define CONNECTOR_YPbPr_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
|
||||
CONNECTOR_OBJECT_ID_YPbPr << OBJECT_ID_SHIFT)
|
||||
|
||||
#define CONNECTOR_D_CONNECTOR_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
|
||||
CONNECTOR_OBJECT_ID_D_CONNECTOR << OBJECT_ID_SHIFT)
|
||||
|
||||
#define CONNECTOR_D_CONNECTOR_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
|
||||
CONNECTOR_OBJECT_ID_D_CONNECTOR << OBJECT_ID_SHIFT)
|
||||
|
||||
#define CONNECTOR_9PIN_DIN_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
|
||||
CONNECTOR_OBJECT_ID_9PIN_DIN << OBJECT_ID_SHIFT)
|
||||
|
||||
#define CONNECTOR_9PIN_DIN_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
|
||||
CONNECTOR_OBJECT_ID_9PIN_DIN << OBJECT_ID_SHIFT)
|
||||
|
||||
#define CONNECTOR_SCART_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
|
||||
CONNECTOR_OBJECT_ID_SCART << OBJECT_ID_SHIFT)
|
||||
|
||||
#define CONNECTOR_SCART_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
|
||||
CONNECTOR_OBJECT_ID_SCART << OBJECT_ID_SHIFT)
|
||||
|
||||
#define CONNECTOR_HDMI_TYPE_A_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
|
||||
CONNECTOR_OBJECT_ID_HDMI_TYPE_A << OBJECT_ID_SHIFT)
|
||||
|
||||
#define CONNECTOR_HDMI_TYPE_A_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
|
||||
CONNECTOR_OBJECT_ID_HDMI_TYPE_A << OBJECT_ID_SHIFT)
|
||||
|
||||
#define CONNECTOR_HDMI_TYPE_A_ENUM_ID3 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID3 << ENUM_ID_SHIFT |\
|
||||
CONNECTOR_OBJECT_ID_HDMI_TYPE_A << OBJECT_ID_SHIFT)
|
||||
|
||||
#define CONNECTOR_HDMI_TYPE_A_ENUM_ID4 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID4 << ENUM_ID_SHIFT |\
|
||||
CONNECTOR_OBJECT_ID_HDMI_TYPE_A << OBJECT_ID_SHIFT)
|
||||
|
||||
#define CONNECTOR_HDMI_TYPE_A_ENUM_ID5 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID5 << ENUM_ID_SHIFT |\
|
||||
CONNECTOR_OBJECT_ID_HDMI_TYPE_A << OBJECT_ID_SHIFT)
|
||||
|
||||
#define CONNECTOR_HDMI_TYPE_A_ENUM_ID6 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID6 << ENUM_ID_SHIFT |\
|
||||
CONNECTOR_OBJECT_ID_HDMI_TYPE_A << OBJECT_ID_SHIFT)
|
||||
|
||||
#define CONNECTOR_HDMI_TYPE_B_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
|
||||
CONNECTOR_OBJECT_ID_HDMI_TYPE_B << OBJECT_ID_SHIFT)
|
||||
|
||||
#define CONNECTOR_HDMI_TYPE_B_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
|
||||
CONNECTOR_OBJECT_ID_HDMI_TYPE_B << OBJECT_ID_SHIFT)
|
||||
|
||||
#define CONNECTOR_7PIN_DIN_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
|
||||
CONNECTOR_OBJECT_ID_7PIN_DIN << OBJECT_ID_SHIFT)
|
||||
|
||||
#define CONNECTOR_7PIN_DIN_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
|
||||
CONNECTOR_OBJECT_ID_7PIN_DIN << OBJECT_ID_SHIFT)
|
||||
|
||||
#define CONNECTOR_PCIE_CONNECTOR_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
|
||||
CONNECTOR_OBJECT_ID_PCIE_CONNECTOR << OBJECT_ID_SHIFT)
|
||||
|
||||
#define CONNECTOR_PCIE_CONNECTOR_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
|
||||
CONNECTOR_OBJECT_ID_PCIE_CONNECTOR << OBJECT_ID_SHIFT)
|
||||
|
||||
#define CONNECTOR_CROSSFIRE_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
|
||||
CONNECTOR_OBJECT_ID_CROSSFIRE << OBJECT_ID_SHIFT)
|
||||
|
||||
#define CONNECTOR_CROSSFIRE_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
|
||||
CONNECTOR_OBJECT_ID_CROSSFIRE << OBJECT_ID_SHIFT)
|
||||
|
||||
|
||||
#define CONNECTOR_HARDCODE_DVI_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
|
||||
CONNECTOR_OBJECT_ID_HARDCODE_DVI << OBJECT_ID_SHIFT)
|
||||
|
||||
#define CONNECTOR_HARDCODE_DVI_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
|
||||
CONNECTOR_OBJECT_ID_HARDCODE_DVI << OBJECT_ID_SHIFT)
|
||||
|
||||
#define CONNECTOR_DISPLAYPORT_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
|
||||
CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT)
|
||||
|
||||
#define CONNECTOR_DISPLAYPORT_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
|
||||
CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT)
|
||||
|
||||
#define CONNECTOR_DISPLAYPORT_ENUM_ID3 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID3 << ENUM_ID_SHIFT |\
|
||||
CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT)
|
||||
|
||||
#define CONNECTOR_DISPLAYPORT_ENUM_ID4 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID4 << ENUM_ID_SHIFT |\
|
||||
CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT)
|
||||
|
||||
#define CONNECTOR_DISPLAYPORT_ENUM_ID5 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID5 << ENUM_ID_SHIFT |\
|
||||
CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT)
|
||||
|
||||
#define CONNECTOR_DISPLAYPORT_ENUM_ID6 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID6 << ENUM_ID_SHIFT |\
|
||||
CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT)
|
||||
|
||||
#define CONNECTOR_MXM_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
|
||||
CONNECTOR_OBJECT_ID_MXM << OBJECT_ID_SHIFT) //Mapping to MXM_DP_A
|
||||
|
||||
#define CONNECTOR_MXM_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
|
||||
CONNECTOR_OBJECT_ID_MXM << OBJECT_ID_SHIFT) //Mapping to MXM_DP_B
|
||||
|
||||
#define CONNECTOR_MXM_ENUM_ID3 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID3 << ENUM_ID_SHIFT |\
|
||||
CONNECTOR_OBJECT_ID_MXM << OBJECT_ID_SHIFT) //Mapping to MXM_DP_C
|
||||
|
||||
#define CONNECTOR_MXM_ENUM_ID4 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID4 << ENUM_ID_SHIFT |\
|
||||
CONNECTOR_OBJECT_ID_MXM << OBJECT_ID_SHIFT) //Mapping to MXM_DP_D
|
||||
|
||||
#define CONNECTOR_MXM_ENUM_ID5 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID5 << ENUM_ID_SHIFT |\
|
||||
CONNECTOR_OBJECT_ID_MXM << OBJECT_ID_SHIFT) //Mapping to MXM_LVDS_TXxx
|
||||
|
||||
#define CONNECTOR_MXM_ENUM_ID6 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID6 << ENUM_ID_SHIFT |\
|
||||
CONNECTOR_OBJECT_ID_MXM << OBJECT_ID_SHIFT) //Mapping to MXM_LVDS_UXxx
|
||||
|
||||
#define CONNECTOR_MXM_ENUM_ID7 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID7 << ENUM_ID_SHIFT |\
|
||||
CONNECTOR_OBJECT_ID_MXM << OBJECT_ID_SHIFT) //Mapping to MXM_DAC
|
||||
|
||||
#define CONNECTOR_LVDS_eDP_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
|
||||
CONNECTOR_OBJECT_ID_LVDS_eDP << OBJECT_ID_SHIFT)
|
||||
|
||||
#define CONNECTOR_LVDS_eDP_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
|
||||
CONNECTOR_OBJECT_ID_LVDS_eDP << OBJECT_ID_SHIFT)
|
||||
|
||||
/****************************************************/
|
||||
/* Router Object ID definition - Shared with BIOS */
|
||||
/****************************************************/
|
||||
#define ROUTER_I2C_EXTENDER_CNTL_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ROUTER << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
|
||||
ROUTER_OBJECT_ID_I2C_EXTENDER_CNTL << OBJECT_ID_SHIFT)
|
||||
|
||||
/* deleted */
|
||||
|
||||
/****************************************************/
|
||||
/* Generic Object ID definition - Shared with BIOS */
|
||||
/****************************************************/
|
||||
#define GENERICOBJECT_GLSYNC_ENUM_ID1 (GRAPH_OBJECT_TYPE_GENERIC << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
|
||||
GENERIC_OBJECT_ID_GLSYNC << OBJECT_ID_SHIFT)
|
||||
|
||||
#define GENERICOBJECT_PX2_NON_DRIVABLE_ID1 (GRAPH_OBJECT_TYPE_GENERIC << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
|
||||
GENERIC_OBJECT_ID_PX2_NON_DRIVABLE<< OBJECT_ID_SHIFT)
|
||||
|
||||
#define GENERICOBJECT_PX2_NON_DRIVABLE_ID2 (GRAPH_OBJECT_TYPE_GENERIC << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
|
||||
GENERIC_OBJECT_ID_PX2_NON_DRIVABLE<< OBJECT_ID_SHIFT)
|
||||
|
||||
#define GENERICOBJECT_MXM_OPM_ENUM_ID1 (GRAPH_OBJECT_TYPE_GENERIC << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
|
||||
GENERIC_OBJECT_ID_MXM_OPM << OBJECT_ID_SHIFT)
|
||||
|
||||
#define GENERICOBJECT_STEREO_PIN_ENUM_ID1 (GRAPH_OBJECT_TYPE_GENERIC << OBJECT_TYPE_SHIFT |\
|
||||
GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
|
||||
GENERIC_OBJECT_ID_STEREO_PIN << OBJECT_ID_SHIFT)
|
||||
|
||||
/****************************************************/
|
||||
/* Object Cap definition - Shared with BIOS */
|
||||
/****************************************************/
|
||||
#define GRAPHICS_OBJECT_CAP_I2C 0x00000001L
|
||||
#define GRAPHICS_OBJECT_CAP_TABLE_ID 0x00000002L
|
||||
|
||||
|
||||
#define GRAPHICS_OBJECT_I2CCOMMAND_TABLE_ID 0x01
|
||||
#define GRAPHICS_OBJECT_HOTPLUGDETECTIONINTERUPT_TABLE_ID 0x02
|
||||
#define GRAPHICS_OBJECT_ENCODER_OUTPUT_PROTECTION_TABLE_ID 0x03
|
||||
|
||||
#if defined(_X86_)
|
||||
#pragma pack()
|
||||
#endif
|
||||
|
||||
#endif /*GRAPHICTYPE */
|
||||
|
||||
|
||||
|
||||
|
||||
8555
drivers/gpu/drm/amd/amdgpu/atombios.h
Normal file
8555
drivers/gpu/drm/amd/amdgpu/atombios.h
Normal file
File diff suppressed because it is too large
Load Diff
698
drivers/gpu/drm/amd/amdgpu/pptable.h
Normal file
698
drivers/gpu/drm/amd/amdgpu/pptable.h
Normal file
@ -0,0 +1,698 @@
|
||||
/*
|
||||
* Copyright 2013 Advanced Micro Devices, Inc.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
|
||||
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
|
||||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
#ifndef _PPTABLE_H
|
||||
#define _PPTABLE_H
|
||||
|
||||
#pragma pack(1)
|
||||
|
||||
typedef struct _ATOM_PPLIB_THERMALCONTROLLER
|
||||
|
||||
{
|
||||
UCHAR ucType; // one of ATOM_PP_THERMALCONTROLLER_*
|
||||
UCHAR ucI2cLine; // as interpreted by DAL I2C
|
||||
UCHAR ucI2cAddress;
|
||||
UCHAR ucFanParameters; // Fan Control Parameters.
|
||||
UCHAR ucFanMinRPM; // Fan Minimum RPM (hundreds) -- for display purposes only.
|
||||
UCHAR ucFanMaxRPM; // Fan Maximum RPM (hundreds) -- for display purposes only.
|
||||
UCHAR ucReserved; // ----
|
||||
UCHAR ucFlags; // to be defined
|
||||
} ATOM_PPLIB_THERMALCONTROLLER;
|
||||
|
||||
#define ATOM_PP_FANPARAMETERS_TACHOMETER_PULSES_PER_REVOLUTION_MASK 0x0f
|
||||
#define ATOM_PP_FANPARAMETERS_NOFAN 0x80 // No fan is connected to this controller.
|
||||
|
||||
#define ATOM_PP_THERMALCONTROLLER_NONE 0
|
||||
#define ATOM_PP_THERMALCONTROLLER_LM63 1 // Not used by PPLib
|
||||
#define ATOM_PP_THERMALCONTROLLER_ADM1032 2 // Not used by PPLib
|
||||
#define ATOM_PP_THERMALCONTROLLER_ADM1030 3 // Not used by PPLib
|
||||
#define ATOM_PP_THERMALCONTROLLER_MUA6649 4 // Not used by PPLib
|
||||
#define ATOM_PP_THERMALCONTROLLER_LM64 5
|
||||
#define ATOM_PP_THERMALCONTROLLER_F75375 6 // Not used by PPLib
|
||||
#define ATOM_PP_THERMALCONTROLLER_RV6xx 7
|
||||
#define ATOM_PP_THERMALCONTROLLER_RV770 8
|
||||
#define ATOM_PP_THERMALCONTROLLER_ADT7473 9
|
||||
#define ATOM_PP_THERMALCONTROLLER_KONG 10
|
||||
#define ATOM_PP_THERMALCONTROLLER_EXTERNAL_GPIO 11
|
||||
#define ATOM_PP_THERMALCONTROLLER_EVERGREEN 12
|
||||
#define ATOM_PP_THERMALCONTROLLER_EMC2103 13 /* 0x0D */ // Only fan control will be implemented, do NOT show this in PPGen.
|
||||
#define ATOM_PP_THERMALCONTROLLER_SUMO 14 /* 0x0E */ // Sumo type, used internally
|
||||
#define ATOM_PP_THERMALCONTROLLER_NISLANDS 15
|
||||
#define ATOM_PP_THERMALCONTROLLER_SISLANDS 16
|
||||
#define ATOM_PP_THERMALCONTROLLER_LM96163 17
|
||||
#define ATOM_PP_THERMALCONTROLLER_CISLANDS 18
|
||||
#define ATOM_PP_THERMALCONTROLLER_KAVERI 19
|
||||
|
||||
|
||||
// Thermal controller 'combo type' to use an external controller for Fan control and an internal controller for thermal.
|
||||
// We probably should reserve the bit 0x80 for this use.
|
||||
// To keep the number of these types low we should also use the same code for all ASICs (i.e. do not distinguish RV6xx and RV7xx Internal here).
|
||||
// The driver can pick the correct internal controller based on the ASIC.
|
||||
|
||||
#define ATOM_PP_THERMALCONTROLLER_ADT7473_WITH_INTERNAL 0x89 // ADT7473 Fan Control + Internal Thermal Controller
|
||||
#define ATOM_PP_THERMALCONTROLLER_EMC2103_WITH_INTERNAL 0x8D // EMC2103 Fan Control + Internal Thermal Controller
|
||||
|
||||
typedef struct _ATOM_PPLIB_STATE
|
||||
{
|
||||
UCHAR ucNonClockStateIndex;
|
||||
UCHAR ucClockStateIndices[1]; // variable-sized
|
||||
} ATOM_PPLIB_STATE;
|
||||
|
||||
|
||||
typedef struct _ATOM_PPLIB_FANTABLE
|
||||
{
|
||||
UCHAR ucFanTableFormat; // Change this if the table format changes or version changes so that the other fields are not the same.
|
||||
UCHAR ucTHyst; // Temperature hysteresis. Integer.
|
||||
USHORT usTMin; // The temperature, in 0.01 centigrades, below which we just run at a minimal PWM.
|
||||
USHORT usTMed; // The middle temperature where we change slopes.
|
||||
USHORT usTHigh; // The high point above TMed for adjusting the second slope.
|
||||
USHORT usPWMMin; // The minimum PWM value in percent (0.01% increments).
|
||||
USHORT usPWMMed; // The PWM value (in percent) at TMed.
|
||||
USHORT usPWMHigh; // The PWM value at THigh.
|
||||
} ATOM_PPLIB_FANTABLE;
|
||||
|
||||
typedef struct _ATOM_PPLIB_FANTABLE2
|
||||
{
|
||||
ATOM_PPLIB_FANTABLE basicTable;
|
||||
USHORT usTMax; // The max temperature
|
||||
} ATOM_PPLIB_FANTABLE2;
|
||||
|
||||
typedef struct _ATOM_PPLIB_FANTABLE3
|
||||
{
|
||||
ATOM_PPLIB_FANTABLE2 basicTable2;
|
||||
UCHAR ucFanControlMode;
|
||||
USHORT usFanPWMMax;
|
||||
USHORT usFanOutputSensitivity;
|
||||
} ATOM_PPLIB_FANTABLE3;
|
||||
|
||||
typedef struct _ATOM_PPLIB_EXTENDEDHEADER
|
||||
{
|
||||
USHORT usSize;
|
||||
ULONG ulMaxEngineClock; // For Overdrive.
|
||||
ULONG ulMaxMemoryClock; // For Overdrive.
|
||||
// Add extra system parameters here, always adjust size to include all fields.
|
||||
USHORT usVCETableOffset; //points to ATOM_PPLIB_VCE_Table
|
||||
USHORT usUVDTableOffset; //points to ATOM_PPLIB_UVD_Table
|
||||
USHORT usSAMUTableOffset; //points to ATOM_PPLIB_SAMU_Table
|
||||
USHORT usPPMTableOffset; //points to ATOM_PPLIB_PPM_Table
|
||||
USHORT usACPTableOffset; //points to ATOM_PPLIB_ACP_Table
|
||||
/* points to ATOM_PPLIB_POWERTUNE_Table */
|
||||
USHORT usPowerTuneTableOffset;
|
||||
/* points to ATOM_PPLIB_CLOCK_Voltage_Dependency_Table for sclkVddgfxTable */
|
||||
USHORT usSclkVddgfxTableOffset;
|
||||
} ATOM_PPLIB_EXTENDEDHEADER;
|
||||
|
||||
//// ATOM_PPLIB_POWERPLAYTABLE::ulPlatformCaps
|
||||
#define ATOM_PP_PLATFORM_CAP_BACKBIAS 1
|
||||
#define ATOM_PP_PLATFORM_CAP_POWERPLAY 2
|
||||
#define ATOM_PP_PLATFORM_CAP_SBIOSPOWERSOURCE 4
|
||||
#define ATOM_PP_PLATFORM_CAP_ASPM_L0s 8
|
||||
#define ATOM_PP_PLATFORM_CAP_ASPM_L1 16
|
||||
#define ATOM_PP_PLATFORM_CAP_HARDWAREDC 32
|
||||
#define ATOM_PP_PLATFORM_CAP_GEMINIPRIMARY 64
|
||||
#define ATOM_PP_PLATFORM_CAP_STEPVDDC 128
|
||||
#define ATOM_PP_PLATFORM_CAP_VOLTAGECONTROL 256
|
||||
#define ATOM_PP_PLATFORM_CAP_SIDEPORTCONTROL 512
|
||||
#define ATOM_PP_PLATFORM_CAP_TURNOFFPLL_ASPML1 1024
|
||||
#define ATOM_PP_PLATFORM_CAP_HTLINKCONTROL 2048
|
||||
#define ATOM_PP_PLATFORM_CAP_MVDDCONTROL 4096
|
||||
#define ATOM_PP_PLATFORM_CAP_GOTO_BOOT_ON_ALERT 0x2000 // Go to boot state on alerts, e.g. on an AC->DC transition.
|
||||
#define ATOM_PP_PLATFORM_CAP_DONT_WAIT_FOR_VBLANK_ON_ALERT 0x4000 // Do NOT wait for VBLANK during an alert (e.g. AC->DC transition).
|
||||
#define ATOM_PP_PLATFORM_CAP_VDDCI_CONTROL 0x8000 // Does the driver control VDDCI independently from VDDC.
|
||||
#define ATOM_PP_PLATFORM_CAP_REGULATOR_HOT 0x00010000 // Enable the 'regulator hot' feature.
|
||||
#define ATOM_PP_PLATFORM_CAP_BACO 0x00020000 // Does the driver supports BACO state.
|
||||
#define ATOM_PP_PLATFORM_CAP_NEW_CAC_VOLTAGE 0x00040000 // Does the driver supports new CAC voltage table.
|
||||
#define ATOM_PP_PLATFORM_CAP_REVERT_GPIO5_POLARITY 0x00080000 // Does the driver supports revert GPIO5 polarity.
|
||||
#define ATOM_PP_PLATFORM_CAP_OUTPUT_THERMAL2GPIO17 0x00100000 // Does the driver supports thermal2GPIO17.
|
||||
#define ATOM_PP_PLATFORM_CAP_VRHOT_GPIO_CONFIGURABLE 0x00200000 // Does the driver supports VR HOT GPIO Configurable.
|
||||
#define ATOM_PP_PLATFORM_CAP_TEMP_INVERSION 0x00400000 // Does the driver supports Temp Inversion feature.
|
||||
#define ATOM_PP_PLATFORM_CAP_EVV 0x00800000
|
||||
|
||||
typedef struct _ATOM_PPLIB_POWERPLAYTABLE
|
||||
{
|
||||
ATOM_COMMON_TABLE_HEADER sHeader;
|
||||
|
||||
UCHAR ucDataRevision;
|
||||
|
||||
UCHAR ucNumStates;
|
||||
UCHAR ucStateEntrySize;
|
||||
UCHAR ucClockInfoSize;
|
||||
UCHAR ucNonClockSize;
|
||||
|
||||
// offset from start of this table to array of ucNumStates ATOM_PPLIB_STATE structures
|
||||
USHORT usStateArrayOffset;
|
||||
|
||||
// offset from start of this table to array of ASIC-specific structures,
|
||||
// currently ATOM_PPLIB_CLOCK_INFO.
|
||||
USHORT usClockInfoArrayOffset;
|
||||
|
||||
// offset from start of this table to array of ATOM_PPLIB_NONCLOCK_INFO
|
||||
USHORT usNonClockInfoArrayOffset;
|
||||
|
||||
USHORT usBackbiasTime; // in microseconds
|
||||
USHORT usVoltageTime; // in microseconds
|
||||
USHORT usTableSize; //the size of this structure, or the extended structure
|
||||
|
||||
ULONG ulPlatformCaps; // See ATOM_PPLIB_CAPS_*
|
||||
|
||||
ATOM_PPLIB_THERMALCONTROLLER sThermalController;
|
||||
|
||||
USHORT usBootClockInfoOffset;
|
||||
USHORT usBootNonClockInfoOffset;
|
||||
|
||||
} ATOM_PPLIB_POWERPLAYTABLE;
|
||||
|
||||
typedef struct _ATOM_PPLIB_POWERPLAYTABLE2
|
||||
{
|
||||
ATOM_PPLIB_POWERPLAYTABLE basicTable;
|
||||
UCHAR ucNumCustomThermalPolicy;
|
||||
USHORT usCustomThermalPolicyArrayOffset;
|
||||
}ATOM_PPLIB_POWERPLAYTABLE2, *LPATOM_PPLIB_POWERPLAYTABLE2;
|
||||
|
||||
typedef struct _ATOM_PPLIB_POWERPLAYTABLE3
|
||||
{
|
||||
ATOM_PPLIB_POWERPLAYTABLE2 basicTable2;
|
||||
USHORT usFormatID; // To be used ONLY by PPGen.
|
||||
USHORT usFanTableOffset;
|
||||
USHORT usExtendendedHeaderOffset;
|
||||
} ATOM_PPLIB_POWERPLAYTABLE3, *LPATOM_PPLIB_POWERPLAYTABLE3;
|
||||
|
||||
typedef struct _ATOM_PPLIB_POWERPLAYTABLE4
|
||||
{
|
||||
ATOM_PPLIB_POWERPLAYTABLE3 basicTable3;
|
||||
ULONG ulGoldenPPID; // PPGen use only
|
||||
ULONG ulGoldenRevision; // PPGen use only
|
||||
USHORT usVddcDependencyOnSCLKOffset;
|
||||
USHORT usVddciDependencyOnMCLKOffset;
|
||||
USHORT usVddcDependencyOnMCLKOffset;
|
||||
USHORT usMaxClockVoltageOnDCOffset;
|
||||
USHORT usVddcPhaseShedLimitsTableOffset; // Points to ATOM_PPLIB_PhaseSheddingLimits_Table
|
||||
USHORT usMvddDependencyOnMCLKOffset;
|
||||
} ATOM_PPLIB_POWERPLAYTABLE4, *LPATOM_PPLIB_POWERPLAYTABLE4;
|
||||
|
||||
typedef struct _ATOM_PPLIB_POWERPLAYTABLE5
|
||||
{
|
||||
ATOM_PPLIB_POWERPLAYTABLE4 basicTable4;
|
||||
ULONG ulTDPLimit;
|
||||
ULONG ulNearTDPLimit;
|
||||
ULONG ulSQRampingThreshold;
|
||||
USHORT usCACLeakageTableOffset; // Points to ATOM_PPLIB_CAC_Leakage_Table
|
||||
ULONG ulCACLeakage; // The iLeakage for driver calculated CAC leakage table
|
||||
USHORT usTDPODLimit;
|
||||
USHORT usLoadLineSlope; // in milliOhms * 100
|
||||
} ATOM_PPLIB_POWERPLAYTABLE5, *LPATOM_PPLIB_POWERPLAYTABLE5;
|
||||
|
||||
//// ATOM_PPLIB_NONCLOCK_INFO::usClassification
|
||||
#define ATOM_PPLIB_CLASSIFICATION_UI_MASK 0x0007
|
||||
#define ATOM_PPLIB_CLASSIFICATION_UI_SHIFT 0
|
||||
#define ATOM_PPLIB_CLASSIFICATION_UI_NONE 0
|
||||
#define ATOM_PPLIB_CLASSIFICATION_UI_BATTERY 1
|
||||
#define ATOM_PPLIB_CLASSIFICATION_UI_BALANCED 3
|
||||
#define ATOM_PPLIB_CLASSIFICATION_UI_PERFORMANCE 5
|
||||
// 2, 4, 6, 7 are reserved
|
||||
|
||||
#define ATOM_PPLIB_CLASSIFICATION_BOOT 0x0008
|
||||
#define ATOM_PPLIB_CLASSIFICATION_THERMAL 0x0010
|
||||
#define ATOM_PPLIB_CLASSIFICATION_LIMITEDPOWERSOURCE 0x0020
|
||||
#define ATOM_PPLIB_CLASSIFICATION_REST 0x0040
|
||||
#define ATOM_PPLIB_CLASSIFICATION_FORCED 0x0080
|
||||
#define ATOM_PPLIB_CLASSIFICATION_3DPERFORMANCE 0x0100
|
||||
#define ATOM_PPLIB_CLASSIFICATION_OVERDRIVETEMPLATE 0x0200
|
||||
#define ATOM_PPLIB_CLASSIFICATION_UVDSTATE 0x0400
|
||||
#define ATOM_PPLIB_CLASSIFICATION_3DLOW 0x0800
|
||||
#define ATOM_PPLIB_CLASSIFICATION_ACPI 0x1000
|
||||
#define ATOM_PPLIB_CLASSIFICATION_HD2STATE 0x2000
|
||||
#define ATOM_PPLIB_CLASSIFICATION_HDSTATE 0x4000
|
||||
#define ATOM_PPLIB_CLASSIFICATION_SDSTATE 0x8000
|
||||
|
||||
//// ATOM_PPLIB_NONCLOCK_INFO::usClassification2
|
||||
#define ATOM_PPLIB_CLASSIFICATION2_LIMITEDPOWERSOURCE_2 0x0001
|
||||
#define ATOM_PPLIB_CLASSIFICATION2_ULV 0x0002
|
||||
#define ATOM_PPLIB_CLASSIFICATION2_MVC 0x0004 //Multi-View Codec (BD-3D)
|
||||
|
||||
//// ATOM_PPLIB_NONCLOCK_INFO::ulCapsAndSettings
|
||||
#define ATOM_PPLIB_SINGLE_DISPLAY_ONLY 0x00000001
|
||||
#define ATOM_PPLIB_SUPPORTS_VIDEO_PLAYBACK 0x00000002
|
||||
|
||||
// 0 is 2.5Gb/s, 1 is 5Gb/s
|
||||
#define ATOM_PPLIB_PCIE_LINK_SPEED_MASK 0x00000004
|
||||
#define ATOM_PPLIB_PCIE_LINK_SPEED_SHIFT 2
|
||||
|
||||
// lanes - 1: 1, 2, 4, 8, 12, 16 permitted by PCIE spec
|
||||
#define ATOM_PPLIB_PCIE_LINK_WIDTH_MASK 0x000000F8
|
||||
#define ATOM_PPLIB_PCIE_LINK_WIDTH_SHIFT 3
|
||||
|
||||
// lookup into reduced refresh-rate table
|
||||
#define ATOM_PPLIB_LIMITED_REFRESHRATE_VALUE_MASK 0x00000F00
|
||||
#define ATOM_PPLIB_LIMITED_REFRESHRATE_VALUE_SHIFT 8
|
||||
|
||||
#define ATOM_PPLIB_LIMITED_REFRESHRATE_UNLIMITED 0
|
||||
#define ATOM_PPLIB_LIMITED_REFRESHRATE_50HZ 1
|
||||
// 2-15 TBD as needed.
|
||||
|
||||
#define ATOM_PPLIB_SOFTWARE_DISABLE_LOADBALANCING 0x00001000
|
||||
#define ATOM_PPLIB_SOFTWARE_ENABLE_SLEEP_FOR_TIMESTAMPS 0x00002000
|
||||
|
||||
#define ATOM_PPLIB_DISALLOW_ON_DC 0x00004000
|
||||
|
||||
#define ATOM_PPLIB_ENABLE_VARIBRIGHT 0x00008000
|
||||
|
||||
//memory related flags
|
||||
#define ATOM_PPLIB_SWSTATE_MEMORY_DLL_OFF 0x000010000
|
||||
|
||||
//M3 Arb //2bits, current 3 sets of parameters in total
|
||||
#define ATOM_PPLIB_M3ARB_MASK 0x00060000
|
||||
#define ATOM_PPLIB_M3ARB_SHIFT 17
|
||||
|
||||
#define ATOM_PPLIB_ENABLE_DRR 0x00080000
|
||||
|
||||
// remaining 16 bits are reserved
|
||||
typedef struct _ATOM_PPLIB_THERMAL_STATE
|
||||
{
|
||||
UCHAR ucMinTemperature;
|
||||
UCHAR ucMaxTemperature;
|
||||
UCHAR ucThermalAction;
|
||||
}ATOM_PPLIB_THERMAL_STATE, *LPATOM_PPLIB_THERMAL_STATE;
|
||||
|
||||
// Contained in an array starting at the offset
|
||||
// in ATOM_PPLIB_POWERPLAYTABLE::usNonClockInfoArrayOffset.
|
||||
// referenced from ATOM_PPLIB_STATE_INFO::ucNonClockStateIndex
|
||||
#define ATOM_PPLIB_NONCLOCKINFO_VER1 12
|
||||
#define ATOM_PPLIB_NONCLOCKINFO_VER2 24
|
||||
typedef struct _ATOM_PPLIB_NONCLOCK_INFO
|
||||
{
|
||||
USHORT usClassification;
|
||||
UCHAR ucMinTemperature;
|
||||
UCHAR ucMaxTemperature;
|
||||
ULONG ulCapsAndSettings;
|
||||
UCHAR ucRequiredPower;
|
||||
USHORT usClassification2;
|
||||
ULONG ulVCLK;
|
||||
ULONG ulDCLK;
|
||||
UCHAR ucUnused[5];
|
||||
} ATOM_PPLIB_NONCLOCK_INFO;
|
||||
|
||||
// Contained in an array starting at the offset
|
||||
// in ATOM_PPLIB_POWERPLAYTABLE::usClockInfoArrayOffset.
|
||||
// referenced from ATOM_PPLIB_STATE::ucClockStateIndices
|
||||
typedef struct _ATOM_PPLIB_R600_CLOCK_INFO
|
||||
{
|
||||
USHORT usEngineClockLow;
|
||||
UCHAR ucEngineClockHigh;
|
||||
|
||||
USHORT usMemoryClockLow;
|
||||
UCHAR ucMemoryClockHigh;
|
||||
|
||||
USHORT usVDDC;
|
||||
USHORT usUnused1;
|
||||
USHORT usUnused2;
|
||||
|
||||
ULONG ulFlags; // ATOM_PPLIB_R600_FLAGS_*
|
||||
|
||||
} ATOM_PPLIB_R600_CLOCK_INFO;
|
||||
|
||||
// ulFlags in ATOM_PPLIB_R600_CLOCK_INFO
|
||||
#define ATOM_PPLIB_R600_FLAGS_PCIEGEN2 1
|
||||
#define ATOM_PPLIB_R600_FLAGS_UVDSAFE 2
|
||||
#define ATOM_PPLIB_R600_FLAGS_BACKBIASENABLE 4
|
||||
#define ATOM_PPLIB_R600_FLAGS_MEMORY_ODT_OFF 8
|
||||
#define ATOM_PPLIB_R600_FLAGS_MEMORY_DLL_OFF 16
|
||||
#define ATOM_PPLIB_R600_FLAGS_LOWPOWER 32 // On the RV770 use 'low power' setting (sequencer S0).
|
||||
|
||||
typedef struct _ATOM_PPLIB_RS780_CLOCK_INFO
|
||||
|
||||
{
|
||||
USHORT usLowEngineClockLow; // Low Engine clock in MHz (the same way as on the R600).
|
||||
UCHAR ucLowEngineClockHigh;
|
||||
USHORT usHighEngineClockLow; // High Engine clock in MHz.
|
||||
UCHAR ucHighEngineClockHigh;
|
||||
USHORT usMemoryClockLow; // For now one of the ATOM_PPLIB_RS780_SPMCLK_XXXX constants.
|
||||
UCHAR ucMemoryClockHigh; // Currentyl unused.
|
||||
UCHAR ucPadding; // For proper alignment and size.
|
||||
USHORT usVDDC; // For the 780, use: None, Low, High, Variable
|
||||
UCHAR ucMaxHTLinkWidth; // From SBIOS - {2, 4, 8, 16}
|
||||
UCHAR ucMinHTLinkWidth; // From SBIOS - {2, 4, 8, 16}. Effective only if CDLW enabled. Minimum down stream width could
|
||||
USHORT usHTLinkFreq; // See definition ATOM_PPLIB_RS780_HTLINKFREQ_xxx or in MHz(>=200).
|
||||
ULONG ulFlags;
|
||||
} ATOM_PPLIB_RS780_CLOCK_INFO;
|
||||
|
||||
#define ATOM_PPLIB_RS780_VOLTAGE_NONE 0
|
||||
#define ATOM_PPLIB_RS780_VOLTAGE_LOW 1
|
||||
#define ATOM_PPLIB_RS780_VOLTAGE_HIGH 2
|
||||
#define ATOM_PPLIB_RS780_VOLTAGE_VARIABLE 3
|
||||
|
||||
#define ATOM_PPLIB_RS780_SPMCLK_NONE 0 // We cannot change the side port memory clock, leave it as it is.
|
||||
#define ATOM_PPLIB_RS780_SPMCLK_LOW 1
|
||||
#define ATOM_PPLIB_RS780_SPMCLK_HIGH 2
|
||||
|
||||
#define ATOM_PPLIB_RS780_HTLINKFREQ_NONE 0
|
||||
#define ATOM_PPLIB_RS780_HTLINKFREQ_LOW 1
|
||||
#define ATOM_PPLIB_RS780_HTLINKFREQ_HIGH 2
|
||||
|
||||
typedef struct _ATOM_PPLIB_EVERGREEN_CLOCK_INFO
|
||||
{
|
||||
USHORT usEngineClockLow;
|
||||
UCHAR ucEngineClockHigh;
|
||||
|
||||
USHORT usMemoryClockLow;
|
||||
UCHAR ucMemoryClockHigh;
|
||||
|
||||
USHORT usVDDC;
|
||||
USHORT usVDDCI;
|
||||
USHORT usUnused;
|
||||
|
||||
ULONG ulFlags; // ATOM_PPLIB_R600_FLAGS_*
|
||||
|
||||
} ATOM_PPLIB_EVERGREEN_CLOCK_INFO;
|
||||
|
||||
typedef struct _ATOM_PPLIB_SI_CLOCK_INFO
|
||||
{
|
||||
USHORT usEngineClockLow;
|
||||
UCHAR ucEngineClockHigh;
|
||||
|
||||
USHORT usMemoryClockLow;
|
||||
UCHAR ucMemoryClockHigh;
|
||||
|
||||
USHORT usVDDC;
|
||||
USHORT usVDDCI;
|
||||
UCHAR ucPCIEGen;
|
||||
UCHAR ucUnused1;
|
||||
|
||||
ULONG ulFlags; // ATOM_PPLIB_SI_FLAGS_*, no flag is necessary for now
|
||||
|
||||
} ATOM_PPLIB_SI_CLOCK_INFO;
|
||||
|
||||
typedef struct _ATOM_PPLIB_CI_CLOCK_INFO
|
||||
{
|
||||
USHORT usEngineClockLow;
|
||||
UCHAR ucEngineClockHigh;
|
||||
|
||||
USHORT usMemoryClockLow;
|
||||
UCHAR ucMemoryClockHigh;
|
||||
|
||||
UCHAR ucPCIEGen;
|
||||
USHORT usPCIELane;
|
||||
} ATOM_PPLIB_CI_CLOCK_INFO;
|
||||
|
||||
typedef struct _ATOM_PPLIB_SUMO_CLOCK_INFO{
|
||||
USHORT usEngineClockLow; //clockfrequency & 0xFFFF. The unit is in 10khz
|
||||
UCHAR ucEngineClockHigh; //clockfrequency >> 16.
|
||||
UCHAR vddcIndex; //2-bit vddc index;
|
||||
USHORT tdpLimit;
|
||||
//please initalize to 0
|
||||
USHORT rsv1;
|
||||
//please initialize to 0s
|
||||
ULONG rsv2[2];
|
||||
}ATOM_PPLIB_SUMO_CLOCK_INFO;
|
||||
|
||||
typedef struct _ATOM_PPLIB_CZ_CLOCK_INFO {
|
||||
UCHAR index;
|
||||
UCHAR rsv[3];
|
||||
} ATOM_PPLIB_CZ_CLOCK_INFO;
|
||||
|
||||
typedef struct _ATOM_PPLIB_STATE_V2
|
||||
{
|
||||
//number of valid dpm levels in this state; Driver uses it to calculate the whole
|
||||
//size of the state: sizeof(ATOM_PPLIB_STATE_V2) + (ucNumDPMLevels - 1) * sizeof(UCHAR)
|
||||
UCHAR ucNumDPMLevels;
|
||||
|
||||
//a index to the array of nonClockInfos
|
||||
UCHAR nonClockInfoIndex;
|
||||
/**
|
||||
* Driver will read the first ucNumDPMLevels in this array
|
||||
*/
|
||||
UCHAR clockInfoIndex[1];
|
||||
} ATOM_PPLIB_STATE_V2;
|
||||
|
||||
typedef struct _StateArray{
|
||||
//how many states we have
|
||||
UCHAR ucNumEntries;
|
||||
|
||||
ATOM_PPLIB_STATE_V2 states[1];
|
||||
}StateArray;
|
||||
|
||||
|
||||
typedef struct _ClockInfoArray{
|
||||
//how many clock levels we have
|
||||
UCHAR ucNumEntries;
|
||||
|
||||
//sizeof(ATOM_PPLIB_CLOCK_INFO)
|
||||
UCHAR ucEntrySize;
|
||||
|
||||
UCHAR clockInfo[1];
|
||||
}ClockInfoArray;
|
||||
|
||||
typedef struct _NonClockInfoArray{
|
||||
|
||||
//how many non-clock levels we have. normally should be same as number of states
|
||||
UCHAR ucNumEntries;
|
||||
//sizeof(ATOM_PPLIB_NONCLOCK_INFO)
|
||||
UCHAR ucEntrySize;
|
||||
|
||||
ATOM_PPLIB_NONCLOCK_INFO nonClockInfo[1];
|
||||
}NonClockInfoArray;
|
||||
|
||||
typedef struct _ATOM_PPLIB_Clock_Voltage_Dependency_Record
|
||||
{
|
||||
USHORT usClockLow;
|
||||
UCHAR ucClockHigh;
|
||||
USHORT usVoltage;
|
||||
}ATOM_PPLIB_Clock_Voltage_Dependency_Record;
|
||||
|
||||
typedef struct _ATOM_PPLIB_Clock_Voltage_Dependency_Table
|
||||
{
|
||||
UCHAR ucNumEntries; // Number of entries.
|
||||
ATOM_PPLIB_Clock_Voltage_Dependency_Record entries[1]; // Dynamically allocate entries.
|
||||
}ATOM_PPLIB_Clock_Voltage_Dependency_Table;
|
||||
|
||||
typedef struct _ATOM_PPLIB_Clock_Voltage_Limit_Record
|
||||
{
|
||||
USHORT usSclkLow;
|
||||
UCHAR ucSclkHigh;
|
||||
USHORT usMclkLow;
|
||||
UCHAR ucMclkHigh;
|
||||
USHORT usVddc;
|
||||
USHORT usVddci;
|
||||
}ATOM_PPLIB_Clock_Voltage_Limit_Record;
|
||||
|
||||
typedef struct _ATOM_PPLIB_Clock_Voltage_Limit_Table
|
||||
{
|
||||
UCHAR ucNumEntries; // Number of entries.
|
||||
ATOM_PPLIB_Clock_Voltage_Limit_Record entries[1]; // Dynamically allocate entries.
|
||||
}ATOM_PPLIB_Clock_Voltage_Limit_Table;
|
||||
|
||||
union _ATOM_PPLIB_CAC_Leakage_Record
|
||||
{
|
||||
struct
|
||||
{
|
||||
USHORT usVddc; // We use this field for the "fake" standardized VDDC for power calculations; For CI and newer, we use this as the real VDDC value. in CI we read it as StdVoltageHiSidd
|
||||
ULONG ulLeakageValue; // For CI and newer we use this as the "fake" standar VDDC value. in CI we read it as StdVoltageLoSidd
|
||||
|
||||
};
|
||||
struct
|
||||
{
|
||||
USHORT usVddc1;
|
||||
USHORT usVddc2;
|
||||
USHORT usVddc3;
|
||||
};
|
||||
};
|
||||
|
||||
typedef union _ATOM_PPLIB_CAC_Leakage_Record ATOM_PPLIB_CAC_Leakage_Record;
|
||||
|
||||
typedef struct _ATOM_PPLIB_CAC_Leakage_Table
|
||||
{
|
||||
UCHAR ucNumEntries; // Number of entries.
|
||||
ATOM_PPLIB_CAC_Leakage_Record entries[1]; // Dynamically allocate entries.
|
||||
}ATOM_PPLIB_CAC_Leakage_Table;
|
||||
|
||||
typedef struct _ATOM_PPLIB_PhaseSheddingLimits_Record
|
||||
{
|
||||
USHORT usVoltage;
|
||||
USHORT usSclkLow;
|
||||
UCHAR ucSclkHigh;
|
||||
USHORT usMclkLow;
|
||||
UCHAR ucMclkHigh;
|
||||
}ATOM_PPLIB_PhaseSheddingLimits_Record;
|
||||
|
||||
typedef struct _ATOM_PPLIB_PhaseSheddingLimits_Table
|
||||
{
|
||||
UCHAR ucNumEntries; // Number of entries.
|
||||
ATOM_PPLIB_PhaseSheddingLimits_Record entries[1]; // Dynamically allocate entries.
|
||||
}ATOM_PPLIB_PhaseSheddingLimits_Table;
|
||||
|
||||
typedef struct _VCEClockInfo{
|
||||
USHORT usEVClkLow;
|
||||
UCHAR ucEVClkHigh;
|
||||
USHORT usECClkLow;
|
||||
UCHAR ucECClkHigh;
|
||||
}VCEClockInfo;
|
||||
|
||||
typedef struct _VCEClockInfoArray{
|
||||
UCHAR ucNumEntries;
|
||||
VCEClockInfo entries[1];
|
||||
}VCEClockInfoArray;
|
||||
|
||||
typedef struct _ATOM_PPLIB_VCE_Clock_Voltage_Limit_Record
|
||||
{
|
||||
USHORT usVoltage;
|
||||
UCHAR ucVCEClockInfoIndex;
|
||||
}ATOM_PPLIB_VCE_Clock_Voltage_Limit_Record;
|
||||
|
||||
typedef struct _ATOM_PPLIB_VCE_Clock_Voltage_Limit_Table
|
||||
{
|
||||
UCHAR numEntries;
|
||||
ATOM_PPLIB_VCE_Clock_Voltage_Limit_Record entries[1];
|
||||
}ATOM_PPLIB_VCE_Clock_Voltage_Limit_Table;
|
||||
|
||||
typedef struct _ATOM_PPLIB_VCE_State_Record
|
||||
{
|
||||
UCHAR ucVCEClockInfoIndex;
|
||||
UCHAR ucClockInfoIndex; //highest 2 bits indicates memory p-states, lower 6bits indicates index to ClockInfoArrary
|
||||
}ATOM_PPLIB_VCE_State_Record;
|
||||
|
||||
typedef struct _ATOM_PPLIB_VCE_State_Table
|
||||
{
|
||||
UCHAR numEntries;
|
||||
ATOM_PPLIB_VCE_State_Record entries[1];
|
||||
}ATOM_PPLIB_VCE_State_Table;
|
||||
|
||||
|
||||
typedef struct _ATOM_PPLIB_VCE_Table
|
||||
{
|
||||
UCHAR revid;
|
||||
// VCEClockInfoArray array;
|
||||
// ATOM_PPLIB_VCE_Clock_Voltage_Limit_Table limits;
|
||||
// ATOM_PPLIB_VCE_State_Table states;
|
||||
}ATOM_PPLIB_VCE_Table;
|
||||
|
||||
|
||||
typedef struct _UVDClockInfo{
|
||||
USHORT usVClkLow;
|
||||
UCHAR ucVClkHigh;
|
||||
USHORT usDClkLow;
|
||||
UCHAR ucDClkHigh;
|
||||
}UVDClockInfo;
|
||||
|
||||
typedef struct _UVDClockInfoArray{
|
||||
UCHAR ucNumEntries;
|
||||
UVDClockInfo entries[1];
|
||||
}UVDClockInfoArray;
|
||||
|
||||
typedef struct _ATOM_PPLIB_UVD_Clock_Voltage_Limit_Record
|
||||
{
|
||||
USHORT usVoltage;
|
||||
UCHAR ucUVDClockInfoIndex;
|
||||
}ATOM_PPLIB_UVD_Clock_Voltage_Limit_Record;
|
||||
|
||||
typedef struct _ATOM_PPLIB_UVD_Clock_Voltage_Limit_Table
|
||||
{
|
||||
UCHAR numEntries;
|
||||
ATOM_PPLIB_UVD_Clock_Voltage_Limit_Record entries[1];
|
||||
}ATOM_PPLIB_UVD_Clock_Voltage_Limit_Table;
|
||||
|
||||
typedef struct _ATOM_PPLIB_UVD_Table
|
||||
{
|
||||
UCHAR revid;
|
||||
// UVDClockInfoArray array;
|
||||
// ATOM_PPLIB_UVD_Clock_Voltage_Limit_Table limits;
|
||||
}ATOM_PPLIB_UVD_Table;
|
||||
|
||||
typedef struct _ATOM_PPLIB_SAMClk_Voltage_Limit_Record
|
||||
{
|
||||
USHORT usVoltage;
|
||||
USHORT usSAMClockLow;
|
||||
UCHAR ucSAMClockHigh;
|
||||
}ATOM_PPLIB_SAMClk_Voltage_Limit_Record;
|
||||
|
||||
typedef struct _ATOM_PPLIB_SAMClk_Voltage_Limit_Table{
|
||||
UCHAR numEntries;
|
||||
ATOM_PPLIB_SAMClk_Voltage_Limit_Record entries[1];
|
||||
}ATOM_PPLIB_SAMClk_Voltage_Limit_Table;
|
||||
|
||||
typedef struct _ATOM_PPLIB_SAMU_Table
|
||||
{
|
||||
UCHAR revid;
|
||||
ATOM_PPLIB_SAMClk_Voltage_Limit_Table limits;
|
||||
}ATOM_PPLIB_SAMU_Table;
|
||||
|
||||
typedef struct _ATOM_PPLIB_ACPClk_Voltage_Limit_Record
|
||||
{
|
||||
USHORT usVoltage;
|
||||
USHORT usACPClockLow;
|
||||
UCHAR ucACPClockHigh;
|
||||
}ATOM_PPLIB_ACPClk_Voltage_Limit_Record;
|
||||
|
||||
typedef struct _ATOM_PPLIB_ACPClk_Voltage_Limit_Table{
|
||||
UCHAR numEntries;
|
||||
ATOM_PPLIB_ACPClk_Voltage_Limit_Record entries[1];
|
||||
}ATOM_PPLIB_ACPClk_Voltage_Limit_Table;
|
||||
|
||||
typedef struct _ATOM_PPLIB_ACP_Table
|
||||
{
|
||||
UCHAR revid;
|
||||
ATOM_PPLIB_ACPClk_Voltage_Limit_Table limits;
|
||||
}ATOM_PPLIB_ACP_Table;
|
||||
|
||||
typedef struct _ATOM_PowerTune_Table{
|
||||
USHORT usTDP;
|
||||
USHORT usConfigurableTDP;
|
||||
USHORT usTDC;
|
||||
USHORT usBatteryPowerLimit;
|
||||
USHORT usSmallPowerLimit;
|
||||
USHORT usLowCACLeakage;
|
||||
USHORT usHighCACLeakage;
|
||||
}ATOM_PowerTune_Table;
|
||||
|
||||
typedef struct _ATOM_PPLIB_POWERTUNE_Table
|
||||
{
|
||||
UCHAR revid;
|
||||
ATOM_PowerTune_Table power_tune_table;
|
||||
}ATOM_PPLIB_POWERTUNE_Table;
|
||||
|
||||
typedef struct _ATOM_PPLIB_POWERTUNE_Table_V1
|
||||
{
|
||||
UCHAR revid;
|
||||
ATOM_PowerTune_Table power_tune_table;
|
||||
USHORT usMaximumPowerDeliveryLimit;
|
||||
USHORT usReserve[7];
|
||||
} ATOM_PPLIB_POWERTUNE_Table_V1;
|
||||
|
||||
#define ATOM_PPM_A_A 1
|
||||
#define ATOM_PPM_A_I 2
|
||||
typedef struct _ATOM_PPLIB_PPM_Table
|
||||
{
|
||||
UCHAR ucRevId;
|
||||
UCHAR ucPpmDesign; //A+I or A+A
|
||||
USHORT usCpuCoreNumber;
|
||||
ULONG ulPlatformTDP;
|
||||
ULONG ulSmallACPlatformTDP;
|
||||
ULONG ulPlatformTDC;
|
||||
ULONG ulSmallACPlatformTDC;
|
||||
ULONG ulApuTDP;
|
||||
ULONG ulDGpuTDP;
|
||||
ULONG ulDGpuUlvPower;
|
||||
ULONG ulTjmax;
|
||||
} ATOM_PPLIB_PPM_Table;
|
||||
|
||||
#pragma pack()
|
||||
|
||||
#endif
|
||||
Loading…
Reference in New Issue
Block a user