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[XTENSA] Fix cache flush macro for D$/I$ aliasing/non-aliasing

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For configurations that have aliasing in the data cache but
not in the instruction cache, we don't need to flush the
instruction cache. Thus, we didn't define the macros to
flush the instruction cache. Some cache-flush functions,
howerver, were using those macros.

Signed-off-by: Chris Zankel <chris@zankel.net>
This commit is contained in:
Chris Zankel 2008-01-18 16:15:29 -08:00
parent 679262578b
commit 9f8fcf38e8
1 changed files with 2 additions and 0 deletions
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2
include/asm-xtensa/cacheflush.h
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@ -70,6 +70,8 @@ extern void __flush_invalidate_dcache_page_alias(unsigned long, unsigned long);
#endif
#if (ICACHE_WAY_SIZE > PAGE_SIZE)
extern void __invalidate_icache_page_alias(unsigned long, unsigned long);
#else
# define __invalidate_icache_page_alias(v,p) do { } while(0)
#endif
/*