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ARM: 8817/1: mm: skip cleaning of idmap page tables on LPAE capable cores
Currently, init_static_idmap() installs some page table entries to cover the identity mapped part of the kernel image (which is only about 160 bytes in size in a multi_v7_defconfig Thumb2 build), and calls flush_cache_louis() to ensure that the updates are visible to the page table walker on the same core. When running under virtualization, flush_cache_louis() may take more than 10 seconds to complete: [ 0.108192] Setting up static identity map for 0x40300000 - 0x403000a0 [ 13.078127] rcu: Hierarchical SRCU implementation. This is due to the fact that set/way ops are not virtualizable, and so KVM may trap each one, resulting in a substantial delay. Since only LPAE capable CPUs may execute under virtualization, and considering that LPAE capable CPUs are guaranteed to have cache coherent page table walkers (per the architecture), let's only perform this cache maintenance on non-LPAE cores. Cc: Will Deacon <will.deacon@arm.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
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@ -6,6 +6,7 @@
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#include <asm/cputype.h>
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#include <asm/idmap.h>
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#include <asm/hwcap.h>
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#include <asm/pgalloc.h>
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#include <asm/pgtable.h>
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#include <asm/sections.h>
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@ -110,7 +111,8 @@ static int __init init_static_idmap(void)
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__idmap_text_end, 0);
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/* Flush L1 for the hardware to see this page table content */
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flush_cache_louis();
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if (!(elf_hwcap & HWCAP_LPAE))
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flush_cache_louis();
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return 0;
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}
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