Merge tag 'topic/synopsys-media-formats-2017-04-03' of git://anongit.freedesktop.org/git/drm-misc into drm-misc-next

Media formats for synopsys HDMI  TX Controller

Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: http://patchwork.freedesktop.org/patch/msgid/20170403163544.kcw5kk52tgku5xua@art_vandelay
This commit is contained in:
Sean Paul 2017-04-04 11:34:30 -04:00
commit 9eb8902e27
211 changed files with 4801 additions and 1292 deletions

View File

@ -1725,6 +1725,12 @@
kernel and module base offset ASLR (Address Space kernel and module base offset ASLR (Address Space
Layout Randomization). Layout Randomization).
kasan_multi_shot
[KNL] Enforce KASAN (Kernel Address Sanitizer) to print
report on every invalid memory access. Without this
parameter KASAN will print report only for the first
invalid access.
keepinitrd [HW,ARM] keepinitrd [HW,ARM]
kernelcore= [KNL,X86,IA-64,PPC] kernelcore= [KNL,X86,IA-64,PPC]

View File

@ -12,7 +12,8 @@ Required properties:
- reg : Offset and length of the register set for the module - reg : Offset and length of the register set for the module
- interrupts : the interrupt number for the RNG module. - interrupts : the interrupt number for the RNG module.
Used for "ti,omap4-rng" and "inside-secure,safexcel-eip76" Used for "ti,omap4-rng" and "inside-secure,safexcel-eip76"
- clocks: the trng clock source - clocks: the trng clock source. Only mandatory for the
"inside-secure,safexcel-eip76" compatible.
Example: Example:
/* AM335x */ /* AM335x */

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@ -1258,6 +1258,319 @@ The following tables list existing packed RGB formats.
- b\ :sub:`2` - b\ :sub:`2`
- b\ :sub:`1` - b\ :sub:`1`
- b\ :sub:`0` - b\ :sub:`0`
* .. _MEDIA-BUS-FMT-RGB101010-1X30:
- MEDIA_BUS_FMT_RGB101010_1X30
- 0x1018
-
- 0
- 0
- r\ :sub:`9`
- r\ :sub:`8`
- r\ :sub:`7`
- r\ :sub:`6`
- r\ :sub:`5`
- r\ :sub:`4`
- r\ :sub:`3`
- r\ :sub:`2`
- r\ :sub:`1`
- r\ :sub:`0`
- g\ :sub:`9`
- g\ :sub:`8`
- g\ :sub:`7`
- g\ :sub:`6`
- g\ :sub:`5`
- g\ :sub:`4`
- g\ :sub:`3`
- g\ :sub:`2`
- g\ :sub:`1`
- g\ :sub:`0`
- b\ :sub:`9`
- b\ :sub:`8`
- b\ :sub:`7`
- b\ :sub:`6`
- b\ :sub:`5`
- b\ :sub:`4`
- b\ :sub:`3`
- b\ :sub:`2`
- b\ :sub:`1`
- b\ :sub:`0`
.. raw:: latex
\endgroup
The following table list existing packed 36bit wide RGB formats.
.. tabularcolumns:: |p{4.0cm}|p{0.7cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|
.. _v4l2-mbus-pixelcode-rgb-36:
.. raw:: latex
\begingroup
\tiny
\setlength{\tabcolsep}{2pt}
.. flat-table:: 36bit RGB formats
:header-rows: 2
:stub-columns: 0
:widths: 36 7 3 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
* - Identifier
- Code
-
- :cspan:`35` Data organization
* -
-
- Bit
- 35
- 34
- 33
- 32
- 31
- 30
- 29
- 28
- 27
- 26
- 25
- 24
- 23
- 22
- 21
- 20
- 19
- 18
- 17
- 16
- 15
- 14
- 13
- 12
- 11
- 10
- 9
- 8
- 7
- 6
- 5
- 4
- 3
- 2
- 1
- 0
* .. _MEDIA-BUS-FMT-RGB121212-1X36:
- MEDIA_BUS_FMT_RGB121212_1X36
- 0x1019
-
- r\ :sub:`11`
- r\ :sub:`10`
- r\ :sub:`9`
- r\ :sub:`8`
- r\ :sub:`7`
- r\ :sub:`6`
- r\ :sub:`5`
- r\ :sub:`4`
- r\ :sub:`3`
- r\ :sub:`2`
- r\ :sub:`1`
- r\ :sub:`0`
- g\ :sub:`11`
- g\ :sub:`10`
- g\ :sub:`9`
- g\ :sub:`8`
- g\ :sub:`7`
- g\ :sub:`6`
- g\ :sub:`5`
- g\ :sub:`4`
- g\ :sub:`3`
- g\ :sub:`2`
- g\ :sub:`1`
- g\ :sub:`0`
- b\ :sub:`11`
- b\ :sub:`10`
- b\ :sub:`9`
- b\ :sub:`8`
- b\ :sub:`7`
- b\ :sub:`6`
- b\ :sub:`5`
- b\ :sub:`4`
- b\ :sub:`3`
- b\ :sub:`2`
- b\ :sub:`1`
- b\ :sub:`0`
.. raw:: latex
\endgroup
The following table list existing packed 48bit wide RGB formats.
.. tabularcolumns:: |p{4.0cm}|p{0.7cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|
.. _v4l2-mbus-pixelcode-rgb-48:
.. raw:: latex
\begingroup
\tiny
\setlength{\tabcolsep}{2pt}
.. flat-table:: 48bit RGB formats
:header-rows: 3
:stub-columns: 0
:widths: 36 7 3 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
* - Identifier
- Code
-
- :cspan:`31` Data organization
* -
-
- Bit
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
- 47
- 46
- 45
- 44
- 43
- 42
- 41
- 40
- 39
- 38
- 37
- 36
- 35
- 34
- 33
- 32
* -
-
-
- 31
- 30
- 29
- 28
- 27
- 26
- 25
- 24
- 23
- 22
- 21
- 20
- 19
- 18
- 17
- 16
- 15
- 14
- 13
- 12
- 11
- 10
- 9
- 8
- 7
- 6
- 5
- 4
- 3
- 2
- 1
- 0
* .. _MEDIA-BUS-FMT-RGB161616-1X48:
- MEDIA_BUS_FMT_RGB161616_1X48
- 0x101a
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
- r\ :sub:`15`
- r\ :sub:`14`
- r\ :sub:`13`
- r\ :sub:`12`
- r\ :sub:`11`
- r\ :sub:`10`
- r\ :sub:`9`
- r\ :sub:`8`
- r\ :sub:`7`
- r\ :sub:`6`
- r\ :sub:`5`
- r\ :sub:`4`
- r\ :sub:`3`
- r\ :sub:`2`
- r\ :sub:`1`
- r\ :sub:`0`
* -
-
-
- g\ :sub:`15`
- g\ :sub:`14`
- g\ :sub:`13`
- g\ :sub:`12`
- g\ :sub:`11`
- g\ :sub:`10`
- g\ :sub:`9`
- g\ :sub:`8`
- g\ :sub:`7`
- g\ :sub:`6`
- g\ :sub:`5`
- g\ :sub:`4`
- g\ :sub:`3`
- g\ :sub:`2`
- g\ :sub:`1`
- g\ :sub:`0`
- b\ :sub:`15`
- b\ :sub:`14`
- b\ :sub:`13`
- b\ :sub:`12`
- b\ :sub:`11`
- b\ :sub:`10`
- b\ :sub:`9`
- b\ :sub:`8`
- b\ :sub:`7`
- b\ :sub:`6`
- b\ :sub:`5`
- b\ :sub:`4`
- b\ :sub:`3`
- b\ :sub:`2`
- b\ :sub:`1`
- b\ :sub:`0`
.. raw:: latex .. raw:: latex
@ -2344,7 +2657,8 @@ The format code is made of the following information.
- The number of bus samples per pixel. Pixels that are wider than the - The number of bus samples per pixel. Pixels that are wider than the
bus width must be transferred in multiple samples. Common values are bus width must be transferred in multiple samples. Common values are
1, 1.5 (encoded as 1_5) and 2. 0.5 (encoded as 0_5; in this case two pixels are transferred per bus
sample), 1, 1.5 (encoded as 1_5) and 2.
- The bus width. When the bus width is larger than the number of bits - The bus width. When the bus width is larger than the number of bits
per pixel component, several components are packed in a single bus per pixel component, several components are packed in a single bus
@ -5962,6 +6276,78 @@ the following codes.
- v\ :sub:`2` - v\ :sub:`2`
- v\ :sub:`1` - v\ :sub:`1`
- v\ :sub:`0` - v\ :sub:`0`
* .. _MEDIA-BUS-FMT-UYYVYY8-0-5X24:
- MEDIA_BUS_FMT_UYYVYY8_0_5X24
- 0x2026
-
-
-
-
-
-
-
-
-
- u\ :sub:`7`
- u\ :sub:`6`
- u\ :sub:`5`
- u\ :sub:`4`
- u\ :sub:`3`
- u\ :sub:`2`
- u\ :sub:`1`
- u\ :sub:`0`
- y\ :sub:`7`
- y\ :sub:`6`
- y\ :sub:`5`
- y\ :sub:`4`
- y\ :sub:`3`
- y\ :sub:`2`
- y\ :sub:`1`
- y\ :sub:`0`
- y\ :sub:`7`
- y\ :sub:`6`
- y\ :sub:`5`
- y\ :sub:`4`
- y\ :sub:`3`
- y\ :sub:`2`
- y\ :sub:`1`
- y\ :sub:`0`
* -
-
-
-
-
-
-
-
-
-
-
- v\ :sub:`7`
- v\ :sub:`6`
- v\ :sub:`5`
- v\ :sub:`4`
- v\ :sub:`3`
- v\ :sub:`2`
- v\ :sub:`1`
- v\ :sub:`0`
- y\ :sub:`7`
- y\ :sub:`6`
- y\ :sub:`5`
- y\ :sub:`4`
- y\ :sub:`3`
- y\ :sub:`2`
- y\ :sub:`1`
- y\ :sub:`0`
- y\ :sub:`7`
- y\ :sub:`6`
- y\ :sub:`5`
- y\ :sub:`4`
- y\ :sub:`3`
- y\ :sub:`2`
- y\ :sub:`1`
- y\ :sub:`0`
* .. _MEDIA-BUS-FMT-UYVY12-1X24: * .. _MEDIA-BUS-FMT-UYVY12-1X24:
- MEDIA_BUS_FMT_UYVY12_1X24 - MEDIA_BUS_FMT_UYVY12_1X24
@ -6287,6 +6673,78 @@ the following codes.
- v\ :sub:`2` - v\ :sub:`2`
- v\ :sub:`1` - v\ :sub:`1`
- v\ :sub:`0` - v\ :sub:`0`
* .. _MEDIA-BUS-FMT-UYYVYY10-0-5X30:
- MEDIA_BUS_FMT_UYYVYY10_0_5X30
- 0x2027
-
-
-
- u\ :sub:`9`
- u\ :sub:`8`
- u\ :sub:`7`
- u\ :sub:`6`
- u\ :sub:`5`
- u\ :sub:`4`
- u\ :sub:`3`
- u\ :sub:`2`
- u\ :sub:`1`
- u\ :sub:`0`
- y\ :sub:`9`
- y\ :sub:`8`
- y\ :sub:`7`
- y\ :sub:`6`
- y\ :sub:`5`
- y\ :sub:`4`
- y\ :sub:`3`
- y\ :sub:`2`
- y\ :sub:`1`
- y\ :sub:`0`
- y\ :sub:`9`
- y\ :sub:`8`
- y\ :sub:`7`
- y\ :sub:`6`
- y\ :sub:`5`
- y\ :sub:`4`
- y\ :sub:`3`
- y\ :sub:`2`
- y\ :sub:`1`
- y\ :sub:`0`
* -
-
-
-
-
- v\ :sub:`9`
- v\ :sub:`8`
- v\ :sub:`7`
- v\ :sub:`6`
- v\ :sub:`5`
- v\ :sub:`4`
- v\ :sub:`3`
- v\ :sub:`2`
- v\ :sub:`1`
- v\ :sub:`0`
- y\ :sub:`9`
- y\ :sub:`8`
- y\ :sub:`7`
- y\ :sub:`6`
- y\ :sub:`5`
- y\ :sub:`4`
- y\ :sub:`3`
- y\ :sub:`2`
- y\ :sub:`1`
- y\ :sub:`0`
- y\ :sub:`9`
- y\ :sub:`8`
- y\ :sub:`7`
- y\ :sub:`6`
- y\ :sub:`5`
- y\ :sub:`4`
- y\ :sub:`3`
- y\ :sub:`2`
- y\ :sub:`1`
- y\ :sub:`0`
* .. _MEDIA-BUS-FMT-AYUV8-1X32: * .. _MEDIA-BUS-FMT-AYUV8-1X32:
- MEDIA_BUS_FMT_AYUV8_1X32 - MEDIA_BUS_FMT_AYUV8_1X32
@ -6326,6 +6784,506 @@ the following codes.
- v\ :sub:`0` - v\ :sub:`0`
.. raw:: latex
\endgroup
The following table list existing packed 36bit wide YUV formats.
.. raw:: latex
\begingroup
\tiny
\setlength{\tabcolsep}{2pt}
.. tabularcolumns:: |p{4.0cm}|p{0.7cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|
.. _v4l2-mbus-pixelcode-yuv8-36bit:
.. flat-table:: 36bit YUV Formats
:header-rows: 2
:stub-columns: 0
:widths: 36 7 3 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
* - Identifier
- Code
-
- :cspan:`35` Data organization
* -
-
- Bit
- 35
- 34
- 33
- 32
- 31
- 30
- 29
- 28
- 27
- 26
- 25
- 24
- 23
- 22
- 21
- 10
- 19
- 18
- 17
- 16
- 15
- 14
- 13
- 12
- 11
- 10
- 9
- 8
- 7
- 6
- 5
- 4
- 3
- 2
- 1
- 0
* .. _MEDIA-BUS-FMT-UYYVYY12-0-5X36:
- MEDIA_BUS_FMT_UYYVYY12_0_5X36
- 0x2028
-
- u\ :sub:`11`
- u\ :sub:`10`
- u\ :sub:`9`
- u\ :sub:`8`
- u\ :sub:`7`
- u\ :sub:`6`
- u\ :sub:`5`
- u\ :sub:`4`
- u\ :sub:`3`
- u\ :sub:`2`
- u\ :sub:`1`
- u\ :sub:`0`
- y\ :sub:`11`
- y\ :sub:`10`
- y\ :sub:`9`
- y\ :sub:`8`
- y\ :sub:`7`
- y\ :sub:`6`
- y\ :sub:`5`
- y\ :sub:`4`
- y\ :sub:`3`
- y\ :sub:`2`
- y\ :sub:`1`
- y\ :sub:`0`
- y\ :sub:`11`
- y\ :sub:`10`
- y\ :sub:`9`
- y\ :sub:`8`
- y\ :sub:`7`
- y\ :sub:`6`
- y\ :sub:`5`
- y\ :sub:`4`
- y\ :sub:`3`
- y\ :sub:`2`
- y\ :sub:`1`
- y\ :sub:`0`
* -
-
-
- v\ :sub:`11`
- v\ :sub:`10`
- v\ :sub:`9`
- v\ :sub:`8`
- v\ :sub:`7`
- v\ :sub:`6`
- v\ :sub:`5`
- v\ :sub:`4`
- v\ :sub:`3`
- v\ :sub:`2`
- v\ :sub:`1`
- v\ :sub:`0`
- y\ :sub:`11`
- y\ :sub:`10`
- y\ :sub:`9`
- y\ :sub:`8`
- y\ :sub:`7`
- y\ :sub:`6`
- y\ :sub:`5`
- y\ :sub:`4`
- y\ :sub:`3`
- y\ :sub:`2`
- y\ :sub:`1`
- y\ :sub:`0`
- y\ :sub:`11`
- y\ :sub:`10`
- y\ :sub:`9`
- y\ :sub:`8`
- y\ :sub:`7`
- y\ :sub:`6`
- y\ :sub:`5`
- y\ :sub:`4`
- y\ :sub:`3`
- y\ :sub:`2`
- y\ :sub:`1`
- y\ :sub:`0`
* .. _MEDIA-BUS-FMT-YUV12-1X36:
- MEDIA_BUS_FMT_YUV12_1X36
- 0x2029
-
- y\ :sub:`11`
- y\ :sub:`10`
- y\ :sub:`9`
- y\ :sub:`8`
- y\ :sub:`7`
- y\ :sub:`6`
- y\ :sub:`5`
- y\ :sub:`4`
- y\ :sub:`3`
- y\ :sub:`2`
- y\ :sub:`1`
- y\ :sub:`0`
- u\ :sub:`11`
- u\ :sub:`10`
- u\ :sub:`9`
- u\ :sub:`8`
- u\ :sub:`7`
- u\ :sub:`6`
- u\ :sub:`5`
- u\ :sub:`4`
- u\ :sub:`3`
- u\ :sub:`2`
- u\ :sub:`1`
- u\ :sub:`0`
- v\ :sub:`11`
- v\ :sub:`10`
- v\ :sub:`9`
- v\ :sub:`8`
- v\ :sub:`7`
- v\ :sub:`6`
- v\ :sub:`5`
- v\ :sub:`4`
- v\ :sub:`3`
- v\ :sub:`2`
- v\ :sub:`1`
- v\ :sub:`0`
.. raw:: latex
\endgroup
The following table list existing packed 48bit wide YUV formats.
.. raw:: latex
\begingroup
\tiny
\setlength{\tabcolsep}{2pt}
.. tabularcolumns:: |p{4.0cm}|p{0.7cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|
.. _v4l2-mbus-pixelcode-yuv8-48bit:
.. flat-table:: 48bit YUV Formats
:header-rows: 3
:stub-columns: 0
:widths: 36 7 3 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
* - Identifier
- Code
-
- :cspan:`31` Data organization
* -
-
- Bit
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
- 47
- 46
- 45
- 44
- 43
- 42
- 41
- 40
- 39
- 38
- 37
- 36
- 35
- 34
- 33
- 32
* -
-
-
- 31
- 30
- 29
- 28
- 27
- 26
- 25
- 24
- 23
- 22
- 21
- 10
- 19
- 18
- 17
- 16
- 15
- 14
- 13
- 12
- 11
- 10
- 9
- 8
- 7
- 6
- 5
- 4
- 3
- 2
- 1
- 0
* .. _MEDIA-BUS-FMT-YUV16-1X48:
- MEDIA_BUS_FMT_YUV16_1X48
- 0x202a
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
- y\ :sub:`15`
- y\ :sub:`14`
- y\ :sub:`13`
- y\ :sub:`12`
- y\ :sub:`11`
- y\ :sub:`10`
- y\ :sub:`8`
- y\ :sub:`8`
- y\ :sub:`7`
- y\ :sub:`6`
- y\ :sub:`5`
- y\ :sub:`4`
- y\ :sub:`3`
- y\ :sub:`2`
- y\ :sub:`1`
- y\ :sub:`0`
* -
-
-
- u\ :sub:`15`
- u\ :sub:`14`
- u\ :sub:`13`
- u\ :sub:`12`
- u\ :sub:`11`
- u\ :sub:`10`
- u\ :sub:`9`
- u\ :sub:`8`
- u\ :sub:`7`
- u\ :sub:`6`
- u\ :sub:`5`
- u\ :sub:`4`
- u\ :sub:`3`
- u\ :sub:`2`
- u\ :sub:`1`
- u\ :sub:`0`
- v\ :sub:`15`
- v\ :sub:`14`
- v\ :sub:`13`
- v\ :sub:`12`
- v\ :sub:`11`
- v\ :sub:`10`
- v\ :sub:`9`
- v\ :sub:`8`
- v\ :sub:`7`
- v\ :sub:`6`
- v\ :sub:`5`
- v\ :sub:`4`
- v\ :sub:`3`
- v\ :sub:`2`
- v\ :sub:`1`
- v\ :sub:`0`
* .. _MEDIA-BUS-FMT-UYYVYY16-0-5X48:
- MEDIA_BUS_FMT_UYYVYY16_0_5X48
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.. raw:: latex .. raw:: latex
\endgroup \endgroup

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@ -3377,6 +3377,69 @@ struct kvm_ppc_resize_hpt {
__u32 pad; __u32 pad;
}; };
4.104 KVM_X86_GET_MCE_CAP_SUPPORTED
Capability: KVM_CAP_MCE
Architectures: x86
Type: system ioctl
Parameters: u64 mce_cap (out)
Returns: 0 on success, -1 on error
Returns supported MCE capabilities. The u64 mce_cap parameter
has the same format as the MSR_IA32_MCG_CAP register. Supported
capabilities will have the corresponding bits set.
4.105 KVM_X86_SETUP_MCE
Capability: KVM_CAP_MCE
Architectures: x86
Type: vcpu ioctl
Parameters: u64 mcg_cap (in)
Returns: 0 on success,
-EFAULT if u64 mcg_cap cannot be read,
-EINVAL if the requested number of banks is invalid,
-EINVAL if requested MCE capability is not supported.
Initializes MCE support for use. The u64 mcg_cap parameter
has the same format as the MSR_IA32_MCG_CAP register and
specifies which capabilities should be enabled. The maximum
supported number of error-reporting banks can be retrieved when
checking for KVM_CAP_MCE. The supported capabilities can be
retrieved with KVM_X86_GET_MCE_CAP_SUPPORTED.
4.106 KVM_X86_SET_MCE
Capability: KVM_CAP_MCE
Architectures: x86
Type: vcpu ioctl
Parameters: struct kvm_x86_mce (in)
Returns: 0 on success,
-EFAULT if struct kvm_x86_mce cannot be read,
-EINVAL if the bank number is invalid,
-EINVAL if VAL bit is not set in status field.
Inject a machine check error (MCE) into the guest. The input
parameter is:
struct kvm_x86_mce {
__u64 status;
__u64 addr;
__u64 misc;
__u64 mcg_status;
__u8 bank;
__u8 pad1[7];
__u64 pad2[3];
};
If the MCE being reported is an uncorrected error, KVM will
inject it as an MCE exception into the guest. If the guest
MCG_STATUS register reports that an MCE is in progress, KVM
causes an KVM_EXIT_SHUTDOWN vmexit.
Otherwise, if the MCE is a corrected error, KVM will just
store it in the corresponding bank (provided this bank is
not holding a previously reported uncorrected error).
5. The kvm_run structure 5. The kvm_run structure
------------------------ ------------------------

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@ -4782,6 +4782,12 @@ L: linux-edac@vger.kernel.org
S: Maintained S: Maintained
F: drivers/edac/mpc85xx_edac.[ch] F: drivers/edac/mpc85xx_edac.[ch]
EDAC-PND2
M: Tony Luck <tony.luck@intel.com>
L: linux-edac@vger.kernel.org
S: Maintained
F: drivers/edac/pnd2_edac.[ch]
EDAC-PASEMI EDAC-PASEMI
M: Egor Martovetsky <egor@pasemi.com> M: Egor Martovetsky <egor@pasemi.com>
L: linux-edac@vger.kernel.org L: linux-edac@vger.kernel.org

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@ -1,7 +1,7 @@
VERSION = 4 VERSION = 4
PATCHLEVEL = 11 PATCHLEVEL = 11
SUBLEVEL = 0 SUBLEVEL = 0
EXTRAVERSION = -rc4 EXTRAVERSION = -rc5
NAME = Fearless Coyote NAME = Fearless Coyote
# *DOCUMENTATION* # *DOCUMENTATION*

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@ -26,6 +26,7 @@
device_type = "cpu"; device_type = "cpu";
compatible = "snps,arc770d"; compatible = "snps,arc770d";
reg = <0>; reg = <0>;
clocks = <&core_clk>;
}; };
}; };

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@ -21,6 +21,7 @@
device_type = "cpu"; device_type = "cpu";
compatible = "snps,archs38"; compatible = "snps,archs38";
reg = <0>; reg = <0>;
clocks = <&core_clk>;
}; };
}; };

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@ -19,8 +19,27 @@
cpu@0 { cpu@0 {
device_type = "cpu"; device_type = "cpu";
compatible = "snps,archs38xN"; compatible = "snps,archs38";
reg = <0>; reg = <0>;
clocks = <&core_clk>;
};
cpu@1 {
device_type = "cpu";
compatible = "snps,archs38";
reg = <1>;
clocks = <&core_clk>;
};
cpu@2 {
device_type = "cpu";
compatible = "snps,archs38";
reg = <2>;
clocks = <&core_clk>;
};
cpu@3 {
device_type = "cpu";
compatible = "snps,archs38";
reg = <3>;
clocks = <&core_clk>;
}; };
}; };

View File

@ -112,13 +112,19 @@
interrupts = <7>; interrupts = <7>;
bus-width = <4>; bus-width = <4>;
}; };
};
/* Embedded Vision subsystem UIO mappings; only relevant for EV VDK */ /*
uio_ev: uio@0xD0000000 { * Embedded Vision subsystem UIO mappings; only relevant for EV VDK
compatible = "generic-uio"; *
reg = <0xD0000000 0x2000 0xD1000000 0x2000 0x90000000 0x10000000 0xC0000000 0x10000000>; * This node is intentionally put outside of MB above becase
reg-names = "ev_gsa", "ev_ctrl", "ev_shared_mem", "ev_code_mem"; * it maps areas outside of MB's 0xEz-0xFz.
interrupts = <23>; */
}; uio_ev: uio@0xD0000000 {
compatible = "generic-uio";
reg = <0xD0000000 0x2000 0xD1000000 0x2000 0x90000000 0x10000000 0xC0000000 0x10000000>;
reg-names = "ev_gsa", "ev_ctrl", "ev_shared_mem", "ev_code_mem";
interrupt-parent = <&mb_intc>;
interrupts = <23>;
}; };
}; };

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@ -54,9 +54,7 @@ int kprobe_fault_handler(struct pt_regs *regs, unsigned long cause);
void kretprobe_trampoline(void); void kretprobe_trampoline(void);
void trap_is_kprobe(unsigned long address, struct pt_regs *regs); void trap_is_kprobe(unsigned long address, struct pt_regs *regs);
#else #else
static void trap_is_kprobe(unsigned long address, struct pt_regs *regs) #define trap_is_kprobe(address, regs)
{
}
#endif /* CONFIG_KPROBES */ #endif /* CONFIG_KPROBES */
#endif /* _ARC_KPROBES_H */ #endif /* _ARC_KPROBES_H */

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@ -100,15 +100,21 @@ END(handle_interrupt)
;################### Non TLB Exception Handling ############################# ;################### Non TLB Exception Handling #############################
ENTRY(EV_SWI) ENTRY(EV_SWI)
flag 1 ; TODO: implement this
EXCEPTION_PROLOGUE
b ret_from_exception
END(EV_SWI) END(EV_SWI)
ENTRY(EV_DivZero) ENTRY(EV_DivZero)
flag 1 ; TODO: implement this
EXCEPTION_PROLOGUE
b ret_from_exception
END(EV_DivZero) END(EV_DivZero)
ENTRY(EV_DCError) ENTRY(EV_DCError)
flag 1 ; TODO: implement this
EXCEPTION_PROLOGUE
b ret_from_exception
END(EV_DCError) END(EV_DCError)
; --------------------------------------------- ; ---------------------------------------------

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@ -10,6 +10,7 @@
#include <linux/fs.h> #include <linux/fs.h>
#include <linux/delay.h> #include <linux/delay.h>
#include <linux/root_dev.h> #include <linux/root_dev.h>
#include <linux/clk.h>
#include <linux/clk-provider.h> #include <linux/clk-provider.h>
#include <linux/clocksource.h> #include <linux/clocksource.h>
#include <linux/console.h> #include <linux/console.h>
@ -488,8 +489,9 @@ static int show_cpuinfo(struct seq_file *m, void *v)
{ {
char *str; char *str;
int cpu_id = ptr_to_cpu(v); int cpu_id = ptr_to_cpu(v);
struct device_node *core_clk = of_find_node_by_name(NULL, "core_clk"); struct device *cpu_dev = get_cpu_device(cpu_id);
u32 freq = 0; struct clk *cpu_clk;
unsigned long freq = 0;
if (!cpu_online(cpu_id)) { if (!cpu_online(cpu_id)) {
seq_printf(m, "processor [%d]\t: Offline\n", cpu_id); seq_printf(m, "processor [%d]\t: Offline\n", cpu_id);
@ -502,9 +504,15 @@ static int show_cpuinfo(struct seq_file *m, void *v)
seq_printf(m, arc_cpu_mumbojumbo(cpu_id, str, PAGE_SIZE)); seq_printf(m, arc_cpu_mumbojumbo(cpu_id, str, PAGE_SIZE));
of_property_read_u32(core_clk, "clock-frequency", &freq); cpu_clk = clk_get(cpu_dev, NULL);
if (IS_ERR(cpu_clk)) {
seq_printf(m, "CPU speed \t: Cannot get clock for processor [%d]\n",
cpu_id);
} else {
freq = clk_get_rate(cpu_clk);
}
if (freq) if (freq)
seq_printf(m, "CPU speed\t: %u.%02u Mhz\n", seq_printf(m, "CPU speed\t: %lu.%02lu Mhz\n",
freq / 1000000, (freq / 10000) % 100); freq / 1000000, (freq / 10000) % 100);
seq_printf(m, "Bogo MIPS\t: %lu.%02lu\n", seq_printf(m, "Bogo MIPS\t: %lu.%02lu\n",

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@ -633,6 +633,9 @@ noinline static void slc_entire_op(const int op)
write_aux_reg(ARC_REG_SLC_INVALIDATE, 1); write_aux_reg(ARC_REG_SLC_INVALIDATE, 1);
/* Make sure "busy" bit reports correct stataus, see STAR 9001165532 */
read_aux_reg(r);
/* Important to wait for flush to complete */ /* Important to wait for flush to complete */
while (read_aux_reg(r) & SLC_CTRL_BUSY); while (read_aux_reg(r) & SLC_CTRL_BUSY);
} }

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@ -113,8 +113,8 @@
simple-audio-card,mclk-fs = <512>; simple-audio-card,mclk-fs = <512>;
simple-audio-card,aux-devs = <&codec_analog>; simple-audio-card,aux-devs = <&codec_analog>;
simple-audio-card,routing = simple-audio-card,routing =
"Left DAC", "Digital Left DAC", "Left DAC", "AIF1 Slot 0 Left",
"Right DAC", "Digital Right DAC"; "Right DAC", "AIF1 Slot 0 Right";
status = "disabled"; status = "disabled";
simple-audio-card,cpu { simple-audio-card,cpu {

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@ -3,8 +3,6 @@
#include <linux/compiler.h> #include <linux/compiler.h>
#include <asm/sysreg.h>
#ifndef __ASSEMBLY__ #ifndef __ASSEMBLY__
struct task_struct; struct task_struct;

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@ -944,7 +944,7 @@ static bool have_cpu_die(void)
#ifdef CONFIG_HOTPLUG_CPU #ifdef CONFIG_HOTPLUG_CPU
int any_cpu = raw_smp_processor_id(); int any_cpu = raw_smp_processor_id();
if (cpu_ops[any_cpu]->cpu_die) if (cpu_ops[any_cpu] && cpu_ops[any_cpu]->cpu_die)
return true; return true;
#endif #endif
return false; return false;

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@ -1,2 +1 @@
vdso.lds vdso.lds
vdso-offsets.h

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@ -70,46 +70,6 @@ static int gpr_get(struct task_struct *target,
0, sizeof(*regs)); 0, sizeof(*regs));
} }
static int gpr_set(struct task_struct *target,
const struct user_regset *regset,
unsigned int pos, unsigned int count,
const void *kbuf, const void __user *ubuf)
{
int ret;
struct pt_regs *regs = task_pt_regs(target);
/* Don't copyin TSR or CSR */
ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
&regs,
0, PT_TSR * sizeof(long));
if (ret)
return ret;
ret = user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf,
PT_TSR * sizeof(long),
(PT_TSR + 1) * sizeof(long));
if (ret)
return ret;
ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
&regs,
(PT_TSR + 1) * sizeof(long),
PT_CSR * sizeof(long));
if (ret)
return ret;
ret = user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf,
PT_CSR * sizeof(long),
(PT_CSR + 1) * sizeof(long));
if (ret)
return ret;
ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
&regs,
(PT_CSR + 1) * sizeof(long), -1);
return ret;
}
enum c6x_regset { enum c6x_regset {
REGSET_GPR, REGSET_GPR,
}; };
@ -121,7 +81,6 @@ static const struct user_regset c6x_regsets[] = {
.size = sizeof(u32), .size = sizeof(u32),
.align = sizeof(u32), .align = sizeof(u32),
.get = gpr_get, .get = gpr_get,
.set = gpr_set
}, },
}; };

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@ -95,7 +95,8 @@ static int regs_get(struct task_struct *target,
long *reg = (long *)&regs; long *reg = (long *)&regs;
/* build user regs in buffer */ /* build user regs in buffer */
for (r = 0; r < ARRAY_SIZE(register_offset); r++) BUILD_BUG_ON(sizeof(regs) % sizeof(long) != 0);
for (r = 0; r < sizeof(regs) / sizeof(long); r++)
*reg++ = h8300_get_reg(target, r); *reg++ = h8300_get_reg(target, r);
return user_regset_copyout(&pos, &count, &kbuf, &ubuf, return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
@ -113,7 +114,8 @@ static int regs_set(struct task_struct *target,
long *reg; long *reg;
/* build user regs in buffer */ /* build user regs in buffer */
for (reg = (long *)&regs, r = 0; r < ARRAY_SIZE(register_offset); r++) BUILD_BUG_ON(sizeof(regs) % sizeof(long) != 0);
for (reg = (long *)&regs, r = 0; r < sizeof(regs) / sizeof(long); r++)
*reg++ = h8300_get_reg(target, r); *reg++ = h8300_get_reg(target, r);
ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
@ -122,7 +124,7 @@ static int regs_set(struct task_struct *target,
return ret; return ret;
/* write back to pt_regs */ /* write back to pt_regs */
for (reg = (long *)&regs, r = 0; r < ARRAY_SIZE(register_offset); r++) for (reg = (long *)&regs, r = 0; r < sizeof(regs) / sizeof(long); r++)
h8300_put_reg(target, r, *reg++); h8300_put_reg(target, r, *reg++);
return 0; return 0;
} }

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@ -25,6 +25,7 @@ CONFIG_SUN_PARTITION=y
# CONFIG_EFI_PARTITION is not set # CONFIG_EFI_PARTITION is not set
CONFIG_SYSV68_PARTITION=y CONFIG_SYSV68_PARTITION=y
CONFIG_IOSCHED_DEADLINE=m CONFIG_IOSCHED_DEADLINE=m
CONFIG_MQ_IOSCHED_DEADLINE=m
CONFIG_KEXEC=y CONFIG_KEXEC=y
CONFIG_BOOTINFO_PROC=y CONFIG_BOOTINFO_PROC=y
CONFIG_M68020=y CONFIG_M68020=y
@ -60,6 +61,7 @@ CONFIG_NET_IPVTI=m
CONFIG_NET_FOU_IP_TUNNELS=y CONFIG_NET_FOU_IP_TUNNELS=y
CONFIG_INET_AH=m CONFIG_INET_AH=m
CONFIG_INET_ESP=m CONFIG_INET_ESP=m
CONFIG_INET_ESP_OFFLOAD=m
CONFIG_INET_IPCOMP=m CONFIG_INET_IPCOMP=m
CONFIG_INET_XFRM_MODE_TRANSPORT=m CONFIG_INET_XFRM_MODE_TRANSPORT=m
CONFIG_INET_XFRM_MODE_TUNNEL=m CONFIG_INET_XFRM_MODE_TUNNEL=m
@ -71,6 +73,7 @@ CONFIG_IPV6=m
CONFIG_IPV6_ROUTER_PREF=y CONFIG_IPV6_ROUTER_PREF=y
CONFIG_INET6_AH=m CONFIG_INET6_AH=m
CONFIG_INET6_ESP=m CONFIG_INET6_ESP=m
CONFIG_INET6_ESP_OFFLOAD=m
CONFIG_INET6_IPCOMP=m CONFIG_INET6_IPCOMP=m
CONFIG_IPV6_ILA=m CONFIG_IPV6_ILA=m
CONFIG_IPV6_VTI=m CONFIG_IPV6_VTI=m
@ -101,6 +104,7 @@ CONFIG_NFT_NUMGEN=m
CONFIG_NFT_CT=m CONFIG_NFT_CT=m
CONFIG_NFT_SET_RBTREE=m CONFIG_NFT_SET_RBTREE=m
CONFIG_NFT_SET_HASH=m CONFIG_NFT_SET_HASH=m
CONFIG_NFT_SET_BITMAP=m
CONFIG_NFT_COUNTER=m CONFIG_NFT_COUNTER=m
CONFIG_NFT_LOG=m CONFIG_NFT_LOG=m
CONFIG_NFT_LIMIT=m CONFIG_NFT_LIMIT=m
@ -298,6 +302,8 @@ CONFIG_MPLS_IPTUNNEL=m
CONFIG_NET_L3_MASTER_DEV=y CONFIG_NET_L3_MASTER_DEV=y
CONFIG_AF_KCM=m CONFIG_AF_KCM=m
# CONFIG_WIRELESS is not set # CONFIG_WIRELESS is not set
CONFIG_PSAMPLE=m
CONFIG_NET_IFE=m
CONFIG_NET_DEVLINK=m CONFIG_NET_DEVLINK=m
# CONFIG_UEVENT_HELPER is not set # CONFIG_UEVENT_HELPER is not set
CONFIG_DEVTMPFS=y CONFIG_DEVTMPFS=y
@ -371,6 +377,7 @@ CONFIG_NET_TEAM_MODE_LOADBALANCE=m
CONFIG_MACVLAN=m CONFIG_MACVLAN=m
CONFIG_MACVTAP=m CONFIG_MACVTAP=m
CONFIG_IPVLAN=m CONFIG_IPVLAN=m
CONFIG_IPVTAP=m
CONFIG_VXLAN=m CONFIG_VXLAN=m
CONFIG_GENEVE=m CONFIG_GENEVE=m
CONFIG_GTP=m CONFIG_GTP=m
@ -383,6 +390,7 @@ CONFIG_VETH=m
# CONFIG_NET_VENDOR_AMAZON is not set # CONFIG_NET_VENDOR_AMAZON is not set
CONFIG_A2065=y CONFIG_A2065=y
CONFIG_ARIADNE=y CONFIG_ARIADNE=y
# CONFIG_NET_VENDOR_AQUANTIA is not set
# CONFIG_NET_VENDOR_ARC is not set # CONFIG_NET_VENDOR_ARC is not set
# CONFIG_NET_CADENCE is not set # CONFIG_NET_CADENCE is not set
# CONFIG_NET_VENDOR_BROADCOM is not set # CONFIG_NET_VENDOR_BROADCOM is not set
@ -404,7 +412,6 @@ CONFIG_ZORRO8390=y
# CONFIG_NET_VENDOR_SOLARFLARE is not set # CONFIG_NET_VENDOR_SOLARFLARE is not set
# CONFIG_NET_VENDOR_SMSC is not set # CONFIG_NET_VENDOR_SMSC is not set
# CONFIG_NET_VENDOR_STMICRO is not set # CONFIG_NET_VENDOR_STMICRO is not set
# CONFIG_NET_VENDOR_SYNOPSYS is not set
# CONFIG_NET_VENDOR_VIA is not set # CONFIG_NET_VENDOR_VIA is not set
# CONFIG_NET_VENDOR_WIZNET is not set # CONFIG_NET_VENDOR_WIZNET is not set
CONFIG_PPP=m CONFIG_PPP=m
@ -564,6 +571,8 @@ CONFIG_NLS_MAC_TURKISH=m
CONFIG_DLM=m CONFIG_DLM=m
# CONFIG_SECTION_MISMATCH_WARN_ONLY is not set # CONFIG_SECTION_MISMATCH_WARN_ONLY is not set
CONFIG_MAGIC_SYSRQ=y CONFIG_MAGIC_SYSRQ=y
CONFIG_WW_MUTEX_SELFTEST=m
CONFIG_ATOMIC64_SELFTEST=m
CONFIG_ASYNC_RAID6_TEST=m CONFIG_ASYNC_RAID6_TEST=m
CONFIG_TEST_HEXDUMP=m CONFIG_TEST_HEXDUMP=m
CONFIG_TEST_STRING_HELPERS=m CONFIG_TEST_STRING_HELPERS=m
@ -594,6 +603,7 @@ CONFIG_CRYPTO_CHACHA20POLY1305=m
CONFIG_CRYPTO_LRW=m CONFIG_CRYPTO_LRW=m
CONFIG_CRYPTO_PCBC=m CONFIG_CRYPTO_PCBC=m
CONFIG_CRYPTO_KEYWRAP=m CONFIG_CRYPTO_KEYWRAP=m
CONFIG_CRYPTO_CMAC=m
CONFIG_CRYPTO_XCBC=m CONFIG_CRYPTO_XCBC=m
CONFIG_CRYPTO_VMAC=m CONFIG_CRYPTO_VMAC=m
CONFIG_CRYPTO_MICHAEL_MIC=m CONFIG_CRYPTO_MICHAEL_MIC=m
@ -605,6 +615,7 @@ CONFIG_CRYPTO_SHA512=m
CONFIG_CRYPTO_SHA3=m CONFIG_CRYPTO_SHA3=m
CONFIG_CRYPTO_TGR192=m CONFIG_CRYPTO_TGR192=m
CONFIG_CRYPTO_WP512=m CONFIG_CRYPTO_WP512=m
CONFIG_CRYPTO_AES_TI=m
CONFIG_CRYPTO_ANUBIS=m CONFIG_CRYPTO_ANUBIS=m
CONFIG_CRYPTO_BLOWFISH=m CONFIG_CRYPTO_BLOWFISH=m
CONFIG_CRYPTO_CAMELLIA=m CONFIG_CRYPTO_CAMELLIA=m
@ -629,4 +640,5 @@ CONFIG_CRYPTO_USER_API_SKCIPHER=m
CONFIG_CRYPTO_USER_API_RNG=m CONFIG_CRYPTO_USER_API_RNG=m
CONFIG_CRYPTO_USER_API_AEAD=m CONFIG_CRYPTO_USER_API_AEAD=m
# CONFIG_CRYPTO_HW is not set # CONFIG_CRYPTO_HW is not set
CONFIG_CRC32_SELFTEST=m
CONFIG_XZ_DEC_TEST=m CONFIG_XZ_DEC_TEST=m

View File

@ -26,6 +26,7 @@ CONFIG_SUN_PARTITION=y
# CONFIG_EFI_PARTITION is not set # CONFIG_EFI_PARTITION is not set
CONFIG_SYSV68_PARTITION=y CONFIG_SYSV68_PARTITION=y
CONFIG_IOSCHED_DEADLINE=m CONFIG_IOSCHED_DEADLINE=m
CONFIG_MQ_IOSCHED_DEADLINE=m
CONFIG_KEXEC=y CONFIG_KEXEC=y
CONFIG_BOOTINFO_PROC=y CONFIG_BOOTINFO_PROC=y
CONFIG_M68020=y CONFIG_M68020=y
@ -58,6 +59,7 @@ CONFIG_NET_IPVTI=m
CONFIG_NET_FOU_IP_TUNNELS=y CONFIG_NET_FOU_IP_TUNNELS=y
CONFIG_INET_AH=m CONFIG_INET_AH=m
CONFIG_INET_ESP=m CONFIG_INET_ESP=m
CONFIG_INET_ESP_OFFLOAD=m
CONFIG_INET_IPCOMP=m CONFIG_INET_IPCOMP=m
CONFIG_INET_XFRM_MODE_TRANSPORT=m CONFIG_INET_XFRM_MODE_TRANSPORT=m
CONFIG_INET_XFRM_MODE_TUNNEL=m CONFIG_INET_XFRM_MODE_TUNNEL=m
@ -69,6 +71,7 @@ CONFIG_IPV6=m
CONFIG_IPV6_ROUTER_PREF=y CONFIG_IPV6_ROUTER_PREF=y
CONFIG_INET6_AH=m CONFIG_INET6_AH=m
CONFIG_INET6_ESP=m CONFIG_INET6_ESP=m
CONFIG_INET6_ESP_OFFLOAD=m
CONFIG_INET6_IPCOMP=m CONFIG_INET6_IPCOMP=m
CONFIG_IPV6_ILA=m CONFIG_IPV6_ILA=m
CONFIG_IPV6_VTI=m CONFIG_IPV6_VTI=m
@ -99,6 +102,7 @@ CONFIG_NFT_NUMGEN=m
CONFIG_NFT_CT=m CONFIG_NFT_CT=m
CONFIG_NFT_SET_RBTREE=m CONFIG_NFT_SET_RBTREE=m
CONFIG_NFT_SET_HASH=m CONFIG_NFT_SET_HASH=m
CONFIG_NFT_SET_BITMAP=m
CONFIG_NFT_COUNTER=m CONFIG_NFT_COUNTER=m
CONFIG_NFT_LOG=m CONFIG_NFT_LOG=m
CONFIG_NFT_LIMIT=m CONFIG_NFT_LIMIT=m
@ -296,6 +300,8 @@ CONFIG_MPLS_IPTUNNEL=m
CONFIG_NET_L3_MASTER_DEV=y CONFIG_NET_L3_MASTER_DEV=y
CONFIG_AF_KCM=m CONFIG_AF_KCM=m
# CONFIG_WIRELESS is not set # CONFIG_WIRELESS is not set
CONFIG_PSAMPLE=m
CONFIG_NET_IFE=m
CONFIG_NET_DEVLINK=m CONFIG_NET_DEVLINK=m
# CONFIG_UEVENT_HELPER is not set # CONFIG_UEVENT_HELPER is not set
CONFIG_DEVTMPFS=y CONFIG_DEVTMPFS=y
@ -353,6 +359,7 @@ CONFIG_NET_TEAM_MODE_LOADBALANCE=m
CONFIG_MACVLAN=m CONFIG_MACVLAN=m
CONFIG_MACVTAP=m CONFIG_MACVTAP=m
CONFIG_IPVLAN=m CONFIG_IPVLAN=m
CONFIG_IPVTAP=m
CONFIG_VXLAN=m CONFIG_VXLAN=m
CONFIG_GENEVE=m CONFIG_GENEVE=m
CONFIG_GTP=m CONFIG_GTP=m
@ -362,6 +369,7 @@ CONFIG_NETCONSOLE_DYNAMIC=y
CONFIG_VETH=m CONFIG_VETH=m
# CONFIG_NET_VENDOR_ALACRITECH is not set # CONFIG_NET_VENDOR_ALACRITECH is not set
# CONFIG_NET_VENDOR_AMAZON is not set # CONFIG_NET_VENDOR_AMAZON is not set
# CONFIG_NET_VENDOR_AQUANTIA is not set
# CONFIG_NET_VENDOR_ARC is not set # CONFIG_NET_VENDOR_ARC is not set
# CONFIG_NET_CADENCE is not set # CONFIG_NET_CADENCE is not set
# CONFIG_NET_VENDOR_BROADCOM is not set # CONFIG_NET_VENDOR_BROADCOM is not set
@ -378,7 +386,6 @@ CONFIG_VETH=m
# CONFIG_NET_VENDOR_SEEQ is not set # CONFIG_NET_VENDOR_SEEQ is not set
# CONFIG_NET_VENDOR_SOLARFLARE is not set # CONFIG_NET_VENDOR_SOLARFLARE is not set
# CONFIG_NET_VENDOR_STMICRO is not set # CONFIG_NET_VENDOR_STMICRO is not set
# CONFIG_NET_VENDOR_SYNOPSYS is not set
# CONFIG_NET_VENDOR_VIA is not set # CONFIG_NET_VENDOR_VIA is not set
# CONFIG_NET_VENDOR_WIZNET is not set # CONFIG_NET_VENDOR_WIZNET is not set
CONFIG_PPP=m CONFIG_PPP=m
@ -523,6 +530,8 @@ CONFIG_NLS_MAC_TURKISH=m
CONFIG_DLM=m CONFIG_DLM=m
# CONFIG_SECTION_MISMATCH_WARN_ONLY is not set # CONFIG_SECTION_MISMATCH_WARN_ONLY is not set
CONFIG_MAGIC_SYSRQ=y CONFIG_MAGIC_SYSRQ=y
CONFIG_WW_MUTEX_SELFTEST=m
CONFIG_ATOMIC64_SELFTEST=m
CONFIG_ASYNC_RAID6_TEST=m CONFIG_ASYNC_RAID6_TEST=m
CONFIG_TEST_HEXDUMP=m CONFIG_TEST_HEXDUMP=m
CONFIG_TEST_STRING_HELPERS=m CONFIG_TEST_STRING_HELPERS=m
@ -553,6 +562,7 @@ CONFIG_CRYPTO_CHACHA20POLY1305=m
CONFIG_CRYPTO_LRW=m CONFIG_CRYPTO_LRW=m
CONFIG_CRYPTO_PCBC=m CONFIG_CRYPTO_PCBC=m
CONFIG_CRYPTO_KEYWRAP=m CONFIG_CRYPTO_KEYWRAP=m
CONFIG_CRYPTO_CMAC=m
CONFIG_CRYPTO_XCBC=m CONFIG_CRYPTO_XCBC=m
CONFIG_CRYPTO_VMAC=m CONFIG_CRYPTO_VMAC=m
CONFIG_CRYPTO_MICHAEL_MIC=m CONFIG_CRYPTO_MICHAEL_MIC=m
@ -564,6 +574,7 @@ CONFIG_CRYPTO_SHA512=m
CONFIG_CRYPTO_SHA3=m CONFIG_CRYPTO_SHA3=m
CONFIG_CRYPTO_TGR192=m CONFIG_CRYPTO_TGR192=m
CONFIG_CRYPTO_WP512=m CONFIG_CRYPTO_WP512=m
CONFIG_CRYPTO_AES_TI=m
CONFIG_CRYPTO_ANUBIS=m CONFIG_CRYPTO_ANUBIS=m
CONFIG_CRYPTO_BLOWFISH=m CONFIG_CRYPTO_BLOWFISH=m
CONFIG_CRYPTO_CAMELLIA=m CONFIG_CRYPTO_CAMELLIA=m
@ -588,4 +599,5 @@ CONFIG_CRYPTO_USER_API_SKCIPHER=m
CONFIG_CRYPTO_USER_API_RNG=m CONFIG_CRYPTO_USER_API_RNG=m
CONFIG_CRYPTO_USER_API_AEAD=m CONFIG_CRYPTO_USER_API_AEAD=m
# CONFIG_CRYPTO_HW is not set # CONFIG_CRYPTO_HW is not set
CONFIG_CRC32_SELFTEST=m
CONFIG_XZ_DEC_TEST=m CONFIG_XZ_DEC_TEST=m

View File

@ -25,6 +25,7 @@ CONFIG_SUN_PARTITION=y
# CONFIG_EFI_PARTITION is not set # CONFIG_EFI_PARTITION is not set
CONFIG_SYSV68_PARTITION=y CONFIG_SYSV68_PARTITION=y
CONFIG_IOSCHED_DEADLINE=m CONFIG_IOSCHED_DEADLINE=m
CONFIG_MQ_IOSCHED_DEADLINE=m
CONFIG_KEXEC=y CONFIG_KEXEC=y
CONFIG_BOOTINFO_PROC=y CONFIG_BOOTINFO_PROC=y
CONFIG_M68020=y CONFIG_M68020=y
@ -58,6 +59,7 @@ CONFIG_NET_IPVTI=m
CONFIG_NET_FOU_IP_TUNNELS=y CONFIG_NET_FOU_IP_TUNNELS=y
CONFIG_INET_AH=m CONFIG_INET_AH=m
CONFIG_INET_ESP=m CONFIG_INET_ESP=m
CONFIG_INET_ESP_OFFLOAD=m
CONFIG_INET_IPCOMP=m CONFIG_INET_IPCOMP=m
CONFIG_INET_XFRM_MODE_TRANSPORT=m CONFIG_INET_XFRM_MODE_TRANSPORT=m
CONFIG_INET_XFRM_MODE_TUNNEL=m CONFIG_INET_XFRM_MODE_TUNNEL=m
@ -69,6 +71,7 @@ CONFIG_IPV6=m
CONFIG_IPV6_ROUTER_PREF=y CONFIG_IPV6_ROUTER_PREF=y
CONFIG_INET6_AH=m CONFIG_INET6_AH=m
CONFIG_INET6_ESP=m CONFIG_INET6_ESP=m
CONFIG_INET6_ESP_OFFLOAD=m
CONFIG_INET6_IPCOMP=m CONFIG_INET6_IPCOMP=m
CONFIG_IPV6_ILA=m CONFIG_IPV6_ILA=m
CONFIG_IPV6_VTI=m CONFIG_IPV6_VTI=m
@ -99,6 +102,7 @@ CONFIG_NFT_NUMGEN=m
CONFIG_NFT_CT=m CONFIG_NFT_CT=m
CONFIG_NFT_SET_RBTREE=m CONFIG_NFT_SET_RBTREE=m
CONFIG_NFT_SET_HASH=m CONFIG_NFT_SET_HASH=m
CONFIG_NFT_SET_BITMAP=m
CONFIG_NFT_COUNTER=m CONFIG_NFT_COUNTER=m
CONFIG_NFT_LOG=m CONFIG_NFT_LOG=m
CONFIG_NFT_LIMIT=m CONFIG_NFT_LIMIT=m
@ -296,6 +300,8 @@ CONFIG_MPLS_IPTUNNEL=m
CONFIG_NET_L3_MASTER_DEV=y CONFIG_NET_L3_MASTER_DEV=y
CONFIG_AF_KCM=m CONFIG_AF_KCM=m
# CONFIG_WIRELESS is not set # CONFIG_WIRELESS is not set
CONFIG_PSAMPLE=m
CONFIG_NET_IFE=m
CONFIG_NET_DEVLINK=m CONFIG_NET_DEVLINK=m
# CONFIG_UEVENT_HELPER is not set # CONFIG_UEVENT_HELPER is not set
CONFIG_DEVTMPFS=y CONFIG_DEVTMPFS=y
@ -362,6 +368,7 @@ CONFIG_NET_TEAM_MODE_LOADBALANCE=m
CONFIG_MACVLAN=m CONFIG_MACVLAN=m
CONFIG_MACVTAP=m CONFIG_MACVTAP=m
CONFIG_IPVLAN=m CONFIG_IPVLAN=m
CONFIG_IPVTAP=m
CONFIG_VXLAN=m CONFIG_VXLAN=m
CONFIG_GENEVE=m CONFIG_GENEVE=m
CONFIG_GTP=m CONFIG_GTP=m
@ -372,6 +379,7 @@ CONFIG_VETH=m
# CONFIG_NET_VENDOR_ALACRITECH is not set # CONFIG_NET_VENDOR_ALACRITECH is not set
# CONFIG_NET_VENDOR_AMAZON is not set # CONFIG_NET_VENDOR_AMAZON is not set
CONFIG_ATARILANCE=y CONFIG_ATARILANCE=y
# CONFIG_NET_VENDOR_AQUANTIA is not set
# CONFIG_NET_VENDOR_ARC is not set # CONFIG_NET_VENDOR_ARC is not set
# CONFIG_NET_CADENCE is not set # CONFIG_NET_CADENCE is not set
# CONFIG_NET_VENDOR_BROADCOM is not set # CONFIG_NET_VENDOR_BROADCOM is not set
@ -389,7 +397,6 @@ CONFIG_NE2000=y
# CONFIG_NET_VENDOR_SOLARFLARE is not set # CONFIG_NET_VENDOR_SOLARFLARE is not set
CONFIG_SMC91X=y CONFIG_SMC91X=y
# CONFIG_NET_VENDOR_STMICRO is not set # CONFIG_NET_VENDOR_STMICRO is not set
# CONFIG_NET_VENDOR_SYNOPSYS is not set
# CONFIG_NET_VENDOR_VIA is not set # CONFIG_NET_VENDOR_VIA is not set
# CONFIG_NET_VENDOR_WIZNET is not set # CONFIG_NET_VENDOR_WIZNET is not set
CONFIG_PPP=m CONFIG_PPP=m
@ -544,6 +551,8 @@ CONFIG_NLS_MAC_TURKISH=m
CONFIG_DLM=m CONFIG_DLM=m
# CONFIG_SECTION_MISMATCH_WARN_ONLY is not set # CONFIG_SECTION_MISMATCH_WARN_ONLY is not set
CONFIG_MAGIC_SYSRQ=y CONFIG_MAGIC_SYSRQ=y
CONFIG_WW_MUTEX_SELFTEST=m
CONFIG_ATOMIC64_SELFTEST=m
CONFIG_ASYNC_RAID6_TEST=m CONFIG_ASYNC_RAID6_TEST=m
CONFIG_TEST_HEXDUMP=m CONFIG_TEST_HEXDUMP=m
CONFIG_TEST_STRING_HELPERS=m CONFIG_TEST_STRING_HELPERS=m
@ -574,6 +583,7 @@ CONFIG_CRYPTO_CHACHA20POLY1305=m
CONFIG_CRYPTO_LRW=m CONFIG_CRYPTO_LRW=m
CONFIG_CRYPTO_PCBC=m CONFIG_CRYPTO_PCBC=m
CONFIG_CRYPTO_KEYWRAP=m CONFIG_CRYPTO_KEYWRAP=m
CONFIG_CRYPTO_CMAC=m
CONFIG_CRYPTO_XCBC=m CONFIG_CRYPTO_XCBC=m
CONFIG_CRYPTO_VMAC=m CONFIG_CRYPTO_VMAC=m
CONFIG_CRYPTO_MICHAEL_MIC=m CONFIG_CRYPTO_MICHAEL_MIC=m
@ -585,6 +595,7 @@ CONFIG_CRYPTO_SHA512=m
CONFIG_CRYPTO_SHA3=m CONFIG_CRYPTO_SHA3=m
CONFIG_CRYPTO_TGR192=m CONFIG_CRYPTO_TGR192=m
CONFIG_CRYPTO_WP512=m CONFIG_CRYPTO_WP512=m
CONFIG_CRYPTO_AES_TI=m
CONFIG_CRYPTO_ANUBIS=m CONFIG_CRYPTO_ANUBIS=m
CONFIG_CRYPTO_BLOWFISH=m CONFIG_CRYPTO_BLOWFISH=m
CONFIG_CRYPTO_CAMELLIA=m CONFIG_CRYPTO_CAMELLIA=m
@ -609,4 +620,5 @@ CONFIG_CRYPTO_USER_API_SKCIPHER=m
CONFIG_CRYPTO_USER_API_RNG=m CONFIG_CRYPTO_USER_API_RNG=m
CONFIG_CRYPTO_USER_API_AEAD=m CONFIG_CRYPTO_USER_API_AEAD=m
# CONFIG_CRYPTO_HW is not set # CONFIG_CRYPTO_HW is not set
CONFIG_CRC32_SELFTEST=m
CONFIG_XZ_DEC_TEST=m CONFIG_XZ_DEC_TEST=m

View File

@ -25,6 +25,7 @@ CONFIG_UNIXWARE_DISKLABEL=y
CONFIG_SUN_PARTITION=y CONFIG_SUN_PARTITION=y
# CONFIG_EFI_PARTITION is not set # CONFIG_EFI_PARTITION is not set
CONFIG_IOSCHED_DEADLINE=m CONFIG_IOSCHED_DEADLINE=m
CONFIG_MQ_IOSCHED_DEADLINE=m
CONFIG_KEXEC=y CONFIG_KEXEC=y
CONFIG_BOOTINFO_PROC=y CONFIG_BOOTINFO_PROC=y
CONFIG_M68040=y CONFIG_M68040=y
@ -56,6 +57,7 @@ CONFIG_NET_IPVTI=m
CONFIG_NET_FOU_IP_TUNNELS=y CONFIG_NET_FOU_IP_TUNNELS=y
CONFIG_INET_AH=m CONFIG_INET_AH=m
CONFIG_INET_ESP=m CONFIG_INET_ESP=m
CONFIG_INET_ESP_OFFLOAD=m
CONFIG_INET_IPCOMP=m CONFIG_INET_IPCOMP=m
CONFIG_INET_XFRM_MODE_TRANSPORT=m CONFIG_INET_XFRM_MODE_TRANSPORT=m
CONFIG_INET_XFRM_MODE_TUNNEL=m CONFIG_INET_XFRM_MODE_TUNNEL=m
@ -67,6 +69,7 @@ CONFIG_IPV6=m
CONFIG_IPV6_ROUTER_PREF=y CONFIG_IPV6_ROUTER_PREF=y
CONFIG_INET6_AH=m CONFIG_INET6_AH=m
CONFIG_INET6_ESP=m CONFIG_INET6_ESP=m
CONFIG_INET6_ESP_OFFLOAD=m
CONFIG_INET6_IPCOMP=m CONFIG_INET6_IPCOMP=m
CONFIG_IPV6_ILA=m CONFIG_IPV6_ILA=m
CONFIG_IPV6_VTI=m CONFIG_IPV6_VTI=m
@ -97,6 +100,7 @@ CONFIG_NFT_NUMGEN=m
CONFIG_NFT_CT=m CONFIG_NFT_CT=m
CONFIG_NFT_SET_RBTREE=m CONFIG_NFT_SET_RBTREE=m
CONFIG_NFT_SET_HASH=m CONFIG_NFT_SET_HASH=m
CONFIG_NFT_SET_BITMAP=m
CONFIG_NFT_COUNTER=m CONFIG_NFT_COUNTER=m
CONFIG_NFT_LOG=m CONFIG_NFT_LOG=m
CONFIG_NFT_LIMIT=m CONFIG_NFT_LIMIT=m
@ -294,6 +298,8 @@ CONFIG_MPLS_IPTUNNEL=m
CONFIG_NET_L3_MASTER_DEV=y CONFIG_NET_L3_MASTER_DEV=y
CONFIG_AF_KCM=m CONFIG_AF_KCM=m
# CONFIG_WIRELESS is not set # CONFIG_WIRELESS is not set
CONFIG_PSAMPLE=m
CONFIG_NET_IFE=m
CONFIG_NET_DEVLINK=m CONFIG_NET_DEVLINK=m
# CONFIG_UEVENT_HELPER is not set # CONFIG_UEVENT_HELPER is not set
CONFIG_DEVTMPFS=y CONFIG_DEVTMPFS=y
@ -352,6 +358,7 @@ CONFIG_NET_TEAM_MODE_LOADBALANCE=m
CONFIG_MACVLAN=m CONFIG_MACVLAN=m
CONFIG_MACVTAP=m CONFIG_MACVTAP=m
CONFIG_IPVLAN=m CONFIG_IPVLAN=m
CONFIG_IPVTAP=m
CONFIG_VXLAN=m CONFIG_VXLAN=m
CONFIG_GENEVE=m CONFIG_GENEVE=m
CONFIG_GTP=m CONFIG_GTP=m
@ -361,6 +368,7 @@ CONFIG_NETCONSOLE_DYNAMIC=y
CONFIG_VETH=m CONFIG_VETH=m
# CONFIG_NET_VENDOR_ALACRITECH is not set # CONFIG_NET_VENDOR_ALACRITECH is not set
# CONFIG_NET_VENDOR_AMAZON is not set # CONFIG_NET_VENDOR_AMAZON is not set
# CONFIG_NET_VENDOR_AQUANTIA is not set
# CONFIG_NET_VENDOR_ARC is not set # CONFIG_NET_VENDOR_ARC is not set
# CONFIG_NET_CADENCE is not set # CONFIG_NET_CADENCE is not set
# CONFIG_NET_VENDOR_BROADCOM is not set # CONFIG_NET_VENDOR_BROADCOM is not set
@ -377,7 +385,6 @@ CONFIG_BVME6000_NET=y
# CONFIG_NET_VENDOR_SEEQ is not set # CONFIG_NET_VENDOR_SEEQ is not set
# CONFIG_NET_VENDOR_SOLARFLARE is not set # CONFIG_NET_VENDOR_SOLARFLARE is not set
# CONFIG_NET_VENDOR_STMICRO is not set # CONFIG_NET_VENDOR_STMICRO is not set
# CONFIG_NET_VENDOR_SYNOPSYS is not set
# CONFIG_NET_VENDOR_VIA is not set # CONFIG_NET_VENDOR_VIA is not set
# CONFIG_NET_VENDOR_WIZNET is not set # CONFIG_NET_VENDOR_WIZNET is not set
CONFIG_PPP=m CONFIG_PPP=m
@ -515,6 +522,8 @@ CONFIG_NLS_MAC_TURKISH=m
CONFIG_DLM=m CONFIG_DLM=m
# CONFIG_SECTION_MISMATCH_WARN_ONLY is not set # CONFIG_SECTION_MISMATCH_WARN_ONLY is not set
CONFIG_MAGIC_SYSRQ=y CONFIG_MAGIC_SYSRQ=y
CONFIG_WW_MUTEX_SELFTEST=m
CONFIG_ATOMIC64_SELFTEST=m
CONFIG_ASYNC_RAID6_TEST=m CONFIG_ASYNC_RAID6_TEST=m
CONFIG_TEST_HEXDUMP=m CONFIG_TEST_HEXDUMP=m
CONFIG_TEST_STRING_HELPERS=m CONFIG_TEST_STRING_HELPERS=m
@ -545,6 +554,7 @@ CONFIG_CRYPTO_CHACHA20POLY1305=m
CONFIG_CRYPTO_LRW=m CONFIG_CRYPTO_LRW=m
CONFIG_CRYPTO_PCBC=m CONFIG_CRYPTO_PCBC=m
CONFIG_CRYPTO_KEYWRAP=m CONFIG_CRYPTO_KEYWRAP=m
CONFIG_CRYPTO_CMAC=m
CONFIG_CRYPTO_XCBC=m CONFIG_CRYPTO_XCBC=m
CONFIG_CRYPTO_VMAC=m CONFIG_CRYPTO_VMAC=m
CONFIG_CRYPTO_MICHAEL_MIC=m CONFIG_CRYPTO_MICHAEL_MIC=m
@ -556,6 +566,7 @@ CONFIG_CRYPTO_SHA512=m
CONFIG_CRYPTO_SHA3=m CONFIG_CRYPTO_SHA3=m
CONFIG_CRYPTO_TGR192=m CONFIG_CRYPTO_TGR192=m
CONFIG_CRYPTO_WP512=m CONFIG_CRYPTO_WP512=m
CONFIG_CRYPTO_AES_TI=m
CONFIG_CRYPTO_ANUBIS=m CONFIG_CRYPTO_ANUBIS=m
CONFIG_CRYPTO_BLOWFISH=m CONFIG_CRYPTO_BLOWFISH=m
CONFIG_CRYPTO_CAMELLIA=m CONFIG_CRYPTO_CAMELLIA=m
@ -580,4 +591,5 @@ CONFIG_CRYPTO_USER_API_SKCIPHER=m
CONFIG_CRYPTO_USER_API_RNG=m CONFIG_CRYPTO_USER_API_RNG=m
CONFIG_CRYPTO_USER_API_AEAD=m CONFIG_CRYPTO_USER_API_AEAD=m
# CONFIG_CRYPTO_HW is not set # CONFIG_CRYPTO_HW is not set
CONFIG_CRC32_SELFTEST=m
CONFIG_XZ_DEC_TEST=m CONFIG_XZ_DEC_TEST=m

View File

@ -26,6 +26,7 @@ CONFIG_SUN_PARTITION=y
# CONFIG_EFI_PARTITION is not set # CONFIG_EFI_PARTITION is not set
CONFIG_SYSV68_PARTITION=y CONFIG_SYSV68_PARTITION=y
CONFIG_IOSCHED_DEADLINE=m CONFIG_IOSCHED_DEADLINE=m
CONFIG_MQ_IOSCHED_DEADLINE=m
CONFIG_KEXEC=y CONFIG_KEXEC=y
CONFIG_BOOTINFO_PROC=y CONFIG_BOOTINFO_PROC=y
CONFIG_M68020=y CONFIG_M68020=y
@ -58,6 +59,7 @@ CONFIG_NET_IPVTI=m
CONFIG_NET_FOU_IP_TUNNELS=y CONFIG_NET_FOU_IP_TUNNELS=y
CONFIG_INET_AH=m CONFIG_INET_AH=m
CONFIG_INET_ESP=m CONFIG_INET_ESP=m
CONFIG_INET_ESP_OFFLOAD=m
CONFIG_INET_IPCOMP=m CONFIG_INET_IPCOMP=m
CONFIG_INET_XFRM_MODE_TRANSPORT=m CONFIG_INET_XFRM_MODE_TRANSPORT=m
CONFIG_INET_XFRM_MODE_TUNNEL=m CONFIG_INET_XFRM_MODE_TUNNEL=m
@ -69,6 +71,7 @@ CONFIG_IPV6=m
CONFIG_IPV6_ROUTER_PREF=y CONFIG_IPV6_ROUTER_PREF=y
CONFIG_INET6_AH=m CONFIG_INET6_AH=m
CONFIG_INET6_ESP=m CONFIG_INET6_ESP=m
CONFIG_INET6_ESP_OFFLOAD=m
CONFIG_INET6_IPCOMP=m CONFIG_INET6_IPCOMP=m
CONFIG_IPV6_ILA=m CONFIG_IPV6_ILA=m
CONFIG_IPV6_VTI=m CONFIG_IPV6_VTI=m
@ -99,6 +102,7 @@ CONFIG_NFT_NUMGEN=m
CONFIG_NFT_CT=m CONFIG_NFT_CT=m
CONFIG_NFT_SET_RBTREE=m CONFIG_NFT_SET_RBTREE=m
CONFIG_NFT_SET_HASH=m CONFIG_NFT_SET_HASH=m
CONFIG_NFT_SET_BITMAP=m
CONFIG_NFT_COUNTER=m CONFIG_NFT_COUNTER=m
CONFIG_NFT_LOG=m CONFIG_NFT_LOG=m
CONFIG_NFT_LIMIT=m CONFIG_NFT_LIMIT=m
@ -296,6 +300,8 @@ CONFIG_MPLS_IPTUNNEL=m
CONFIG_NET_L3_MASTER_DEV=y CONFIG_NET_L3_MASTER_DEV=y
CONFIG_AF_KCM=m CONFIG_AF_KCM=m
# CONFIG_WIRELESS is not set # CONFIG_WIRELESS is not set
CONFIG_PSAMPLE=m
CONFIG_NET_IFE=m
CONFIG_NET_DEVLINK=m CONFIG_NET_DEVLINK=m
# CONFIG_UEVENT_HELPER is not set # CONFIG_UEVENT_HELPER is not set
CONFIG_DEVTMPFS=y CONFIG_DEVTMPFS=y
@ -353,6 +359,7 @@ CONFIG_NET_TEAM_MODE_LOADBALANCE=m
CONFIG_MACVLAN=m CONFIG_MACVLAN=m
CONFIG_MACVTAP=m CONFIG_MACVTAP=m
CONFIG_IPVLAN=m CONFIG_IPVLAN=m
CONFIG_IPVTAP=m
CONFIG_VXLAN=m CONFIG_VXLAN=m
CONFIG_GENEVE=m CONFIG_GENEVE=m
CONFIG_GTP=m CONFIG_GTP=m
@ -363,6 +370,7 @@ CONFIG_VETH=m
# CONFIG_NET_VENDOR_ALACRITECH is not set # CONFIG_NET_VENDOR_ALACRITECH is not set
# CONFIG_NET_VENDOR_AMAZON is not set # CONFIG_NET_VENDOR_AMAZON is not set
CONFIG_HPLANCE=y CONFIG_HPLANCE=y
# CONFIG_NET_VENDOR_AQUANTIA is not set
# CONFIG_NET_VENDOR_ARC is not set # CONFIG_NET_VENDOR_ARC is not set
# CONFIG_NET_CADENCE is not set # CONFIG_NET_CADENCE is not set
# CONFIG_NET_VENDOR_BROADCOM is not set # CONFIG_NET_VENDOR_BROADCOM is not set
@ -379,7 +387,6 @@ CONFIG_HPLANCE=y
# CONFIG_NET_VENDOR_SEEQ is not set # CONFIG_NET_VENDOR_SEEQ is not set
# CONFIG_NET_VENDOR_SOLARFLARE is not set # CONFIG_NET_VENDOR_SOLARFLARE is not set
# CONFIG_NET_VENDOR_STMICRO is not set # CONFIG_NET_VENDOR_STMICRO is not set
# CONFIG_NET_VENDOR_SYNOPSYS is not set
# CONFIG_NET_VENDOR_VIA is not set # CONFIG_NET_VENDOR_VIA is not set
# CONFIG_NET_VENDOR_WIZNET is not set # CONFIG_NET_VENDOR_WIZNET is not set
CONFIG_PPP=m CONFIG_PPP=m
@ -525,6 +532,8 @@ CONFIG_NLS_MAC_TURKISH=m
CONFIG_DLM=m CONFIG_DLM=m
# CONFIG_SECTION_MISMATCH_WARN_ONLY is not set # CONFIG_SECTION_MISMATCH_WARN_ONLY is not set
CONFIG_MAGIC_SYSRQ=y CONFIG_MAGIC_SYSRQ=y
CONFIG_WW_MUTEX_SELFTEST=m
CONFIG_ATOMIC64_SELFTEST=m
CONFIG_ASYNC_RAID6_TEST=m CONFIG_ASYNC_RAID6_TEST=m
CONFIG_TEST_HEXDUMP=m CONFIG_TEST_HEXDUMP=m
CONFIG_TEST_STRING_HELPERS=m CONFIG_TEST_STRING_HELPERS=m
@ -555,6 +564,7 @@ CONFIG_CRYPTO_CHACHA20POLY1305=m
CONFIG_CRYPTO_LRW=m CONFIG_CRYPTO_LRW=m
CONFIG_CRYPTO_PCBC=m CONFIG_CRYPTO_PCBC=m
CONFIG_CRYPTO_KEYWRAP=m CONFIG_CRYPTO_KEYWRAP=m
CONFIG_CRYPTO_CMAC=m
CONFIG_CRYPTO_XCBC=m CONFIG_CRYPTO_XCBC=m
CONFIG_CRYPTO_VMAC=m CONFIG_CRYPTO_VMAC=m
CONFIG_CRYPTO_MICHAEL_MIC=m CONFIG_CRYPTO_MICHAEL_MIC=m
@ -566,6 +576,7 @@ CONFIG_CRYPTO_SHA512=m
CONFIG_CRYPTO_SHA3=m CONFIG_CRYPTO_SHA3=m
CONFIG_CRYPTO_TGR192=m CONFIG_CRYPTO_TGR192=m
CONFIG_CRYPTO_WP512=m CONFIG_CRYPTO_WP512=m
CONFIG_CRYPTO_AES_TI=m
CONFIG_CRYPTO_ANUBIS=m CONFIG_CRYPTO_ANUBIS=m
CONFIG_CRYPTO_BLOWFISH=m CONFIG_CRYPTO_BLOWFISH=m
CONFIG_CRYPTO_CAMELLIA=m CONFIG_CRYPTO_CAMELLIA=m
@ -590,4 +601,5 @@ CONFIG_CRYPTO_USER_API_SKCIPHER=m
CONFIG_CRYPTO_USER_API_RNG=m CONFIG_CRYPTO_USER_API_RNG=m
CONFIG_CRYPTO_USER_API_AEAD=m CONFIG_CRYPTO_USER_API_AEAD=m
# CONFIG_CRYPTO_HW is not set # CONFIG_CRYPTO_HW is not set
CONFIG_CRC32_SELFTEST=m
CONFIG_XZ_DEC_TEST=m CONFIG_XZ_DEC_TEST=m

View File

@ -25,6 +25,7 @@ CONFIG_SUN_PARTITION=y
# CONFIG_EFI_PARTITION is not set # CONFIG_EFI_PARTITION is not set
CONFIG_SYSV68_PARTITION=y CONFIG_SYSV68_PARTITION=y
CONFIG_IOSCHED_DEADLINE=m CONFIG_IOSCHED_DEADLINE=m
CONFIG_MQ_IOSCHED_DEADLINE=m
CONFIG_KEXEC=y CONFIG_KEXEC=y
CONFIG_BOOTINFO_PROC=y CONFIG_BOOTINFO_PROC=y
CONFIG_M68020=y CONFIG_M68020=y
@ -57,6 +58,7 @@ CONFIG_NET_IPVTI=m
CONFIG_NET_FOU_IP_TUNNELS=y CONFIG_NET_FOU_IP_TUNNELS=y
CONFIG_INET_AH=m CONFIG_INET_AH=m
CONFIG_INET_ESP=m CONFIG_INET_ESP=m
CONFIG_INET_ESP_OFFLOAD=m
CONFIG_INET_IPCOMP=m CONFIG_INET_IPCOMP=m
CONFIG_INET_XFRM_MODE_TRANSPORT=m CONFIG_INET_XFRM_MODE_TRANSPORT=m
CONFIG_INET_XFRM_MODE_TUNNEL=m CONFIG_INET_XFRM_MODE_TUNNEL=m
@ -68,6 +70,7 @@ CONFIG_IPV6=m
CONFIG_IPV6_ROUTER_PREF=y CONFIG_IPV6_ROUTER_PREF=y
CONFIG_INET6_AH=m CONFIG_INET6_AH=m
CONFIG_INET6_ESP=m CONFIG_INET6_ESP=m
CONFIG_INET6_ESP_OFFLOAD=m
CONFIG_INET6_IPCOMP=m CONFIG_INET6_IPCOMP=m
CONFIG_IPV6_ILA=m CONFIG_IPV6_ILA=m
CONFIG_IPV6_VTI=m CONFIG_IPV6_VTI=m
@ -98,6 +101,7 @@ CONFIG_NFT_NUMGEN=m
CONFIG_NFT_CT=m CONFIG_NFT_CT=m
CONFIG_NFT_SET_RBTREE=m CONFIG_NFT_SET_RBTREE=m
CONFIG_NFT_SET_HASH=m CONFIG_NFT_SET_HASH=m
CONFIG_NFT_SET_BITMAP=m
CONFIG_NFT_COUNTER=m CONFIG_NFT_COUNTER=m
CONFIG_NFT_LOG=m CONFIG_NFT_LOG=m
CONFIG_NFT_LIMIT=m CONFIG_NFT_LIMIT=m
@ -298,6 +302,8 @@ CONFIG_MPLS_IPTUNNEL=m
CONFIG_NET_L3_MASTER_DEV=y CONFIG_NET_L3_MASTER_DEV=y
CONFIG_AF_KCM=m CONFIG_AF_KCM=m
# CONFIG_WIRELESS is not set # CONFIG_WIRELESS is not set
CONFIG_PSAMPLE=m
CONFIG_NET_IFE=m
CONFIG_NET_DEVLINK=m CONFIG_NET_DEVLINK=m
# CONFIG_UEVENT_HELPER is not set # CONFIG_UEVENT_HELPER is not set
CONFIG_DEVTMPFS=y CONFIG_DEVTMPFS=y
@ -369,6 +375,7 @@ CONFIG_NET_TEAM_MODE_LOADBALANCE=m
CONFIG_MACVLAN=m CONFIG_MACVLAN=m
CONFIG_MACVTAP=m CONFIG_MACVTAP=m
CONFIG_IPVLAN=m CONFIG_IPVLAN=m
CONFIG_IPVTAP=m
CONFIG_VXLAN=m CONFIG_VXLAN=m
CONFIG_GENEVE=m CONFIG_GENEVE=m
CONFIG_GTP=m CONFIG_GTP=m
@ -379,6 +386,7 @@ CONFIG_VETH=m
# CONFIG_NET_VENDOR_ALACRITECH is not set # CONFIG_NET_VENDOR_ALACRITECH is not set
# CONFIG_NET_VENDOR_AMAZON is not set # CONFIG_NET_VENDOR_AMAZON is not set
CONFIG_MACMACE=y CONFIG_MACMACE=y
# CONFIG_NET_VENDOR_AQUANTIA is not set
# CONFIG_NET_VENDOR_ARC is not set # CONFIG_NET_VENDOR_ARC is not set
# CONFIG_NET_CADENCE is not set # CONFIG_NET_CADENCE is not set
# CONFIG_NET_VENDOR_BROADCOM is not set # CONFIG_NET_VENDOR_BROADCOM is not set
@ -398,7 +406,6 @@ CONFIG_MAC8390=y
# CONFIG_NET_VENDOR_SOLARFLARE is not set # CONFIG_NET_VENDOR_SOLARFLARE is not set
# CONFIG_NET_VENDOR_SMSC is not set # CONFIG_NET_VENDOR_SMSC is not set
# CONFIG_NET_VENDOR_STMICRO is not set # CONFIG_NET_VENDOR_STMICRO is not set
# CONFIG_NET_VENDOR_SYNOPSYS is not set
# CONFIG_NET_VENDOR_VIA is not set # CONFIG_NET_VENDOR_VIA is not set
# CONFIG_NET_VENDOR_WIZNET is not set # CONFIG_NET_VENDOR_WIZNET is not set
CONFIG_PPP=m CONFIG_PPP=m
@ -547,6 +554,8 @@ CONFIG_NLS_MAC_TURKISH=m
CONFIG_DLM=m CONFIG_DLM=m
# CONFIG_SECTION_MISMATCH_WARN_ONLY is not set # CONFIG_SECTION_MISMATCH_WARN_ONLY is not set
CONFIG_MAGIC_SYSRQ=y CONFIG_MAGIC_SYSRQ=y
CONFIG_WW_MUTEX_SELFTEST=m
CONFIG_ATOMIC64_SELFTEST=m
CONFIG_ASYNC_RAID6_TEST=m CONFIG_ASYNC_RAID6_TEST=m
CONFIG_TEST_HEXDUMP=m CONFIG_TEST_HEXDUMP=m
CONFIG_TEST_STRING_HELPERS=m CONFIG_TEST_STRING_HELPERS=m
@ -577,6 +586,7 @@ CONFIG_CRYPTO_CHACHA20POLY1305=m
CONFIG_CRYPTO_LRW=m CONFIG_CRYPTO_LRW=m
CONFIG_CRYPTO_PCBC=m CONFIG_CRYPTO_PCBC=m
CONFIG_CRYPTO_KEYWRAP=m CONFIG_CRYPTO_KEYWRAP=m
CONFIG_CRYPTO_CMAC=m
CONFIG_CRYPTO_XCBC=m CONFIG_CRYPTO_XCBC=m
CONFIG_CRYPTO_VMAC=m CONFIG_CRYPTO_VMAC=m
CONFIG_CRYPTO_MICHAEL_MIC=m CONFIG_CRYPTO_MICHAEL_MIC=m
@ -588,6 +598,7 @@ CONFIG_CRYPTO_SHA512=m
CONFIG_CRYPTO_SHA3=m CONFIG_CRYPTO_SHA3=m
CONFIG_CRYPTO_TGR192=m CONFIG_CRYPTO_TGR192=m
CONFIG_CRYPTO_WP512=m CONFIG_CRYPTO_WP512=m
CONFIG_CRYPTO_AES_TI=m
CONFIG_CRYPTO_ANUBIS=m CONFIG_CRYPTO_ANUBIS=m
CONFIG_CRYPTO_BLOWFISH=m CONFIG_CRYPTO_BLOWFISH=m
CONFIG_CRYPTO_CAMELLIA=m CONFIG_CRYPTO_CAMELLIA=m
@ -612,4 +623,5 @@ CONFIG_CRYPTO_USER_API_SKCIPHER=m
CONFIG_CRYPTO_USER_API_RNG=m CONFIG_CRYPTO_USER_API_RNG=m
CONFIG_CRYPTO_USER_API_AEAD=m CONFIG_CRYPTO_USER_API_AEAD=m
# CONFIG_CRYPTO_HW is not set # CONFIG_CRYPTO_HW is not set
CONFIG_CRC32_SELFTEST=m
CONFIG_XZ_DEC_TEST=m CONFIG_XZ_DEC_TEST=m

View File

@ -21,6 +21,7 @@ CONFIG_SOLARIS_X86_PARTITION=y
CONFIG_UNIXWARE_DISKLABEL=y CONFIG_UNIXWARE_DISKLABEL=y
# CONFIG_EFI_PARTITION is not set # CONFIG_EFI_PARTITION is not set
CONFIG_IOSCHED_DEADLINE=m CONFIG_IOSCHED_DEADLINE=m
CONFIG_MQ_IOSCHED_DEADLINE=m
CONFIG_KEXEC=y CONFIG_KEXEC=y
CONFIG_BOOTINFO_PROC=y CONFIG_BOOTINFO_PROC=y
CONFIG_M68020=y CONFIG_M68020=y
@ -67,6 +68,7 @@ CONFIG_NET_IPVTI=m
CONFIG_NET_FOU_IP_TUNNELS=y CONFIG_NET_FOU_IP_TUNNELS=y
CONFIG_INET_AH=m CONFIG_INET_AH=m
CONFIG_INET_ESP=m CONFIG_INET_ESP=m
CONFIG_INET_ESP_OFFLOAD=m
CONFIG_INET_IPCOMP=m CONFIG_INET_IPCOMP=m
CONFIG_INET_XFRM_MODE_TRANSPORT=m CONFIG_INET_XFRM_MODE_TRANSPORT=m
CONFIG_INET_XFRM_MODE_TUNNEL=m CONFIG_INET_XFRM_MODE_TUNNEL=m
@ -78,6 +80,7 @@ CONFIG_IPV6=m
CONFIG_IPV6_ROUTER_PREF=y CONFIG_IPV6_ROUTER_PREF=y
CONFIG_INET6_AH=m CONFIG_INET6_AH=m
CONFIG_INET6_ESP=m CONFIG_INET6_ESP=m
CONFIG_INET6_ESP_OFFLOAD=m
CONFIG_INET6_IPCOMP=m CONFIG_INET6_IPCOMP=m
CONFIG_IPV6_ILA=m CONFIG_IPV6_ILA=m
CONFIG_IPV6_VTI=m CONFIG_IPV6_VTI=m
@ -108,6 +111,7 @@ CONFIG_NFT_NUMGEN=m
CONFIG_NFT_CT=m CONFIG_NFT_CT=m
CONFIG_NFT_SET_RBTREE=m CONFIG_NFT_SET_RBTREE=m
CONFIG_NFT_SET_HASH=m CONFIG_NFT_SET_HASH=m
CONFIG_NFT_SET_BITMAP=m
CONFIG_NFT_COUNTER=m CONFIG_NFT_COUNTER=m
CONFIG_NFT_LOG=m CONFIG_NFT_LOG=m
CONFIG_NFT_LIMIT=m CONFIG_NFT_LIMIT=m
@ -308,6 +312,8 @@ CONFIG_MPLS_IPTUNNEL=m
CONFIG_NET_L3_MASTER_DEV=y CONFIG_NET_L3_MASTER_DEV=y
CONFIG_AF_KCM=m CONFIG_AF_KCM=m
# CONFIG_WIRELESS is not set # CONFIG_WIRELESS is not set
CONFIG_PSAMPLE=m
CONFIG_NET_IFE=m
CONFIG_NET_DEVLINK=m CONFIG_NET_DEVLINK=m
# CONFIG_UEVENT_HELPER is not set # CONFIG_UEVENT_HELPER is not set
CONFIG_DEVTMPFS=y CONFIG_DEVTMPFS=y
@ -402,6 +408,7 @@ CONFIG_NET_TEAM_MODE_LOADBALANCE=m
CONFIG_MACVLAN=m CONFIG_MACVLAN=m
CONFIG_MACVTAP=m CONFIG_MACVTAP=m
CONFIG_IPVLAN=m CONFIG_IPVLAN=m
CONFIG_IPVTAP=m
CONFIG_VXLAN=m CONFIG_VXLAN=m
CONFIG_GENEVE=m CONFIG_GENEVE=m
CONFIG_GTP=m CONFIG_GTP=m
@ -419,6 +426,7 @@ CONFIG_HPLANCE=y
CONFIG_MVME147_NET=y CONFIG_MVME147_NET=y
CONFIG_SUN3LANCE=y CONFIG_SUN3LANCE=y
CONFIG_MACMACE=y CONFIG_MACMACE=y
# CONFIG_NET_VENDOR_AQUANTIA is not set
# CONFIG_NET_VENDOR_ARC is not set # CONFIG_NET_VENDOR_ARC is not set
# CONFIG_NET_CADENCE is not set # CONFIG_NET_CADENCE is not set
# CONFIG_NET_VENDOR_BROADCOM is not set # CONFIG_NET_VENDOR_BROADCOM is not set
@ -444,7 +452,6 @@ CONFIG_ZORRO8390=y
# CONFIG_NET_VENDOR_SOLARFLARE is not set # CONFIG_NET_VENDOR_SOLARFLARE is not set
CONFIG_SMC91X=y CONFIG_SMC91X=y
# CONFIG_NET_VENDOR_STMICRO is not set # CONFIG_NET_VENDOR_STMICRO is not set
# CONFIG_NET_VENDOR_SYNOPSYS is not set
# CONFIG_NET_VENDOR_VIA is not set # CONFIG_NET_VENDOR_VIA is not set
# CONFIG_NET_VENDOR_WIZNET is not set # CONFIG_NET_VENDOR_WIZNET is not set
CONFIG_PLIP=m CONFIG_PLIP=m
@ -627,6 +634,8 @@ CONFIG_NLS_MAC_TURKISH=m
CONFIG_DLM=m CONFIG_DLM=m
# CONFIG_SECTION_MISMATCH_WARN_ONLY is not set # CONFIG_SECTION_MISMATCH_WARN_ONLY is not set
CONFIG_MAGIC_SYSRQ=y CONFIG_MAGIC_SYSRQ=y
CONFIG_WW_MUTEX_SELFTEST=m
CONFIG_ATOMIC64_SELFTEST=m
CONFIG_ASYNC_RAID6_TEST=m CONFIG_ASYNC_RAID6_TEST=m
CONFIG_TEST_HEXDUMP=m CONFIG_TEST_HEXDUMP=m
CONFIG_TEST_STRING_HELPERS=m CONFIG_TEST_STRING_HELPERS=m
@ -657,6 +666,7 @@ CONFIG_CRYPTO_CHACHA20POLY1305=m
CONFIG_CRYPTO_LRW=m CONFIG_CRYPTO_LRW=m
CONFIG_CRYPTO_PCBC=m CONFIG_CRYPTO_PCBC=m
CONFIG_CRYPTO_KEYWRAP=m CONFIG_CRYPTO_KEYWRAP=m
CONFIG_CRYPTO_CMAC=m
CONFIG_CRYPTO_XCBC=m CONFIG_CRYPTO_XCBC=m
CONFIG_CRYPTO_VMAC=m CONFIG_CRYPTO_VMAC=m
CONFIG_CRYPTO_MICHAEL_MIC=m CONFIG_CRYPTO_MICHAEL_MIC=m
@ -668,6 +678,7 @@ CONFIG_CRYPTO_SHA512=m
CONFIG_CRYPTO_SHA3=m CONFIG_CRYPTO_SHA3=m
CONFIG_CRYPTO_TGR192=m CONFIG_CRYPTO_TGR192=m
CONFIG_CRYPTO_WP512=m CONFIG_CRYPTO_WP512=m
CONFIG_CRYPTO_AES_TI=m
CONFIG_CRYPTO_ANUBIS=m CONFIG_CRYPTO_ANUBIS=m
CONFIG_CRYPTO_BLOWFISH=m CONFIG_CRYPTO_BLOWFISH=m
CONFIG_CRYPTO_CAMELLIA=m CONFIG_CRYPTO_CAMELLIA=m
@ -692,4 +703,5 @@ CONFIG_CRYPTO_USER_API_SKCIPHER=m
CONFIG_CRYPTO_USER_API_RNG=m CONFIG_CRYPTO_USER_API_RNG=m
CONFIG_CRYPTO_USER_API_AEAD=m CONFIG_CRYPTO_USER_API_AEAD=m
# CONFIG_CRYPTO_HW is not set # CONFIG_CRYPTO_HW is not set
CONFIG_CRC32_SELFTEST=m
CONFIG_XZ_DEC_TEST=m CONFIG_XZ_DEC_TEST=m

View File

@ -25,6 +25,7 @@ CONFIG_UNIXWARE_DISKLABEL=y
CONFIG_SUN_PARTITION=y CONFIG_SUN_PARTITION=y
# CONFIG_EFI_PARTITION is not set # CONFIG_EFI_PARTITION is not set
CONFIG_IOSCHED_DEADLINE=m CONFIG_IOSCHED_DEADLINE=m
CONFIG_MQ_IOSCHED_DEADLINE=m
CONFIG_KEXEC=y CONFIG_KEXEC=y
CONFIG_BOOTINFO_PROC=y CONFIG_BOOTINFO_PROC=y
CONFIG_M68030=y CONFIG_M68030=y
@ -55,6 +56,7 @@ CONFIG_NET_IPVTI=m
CONFIG_NET_FOU_IP_TUNNELS=y CONFIG_NET_FOU_IP_TUNNELS=y
CONFIG_INET_AH=m CONFIG_INET_AH=m
CONFIG_INET_ESP=m CONFIG_INET_ESP=m
CONFIG_INET_ESP_OFFLOAD=m
CONFIG_INET_IPCOMP=m CONFIG_INET_IPCOMP=m
CONFIG_INET_XFRM_MODE_TRANSPORT=m CONFIG_INET_XFRM_MODE_TRANSPORT=m
CONFIG_INET_XFRM_MODE_TUNNEL=m CONFIG_INET_XFRM_MODE_TUNNEL=m
@ -66,6 +68,7 @@ CONFIG_IPV6=m
CONFIG_IPV6_ROUTER_PREF=y CONFIG_IPV6_ROUTER_PREF=y
CONFIG_INET6_AH=m CONFIG_INET6_AH=m
CONFIG_INET6_ESP=m CONFIG_INET6_ESP=m
CONFIG_INET6_ESP_OFFLOAD=m
CONFIG_INET6_IPCOMP=m CONFIG_INET6_IPCOMP=m
CONFIG_IPV6_ILA=m CONFIG_IPV6_ILA=m
CONFIG_IPV6_VTI=m CONFIG_IPV6_VTI=m
@ -96,6 +99,7 @@ CONFIG_NFT_NUMGEN=m
CONFIG_NFT_CT=m CONFIG_NFT_CT=m
CONFIG_NFT_SET_RBTREE=m CONFIG_NFT_SET_RBTREE=m
CONFIG_NFT_SET_HASH=m CONFIG_NFT_SET_HASH=m
CONFIG_NFT_SET_BITMAP=m
CONFIG_NFT_COUNTER=m CONFIG_NFT_COUNTER=m
CONFIG_NFT_LOG=m CONFIG_NFT_LOG=m
CONFIG_NFT_LIMIT=m CONFIG_NFT_LIMIT=m
@ -293,6 +297,8 @@ CONFIG_MPLS_IPTUNNEL=m
CONFIG_NET_L3_MASTER_DEV=y CONFIG_NET_L3_MASTER_DEV=y
CONFIG_AF_KCM=m CONFIG_AF_KCM=m
# CONFIG_WIRELESS is not set # CONFIG_WIRELESS is not set
CONFIG_PSAMPLE=m
CONFIG_NET_IFE=m
CONFIG_NET_DEVLINK=m CONFIG_NET_DEVLINK=m
# CONFIG_UEVENT_HELPER is not set # CONFIG_UEVENT_HELPER is not set
CONFIG_DEVTMPFS=y CONFIG_DEVTMPFS=y
@ -351,6 +357,7 @@ CONFIG_NET_TEAM_MODE_LOADBALANCE=m
CONFIG_MACVLAN=m CONFIG_MACVLAN=m
CONFIG_MACVTAP=m CONFIG_MACVTAP=m
CONFIG_IPVLAN=m CONFIG_IPVLAN=m
CONFIG_IPVTAP=m
CONFIG_VXLAN=m CONFIG_VXLAN=m
CONFIG_GENEVE=m CONFIG_GENEVE=m
CONFIG_GTP=m CONFIG_GTP=m
@ -361,6 +368,7 @@ CONFIG_VETH=m
# CONFIG_NET_VENDOR_ALACRITECH is not set # CONFIG_NET_VENDOR_ALACRITECH is not set
# CONFIG_NET_VENDOR_AMAZON is not set # CONFIG_NET_VENDOR_AMAZON is not set
CONFIG_MVME147_NET=y CONFIG_MVME147_NET=y
# CONFIG_NET_VENDOR_AQUANTIA is not set
# CONFIG_NET_VENDOR_ARC is not set # CONFIG_NET_VENDOR_ARC is not set
# CONFIG_NET_CADENCE is not set # CONFIG_NET_CADENCE is not set
# CONFIG_NET_VENDOR_BROADCOM is not set # CONFIG_NET_VENDOR_BROADCOM is not set
@ -377,7 +385,6 @@ CONFIG_MVME147_NET=y
# CONFIG_NET_VENDOR_SEEQ is not set # CONFIG_NET_VENDOR_SEEQ is not set
# CONFIG_NET_VENDOR_SOLARFLARE is not set # CONFIG_NET_VENDOR_SOLARFLARE is not set
# CONFIG_NET_VENDOR_STMICRO is not set # CONFIG_NET_VENDOR_STMICRO is not set
# CONFIG_NET_VENDOR_SYNOPSYS is not set
# CONFIG_NET_VENDOR_VIA is not set # CONFIG_NET_VENDOR_VIA is not set
# CONFIG_NET_VENDOR_WIZNET is not set # CONFIG_NET_VENDOR_WIZNET is not set
CONFIG_PPP=m CONFIG_PPP=m
@ -515,6 +522,8 @@ CONFIG_NLS_MAC_TURKISH=m
CONFIG_DLM=m CONFIG_DLM=m
# CONFIG_SECTION_MISMATCH_WARN_ONLY is not set # CONFIG_SECTION_MISMATCH_WARN_ONLY is not set
CONFIG_MAGIC_SYSRQ=y CONFIG_MAGIC_SYSRQ=y
CONFIG_WW_MUTEX_SELFTEST=m
CONFIG_ATOMIC64_SELFTEST=m
CONFIG_ASYNC_RAID6_TEST=m CONFIG_ASYNC_RAID6_TEST=m
CONFIG_TEST_HEXDUMP=m CONFIG_TEST_HEXDUMP=m
CONFIG_TEST_STRING_HELPERS=m CONFIG_TEST_STRING_HELPERS=m
@ -545,6 +554,7 @@ CONFIG_CRYPTO_CHACHA20POLY1305=m
CONFIG_CRYPTO_LRW=m CONFIG_CRYPTO_LRW=m
CONFIG_CRYPTO_PCBC=m CONFIG_CRYPTO_PCBC=m
CONFIG_CRYPTO_KEYWRAP=m CONFIG_CRYPTO_KEYWRAP=m
CONFIG_CRYPTO_CMAC=m
CONFIG_CRYPTO_XCBC=m CONFIG_CRYPTO_XCBC=m
CONFIG_CRYPTO_VMAC=m CONFIG_CRYPTO_VMAC=m
CONFIG_CRYPTO_MICHAEL_MIC=m CONFIG_CRYPTO_MICHAEL_MIC=m
@ -556,6 +566,7 @@ CONFIG_CRYPTO_SHA512=m
CONFIG_CRYPTO_SHA3=m CONFIG_CRYPTO_SHA3=m
CONFIG_CRYPTO_TGR192=m CONFIG_CRYPTO_TGR192=m
CONFIG_CRYPTO_WP512=m CONFIG_CRYPTO_WP512=m
CONFIG_CRYPTO_AES_TI=m
CONFIG_CRYPTO_ANUBIS=m CONFIG_CRYPTO_ANUBIS=m
CONFIG_CRYPTO_BLOWFISH=m CONFIG_CRYPTO_BLOWFISH=m
CONFIG_CRYPTO_CAMELLIA=m CONFIG_CRYPTO_CAMELLIA=m
@ -580,4 +591,5 @@ CONFIG_CRYPTO_USER_API_SKCIPHER=m
CONFIG_CRYPTO_USER_API_RNG=m CONFIG_CRYPTO_USER_API_RNG=m
CONFIG_CRYPTO_USER_API_AEAD=m CONFIG_CRYPTO_USER_API_AEAD=m
# CONFIG_CRYPTO_HW is not set # CONFIG_CRYPTO_HW is not set
CONFIG_CRC32_SELFTEST=m
CONFIG_XZ_DEC_TEST=m CONFIG_XZ_DEC_TEST=m

View File

@ -25,6 +25,7 @@ CONFIG_UNIXWARE_DISKLABEL=y
CONFIG_SUN_PARTITION=y CONFIG_SUN_PARTITION=y
# CONFIG_EFI_PARTITION is not set # CONFIG_EFI_PARTITION is not set
CONFIG_IOSCHED_DEADLINE=m CONFIG_IOSCHED_DEADLINE=m
CONFIG_MQ_IOSCHED_DEADLINE=m
CONFIG_KEXEC=y CONFIG_KEXEC=y
CONFIG_BOOTINFO_PROC=y CONFIG_BOOTINFO_PROC=y
CONFIG_M68040=y CONFIG_M68040=y
@ -56,6 +57,7 @@ CONFIG_NET_IPVTI=m
CONFIG_NET_FOU_IP_TUNNELS=y CONFIG_NET_FOU_IP_TUNNELS=y
CONFIG_INET_AH=m CONFIG_INET_AH=m
CONFIG_INET_ESP=m CONFIG_INET_ESP=m
CONFIG_INET_ESP_OFFLOAD=m
CONFIG_INET_IPCOMP=m CONFIG_INET_IPCOMP=m
CONFIG_INET_XFRM_MODE_TRANSPORT=m CONFIG_INET_XFRM_MODE_TRANSPORT=m
CONFIG_INET_XFRM_MODE_TUNNEL=m CONFIG_INET_XFRM_MODE_TUNNEL=m
@ -67,6 +69,7 @@ CONFIG_IPV6=m
CONFIG_IPV6_ROUTER_PREF=y CONFIG_IPV6_ROUTER_PREF=y
CONFIG_INET6_AH=m CONFIG_INET6_AH=m
CONFIG_INET6_ESP=m CONFIG_INET6_ESP=m
CONFIG_INET6_ESP_OFFLOAD=m
CONFIG_INET6_IPCOMP=m CONFIG_INET6_IPCOMP=m
CONFIG_IPV6_ILA=m CONFIG_IPV6_ILA=m
CONFIG_IPV6_VTI=m CONFIG_IPV6_VTI=m
@ -97,6 +100,7 @@ CONFIG_NFT_NUMGEN=m
CONFIG_NFT_CT=m CONFIG_NFT_CT=m
CONFIG_NFT_SET_RBTREE=m CONFIG_NFT_SET_RBTREE=m
CONFIG_NFT_SET_HASH=m CONFIG_NFT_SET_HASH=m
CONFIG_NFT_SET_BITMAP=m
CONFIG_NFT_COUNTER=m CONFIG_NFT_COUNTER=m
CONFIG_NFT_LOG=m CONFIG_NFT_LOG=m
CONFIG_NFT_LIMIT=m CONFIG_NFT_LIMIT=m
@ -294,6 +298,8 @@ CONFIG_MPLS_IPTUNNEL=m
CONFIG_NET_L3_MASTER_DEV=y CONFIG_NET_L3_MASTER_DEV=y
CONFIG_AF_KCM=m CONFIG_AF_KCM=m
# CONFIG_WIRELESS is not set # CONFIG_WIRELESS is not set
CONFIG_PSAMPLE=m
CONFIG_NET_IFE=m
CONFIG_NET_DEVLINK=m CONFIG_NET_DEVLINK=m
# CONFIG_UEVENT_HELPER is not set # CONFIG_UEVENT_HELPER is not set
CONFIG_DEVTMPFS=y CONFIG_DEVTMPFS=y
@ -352,6 +358,7 @@ CONFIG_NET_TEAM_MODE_LOADBALANCE=m
CONFIG_MACVLAN=m CONFIG_MACVLAN=m
CONFIG_MACVTAP=m CONFIG_MACVTAP=m
CONFIG_IPVLAN=m CONFIG_IPVLAN=m
CONFIG_IPVTAP=m
CONFIG_VXLAN=m CONFIG_VXLAN=m
CONFIG_GENEVE=m CONFIG_GENEVE=m
CONFIG_GTP=m CONFIG_GTP=m
@ -361,6 +368,7 @@ CONFIG_NETCONSOLE_DYNAMIC=y
CONFIG_VETH=m CONFIG_VETH=m
# CONFIG_NET_VENDOR_ALACRITECH is not set # CONFIG_NET_VENDOR_ALACRITECH is not set
# CONFIG_NET_VENDOR_AMAZON is not set # CONFIG_NET_VENDOR_AMAZON is not set
# CONFIG_NET_VENDOR_AQUANTIA is not set
# CONFIG_NET_VENDOR_ARC is not set # CONFIG_NET_VENDOR_ARC is not set
# CONFIG_NET_CADENCE is not set # CONFIG_NET_CADENCE is not set
# CONFIG_NET_VENDOR_BROADCOM is not set # CONFIG_NET_VENDOR_BROADCOM is not set
@ -377,7 +385,6 @@ CONFIG_MVME16x_NET=y
# CONFIG_NET_VENDOR_SEEQ is not set # CONFIG_NET_VENDOR_SEEQ is not set
# CONFIG_NET_VENDOR_SOLARFLARE is not set # CONFIG_NET_VENDOR_SOLARFLARE is not set
# CONFIG_NET_VENDOR_STMICRO is not set # CONFIG_NET_VENDOR_STMICRO is not set
# CONFIG_NET_VENDOR_SYNOPSYS is not set
# CONFIG_NET_VENDOR_VIA is not set # CONFIG_NET_VENDOR_VIA is not set
# CONFIG_NET_VENDOR_WIZNET is not set # CONFIG_NET_VENDOR_WIZNET is not set
CONFIG_PPP=m CONFIG_PPP=m
@ -515,6 +522,8 @@ CONFIG_NLS_MAC_TURKISH=m
CONFIG_DLM=m CONFIG_DLM=m
# CONFIG_SECTION_MISMATCH_WARN_ONLY is not set # CONFIG_SECTION_MISMATCH_WARN_ONLY is not set
CONFIG_MAGIC_SYSRQ=y CONFIG_MAGIC_SYSRQ=y
CONFIG_WW_MUTEX_SELFTEST=m
CONFIG_ATOMIC64_SELFTEST=m
CONFIG_ASYNC_RAID6_TEST=m CONFIG_ASYNC_RAID6_TEST=m
CONFIG_TEST_HEXDUMP=m CONFIG_TEST_HEXDUMP=m
CONFIG_TEST_STRING_HELPERS=m CONFIG_TEST_STRING_HELPERS=m
@ -545,6 +554,7 @@ CONFIG_CRYPTO_CHACHA20POLY1305=m
CONFIG_CRYPTO_LRW=m CONFIG_CRYPTO_LRW=m
CONFIG_CRYPTO_PCBC=m CONFIG_CRYPTO_PCBC=m
CONFIG_CRYPTO_KEYWRAP=m CONFIG_CRYPTO_KEYWRAP=m
CONFIG_CRYPTO_CMAC=m
CONFIG_CRYPTO_XCBC=m CONFIG_CRYPTO_XCBC=m
CONFIG_CRYPTO_VMAC=m CONFIG_CRYPTO_VMAC=m
CONFIG_CRYPTO_MICHAEL_MIC=m CONFIG_CRYPTO_MICHAEL_MIC=m
@ -556,6 +566,7 @@ CONFIG_CRYPTO_SHA512=m
CONFIG_CRYPTO_SHA3=m CONFIG_CRYPTO_SHA3=m
CONFIG_CRYPTO_TGR192=m CONFIG_CRYPTO_TGR192=m
CONFIG_CRYPTO_WP512=m CONFIG_CRYPTO_WP512=m
CONFIG_CRYPTO_AES_TI=m
CONFIG_CRYPTO_ANUBIS=m CONFIG_CRYPTO_ANUBIS=m
CONFIG_CRYPTO_BLOWFISH=m CONFIG_CRYPTO_BLOWFISH=m
CONFIG_CRYPTO_CAMELLIA=m CONFIG_CRYPTO_CAMELLIA=m
@ -580,4 +591,5 @@ CONFIG_CRYPTO_USER_API_SKCIPHER=m
CONFIG_CRYPTO_USER_API_RNG=m CONFIG_CRYPTO_USER_API_RNG=m
CONFIG_CRYPTO_USER_API_AEAD=m CONFIG_CRYPTO_USER_API_AEAD=m
# CONFIG_CRYPTO_HW is not set # CONFIG_CRYPTO_HW is not set
CONFIG_CRC32_SELFTEST=m
CONFIG_XZ_DEC_TEST=m CONFIG_XZ_DEC_TEST=m

View File

@ -26,6 +26,7 @@ CONFIG_SUN_PARTITION=y
# CONFIG_EFI_PARTITION is not set # CONFIG_EFI_PARTITION is not set
CONFIG_SYSV68_PARTITION=y CONFIG_SYSV68_PARTITION=y
CONFIG_IOSCHED_DEADLINE=m CONFIG_IOSCHED_DEADLINE=m
CONFIG_MQ_IOSCHED_DEADLINE=m
CONFIG_KEXEC=y CONFIG_KEXEC=y
CONFIG_BOOTINFO_PROC=y CONFIG_BOOTINFO_PROC=y
CONFIG_M68040=y CONFIG_M68040=y
@ -56,6 +57,7 @@ CONFIG_NET_IPVTI=m
CONFIG_NET_FOU_IP_TUNNELS=y CONFIG_NET_FOU_IP_TUNNELS=y
CONFIG_INET_AH=m CONFIG_INET_AH=m
CONFIG_INET_ESP=m CONFIG_INET_ESP=m
CONFIG_INET_ESP_OFFLOAD=m
CONFIG_INET_IPCOMP=m CONFIG_INET_IPCOMP=m
CONFIG_INET_XFRM_MODE_TRANSPORT=m CONFIG_INET_XFRM_MODE_TRANSPORT=m
CONFIG_INET_XFRM_MODE_TUNNEL=m CONFIG_INET_XFRM_MODE_TUNNEL=m
@ -67,6 +69,7 @@ CONFIG_IPV6=m
CONFIG_IPV6_ROUTER_PREF=y CONFIG_IPV6_ROUTER_PREF=y
CONFIG_INET6_AH=m CONFIG_INET6_AH=m
CONFIG_INET6_ESP=m CONFIG_INET6_ESP=m
CONFIG_INET6_ESP_OFFLOAD=m
CONFIG_INET6_IPCOMP=m CONFIG_INET6_IPCOMP=m
CONFIG_IPV6_ILA=m CONFIG_IPV6_ILA=m
CONFIG_IPV6_VTI=m CONFIG_IPV6_VTI=m
@ -97,6 +100,7 @@ CONFIG_NFT_NUMGEN=m
CONFIG_NFT_CT=m CONFIG_NFT_CT=m
CONFIG_NFT_SET_RBTREE=m CONFIG_NFT_SET_RBTREE=m
CONFIG_NFT_SET_HASH=m CONFIG_NFT_SET_HASH=m
CONFIG_NFT_SET_BITMAP=m
CONFIG_NFT_COUNTER=m CONFIG_NFT_COUNTER=m
CONFIG_NFT_LOG=m CONFIG_NFT_LOG=m
CONFIG_NFT_LIMIT=m CONFIG_NFT_LIMIT=m
@ -294,6 +298,8 @@ CONFIG_MPLS_IPTUNNEL=m
CONFIG_NET_L3_MASTER_DEV=y CONFIG_NET_L3_MASTER_DEV=y
CONFIG_AF_KCM=m CONFIG_AF_KCM=m
# CONFIG_WIRELESS is not set # CONFIG_WIRELESS is not set
CONFIG_PSAMPLE=m
CONFIG_NET_IFE=m
CONFIG_NET_DEVLINK=m CONFIG_NET_DEVLINK=m
# CONFIG_UEVENT_HELPER is not set # CONFIG_UEVENT_HELPER is not set
CONFIG_DEVTMPFS=y CONFIG_DEVTMPFS=y
@ -358,6 +364,7 @@ CONFIG_NET_TEAM_MODE_LOADBALANCE=m
CONFIG_MACVLAN=m CONFIG_MACVLAN=m
CONFIG_MACVTAP=m CONFIG_MACVTAP=m
CONFIG_IPVLAN=m CONFIG_IPVLAN=m
CONFIG_IPVTAP=m
CONFIG_VXLAN=m CONFIG_VXLAN=m
CONFIG_GENEVE=m CONFIG_GENEVE=m
CONFIG_GTP=m CONFIG_GTP=m
@ -369,6 +376,7 @@ CONFIG_VETH=m
# CONFIG_NET_VENDOR_ALACRITECH is not set # CONFIG_NET_VENDOR_ALACRITECH is not set
# CONFIG_NET_VENDOR_AMAZON is not set # CONFIG_NET_VENDOR_AMAZON is not set
# CONFIG_NET_VENDOR_AMD is not set # CONFIG_NET_VENDOR_AMD is not set
# CONFIG_NET_VENDOR_AQUANTIA is not set
# CONFIG_NET_VENDOR_ARC is not set # CONFIG_NET_VENDOR_ARC is not set
# CONFIG_NET_CADENCE is not set # CONFIG_NET_CADENCE is not set
# CONFIG_NET_VENDOR_BROADCOM is not set # CONFIG_NET_VENDOR_BROADCOM is not set
@ -388,7 +396,6 @@ CONFIG_NE2000=y
# CONFIG_NET_VENDOR_SOLARFLARE is not set # CONFIG_NET_VENDOR_SOLARFLARE is not set
# CONFIG_NET_VENDOR_SMSC is not set # CONFIG_NET_VENDOR_SMSC is not set
# CONFIG_NET_VENDOR_STMICRO is not set # CONFIG_NET_VENDOR_STMICRO is not set
# CONFIG_NET_VENDOR_SYNOPSYS is not set
# CONFIG_NET_VENDOR_VIA is not set # CONFIG_NET_VENDOR_VIA is not set
# CONFIG_NET_VENDOR_WIZNET is not set # CONFIG_NET_VENDOR_WIZNET is not set
CONFIG_PLIP=m CONFIG_PLIP=m
@ -538,6 +545,8 @@ CONFIG_NLS_MAC_TURKISH=m
CONFIG_DLM=m CONFIG_DLM=m
# CONFIG_SECTION_MISMATCH_WARN_ONLY is not set # CONFIG_SECTION_MISMATCH_WARN_ONLY is not set
CONFIG_MAGIC_SYSRQ=y CONFIG_MAGIC_SYSRQ=y
CONFIG_WW_MUTEX_SELFTEST=m
CONFIG_ATOMIC64_SELFTEST=m
CONFIG_ASYNC_RAID6_TEST=m CONFIG_ASYNC_RAID6_TEST=m
CONFIG_TEST_HEXDUMP=m CONFIG_TEST_HEXDUMP=m
CONFIG_TEST_STRING_HELPERS=m CONFIG_TEST_STRING_HELPERS=m
@ -568,6 +577,7 @@ CONFIG_CRYPTO_CHACHA20POLY1305=m
CONFIG_CRYPTO_LRW=m CONFIG_CRYPTO_LRW=m
CONFIG_CRYPTO_PCBC=m CONFIG_CRYPTO_PCBC=m
CONFIG_CRYPTO_KEYWRAP=m CONFIG_CRYPTO_KEYWRAP=m
CONFIG_CRYPTO_CMAC=m
CONFIG_CRYPTO_XCBC=m CONFIG_CRYPTO_XCBC=m
CONFIG_CRYPTO_VMAC=m CONFIG_CRYPTO_VMAC=m
CONFIG_CRYPTO_MICHAEL_MIC=m CONFIG_CRYPTO_MICHAEL_MIC=m
@ -579,6 +589,7 @@ CONFIG_CRYPTO_SHA512=m
CONFIG_CRYPTO_SHA3=m CONFIG_CRYPTO_SHA3=m
CONFIG_CRYPTO_TGR192=m CONFIG_CRYPTO_TGR192=m
CONFIG_CRYPTO_WP512=m CONFIG_CRYPTO_WP512=m
CONFIG_CRYPTO_AES_TI=m
CONFIG_CRYPTO_ANUBIS=m CONFIG_CRYPTO_ANUBIS=m
CONFIG_CRYPTO_BLOWFISH=m CONFIG_CRYPTO_BLOWFISH=m
CONFIG_CRYPTO_CAMELLIA=m CONFIG_CRYPTO_CAMELLIA=m
@ -603,4 +614,5 @@ CONFIG_CRYPTO_USER_API_SKCIPHER=m
CONFIG_CRYPTO_USER_API_RNG=m CONFIG_CRYPTO_USER_API_RNG=m
CONFIG_CRYPTO_USER_API_AEAD=m CONFIG_CRYPTO_USER_API_AEAD=m
# CONFIG_CRYPTO_HW is not set # CONFIG_CRYPTO_HW is not set
CONFIG_CRC32_SELFTEST=m
CONFIG_XZ_DEC_TEST=m CONFIG_XZ_DEC_TEST=m

View File

@ -25,6 +25,7 @@ CONFIG_UNIXWARE_DISKLABEL=y
# CONFIG_EFI_PARTITION is not set # CONFIG_EFI_PARTITION is not set
CONFIG_SYSV68_PARTITION=y CONFIG_SYSV68_PARTITION=y
CONFIG_IOSCHED_DEADLINE=m CONFIG_IOSCHED_DEADLINE=m
CONFIG_MQ_IOSCHED_DEADLINE=m
CONFIG_KEXEC=y CONFIG_KEXEC=y
CONFIG_BOOTINFO_PROC=y CONFIG_BOOTINFO_PROC=y
CONFIG_SUN3=y CONFIG_SUN3=y
@ -53,6 +54,7 @@ CONFIG_NET_IPVTI=m
CONFIG_NET_FOU_IP_TUNNELS=y CONFIG_NET_FOU_IP_TUNNELS=y
CONFIG_INET_AH=m CONFIG_INET_AH=m
CONFIG_INET_ESP=m CONFIG_INET_ESP=m
CONFIG_INET_ESP_OFFLOAD=m
CONFIG_INET_IPCOMP=m CONFIG_INET_IPCOMP=m
CONFIG_INET_XFRM_MODE_TRANSPORT=m CONFIG_INET_XFRM_MODE_TRANSPORT=m
CONFIG_INET_XFRM_MODE_TUNNEL=m CONFIG_INET_XFRM_MODE_TUNNEL=m
@ -64,6 +66,7 @@ CONFIG_IPV6=m
CONFIG_IPV6_ROUTER_PREF=y CONFIG_IPV6_ROUTER_PREF=y
CONFIG_INET6_AH=m CONFIG_INET6_AH=m
CONFIG_INET6_ESP=m CONFIG_INET6_ESP=m
CONFIG_INET6_ESP_OFFLOAD=m
CONFIG_INET6_IPCOMP=m CONFIG_INET6_IPCOMP=m
CONFIG_IPV6_ILA=m CONFIG_IPV6_ILA=m
CONFIG_IPV6_VTI=m CONFIG_IPV6_VTI=m
@ -94,6 +97,7 @@ CONFIG_NFT_NUMGEN=m
CONFIG_NFT_CT=m CONFIG_NFT_CT=m
CONFIG_NFT_SET_RBTREE=m CONFIG_NFT_SET_RBTREE=m
CONFIG_NFT_SET_HASH=m CONFIG_NFT_SET_HASH=m
CONFIG_NFT_SET_BITMAP=m
CONFIG_NFT_COUNTER=m CONFIG_NFT_COUNTER=m
CONFIG_NFT_LOG=m CONFIG_NFT_LOG=m
CONFIG_NFT_LIMIT=m CONFIG_NFT_LIMIT=m
@ -291,6 +295,8 @@ CONFIG_MPLS_IPTUNNEL=m
CONFIG_NET_L3_MASTER_DEV=y CONFIG_NET_L3_MASTER_DEV=y
CONFIG_AF_KCM=m CONFIG_AF_KCM=m
# CONFIG_WIRELESS is not set # CONFIG_WIRELESS is not set
CONFIG_PSAMPLE=m
CONFIG_NET_IFE=m
CONFIG_NET_DEVLINK=m CONFIG_NET_DEVLINK=m
# CONFIG_UEVENT_HELPER is not set # CONFIG_UEVENT_HELPER is not set
CONFIG_DEVTMPFS=y CONFIG_DEVTMPFS=y
@ -349,6 +355,7 @@ CONFIG_NET_TEAM_MODE_LOADBALANCE=m
CONFIG_MACVLAN=m CONFIG_MACVLAN=m
CONFIG_MACVTAP=m CONFIG_MACVTAP=m
CONFIG_IPVLAN=m CONFIG_IPVLAN=m
CONFIG_IPVTAP=m
CONFIG_VXLAN=m CONFIG_VXLAN=m
CONFIG_GENEVE=m CONFIG_GENEVE=m
CONFIG_GTP=m CONFIG_GTP=m
@ -359,6 +366,7 @@ CONFIG_VETH=m
# CONFIG_NET_VENDOR_ALACRITECH is not set # CONFIG_NET_VENDOR_ALACRITECH is not set
# CONFIG_NET_VENDOR_AMAZON is not set # CONFIG_NET_VENDOR_AMAZON is not set
CONFIG_SUN3LANCE=y CONFIG_SUN3LANCE=y
# CONFIG_NET_VENDOR_AQUANTIA is not set
# CONFIG_NET_VENDOR_ARC is not set # CONFIG_NET_VENDOR_ARC is not set
# CONFIG_NET_CADENCE is not set # CONFIG_NET_CADENCE is not set
# CONFIG_NET_VENDOR_EZCHIP is not set # CONFIG_NET_VENDOR_EZCHIP is not set
@ -375,7 +383,6 @@ CONFIG_SUN3_82586=y
# CONFIG_NET_VENDOR_SOLARFLARE is not set # CONFIG_NET_VENDOR_SOLARFLARE is not set
# CONFIG_NET_VENDOR_STMICRO is not set # CONFIG_NET_VENDOR_STMICRO is not set
# CONFIG_NET_VENDOR_SUN is not set # CONFIG_NET_VENDOR_SUN is not set
# CONFIG_NET_VENDOR_SYNOPSYS is not set
# CONFIG_NET_VENDOR_VIA is not set # CONFIG_NET_VENDOR_VIA is not set
# CONFIG_NET_VENDOR_WIZNET is not set # CONFIG_NET_VENDOR_WIZNET is not set
CONFIG_PPP=m CONFIG_PPP=m
@ -517,6 +524,8 @@ CONFIG_NLS_MAC_TURKISH=m
CONFIG_DLM=m CONFIG_DLM=m
# CONFIG_SECTION_MISMATCH_WARN_ONLY is not set # CONFIG_SECTION_MISMATCH_WARN_ONLY is not set
CONFIG_MAGIC_SYSRQ=y CONFIG_MAGIC_SYSRQ=y
CONFIG_WW_MUTEX_SELFTEST=m
CONFIG_ATOMIC64_SELFTEST=m
CONFIG_ASYNC_RAID6_TEST=m CONFIG_ASYNC_RAID6_TEST=m
CONFIG_TEST_HEXDUMP=m CONFIG_TEST_HEXDUMP=m
CONFIG_TEST_STRING_HELPERS=m CONFIG_TEST_STRING_HELPERS=m
@ -546,6 +555,7 @@ CONFIG_CRYPTO_CHACHA20POLY1305=m
CONFIG_CRYPTO_LRW=m CONFIG_CRYPTO_LRW=m
CONFIG_CRYPTO_PCBC=m CONFIG_CRYPTO_PCBC=m
CONFIG_CRYPTO_KEYWRAP=m CONFIG_CRYPTO_KEYWRAP=m
CONFIG_CRYPTO_CMAC=m
CONFIG_CRYPTO_XCBC=m CONFIG_CRYPTO_XCBC=m
CONFIG_CRYPTO_VMAC=m CONFIG_CRYPTO_VMAC=m
CONFIG_CRYPTO_MICHAEL_MIC=m CONFIG_CRYPTO_MICHAEL_MIC=m
@ -557,6 +567,7 @@ CONFIG_CRYPTO_SHA512=m
CONFIG_CRYPTO_SHA3=m CONFIG_CRYPTO_SHA3=m
CONFIG_CRYPTO_TGR192=m CONFIG_CRYPTO_TGR192=m
CONFIG_CRYPTO_WP512=m CONFIG_CRYPTO_WP512=m
CONFIG_CRYPTO_AES_TI=m
CONFIG_CRYPTO_ANUBIS=m CONFIG_CRYPTO_ANUBIS=m
CONFIG_CRYPTO_BLOWFISH=m CONFIG_CRYPTO_BLOWFISH=m
CONFIG_CRYPTO_CAMELLIA=m CONFIG_CRYPTO_CAMELLIA=m
@ -581,4 +592,5 @@ CONFIG_CRYPTO_USER_API_SKCIPHER=m
CONFIG_CRYPTO_USER_API_RNG=m CONFIG_CRYPTO_USER_API_RNG=m
CONFIG_CRYPTO_USER_API_AEAD=m CONFIG_CRYPTO_USER_API_AEAD=m
# CONFIG_CRYPTO_HW is not set # CONFIG_CRYPTO_HW is not set
CONFIG_CRC32_SELFTEST=m
CONFIG_XZ_DEC_TEST=m CONFIG_XZ_DEC_TEST=m

View File

@ -25,6 +25,7 @@ CONFIG_UNIXWARE_DISKLABEL=y
# CONFIG_EFI_PARTITION is not set # CONFIG_EFI_PARTITION is not set
CONFIG_SYSV68_PARTITION=y CONFIG_SYSV68_PARTITION=y
CONFIG_IOSCHED_DEADLINE=m CONFIG_IOSCHED_DEADLINE=m
CONFIG_MQ_IOSCHED_DEADLINE=m
CONFIG_KEXEC=y CONFIG_KEXEC=y
CONFIG_BOOTINFO_PROC=y CONFIG_BOOTINFO_PROC=y
CONFIG_SUN3X=y CONFIG_SUN3X=y
@ -53,6 +54,7 @@ CONFIG_NET_IPVTI=m
CONFIG_NET_FOU_IP_TUNNELS=y CONFIG_NET_FOU_IP_TUNNELS=y
CONFIG_INET_AH=m CONFIG_INET_AH=m
CONFIG_INET_ESP=m CONFIG_INET_ESP=m
CONFIG_INET_ESP_OFFLOAD=m
CONFIG_INET_IPCOMP=m CONFIG_INET_IPCOMP=m
CONFIG_INET_XFRM_MODE_TRANSPORT=m CONFIG_INET_XFRM_MODE_TRANSPORT=m
CONFIG_INET_XFRM_MODE_TUNNEL=m CONFIG_INET_XFRM_MODE_TUNNEL=m
@ -64,6 +66,7 @@ CONFIG_IPV6=m
CONFIG_IPV6_ROUTER_PREF=y CONFIG_IPV6_ROUTER_PREF=y
CONFIG_INET6_AH=m CONFIG_INET6_AH=m
CONFIG_INET6_ESP=m CONFIG_INET6_ESP=m
CONFIG_INET6_ESP_OFFLOAD=m
CONFIG_INET6_IPCOMP=m CONFIG_INET6_IPCOMP=m
CONFIG_IPV6_ILA=m CONFIG_IPV6_ILA=m
CONFIG_IPV6_VTI=m CONFIG_IPV6_VTI=m
@ -94,6 +97,7 @@ CONFIG_NFT_NUMGEN=m
CONFIG_NFT_CT=m CONFIG_NFT_CT=m
CONFIG_NFT_SET_RBTREE=m CONFIG_NFT_SET_RBTREE=m
CONFIG_NFT_SET_HASH=m CONFIG_NFT_SET_HASH=m
CONFIG_NFT_SET_BITMAP=m
CONFIG_NFT_COUNTER=m CONFIG_NFT_COUNTER=m
CONFIG_NFT_LOG=m CONFIG_NFT_LOG=m
CONFIG_NFT_LIMIT=m CONFIG_NFT_LIMIT=m
@ -291,6 +295,8 @@ CONFIG_MPLS_IPTUNNEL=m
CONFIG_NET_L3_MASTER_DEV=y CONFIG_NET_L3_MASTER_DEV=y
CONFIG_AF_KCM=m CONFIG_AF_KCM=m
# CONFIG_WIRELESS is not set # CONFIG_WIRELESS is not set
CONFIG_PSAMPLE=m
CONFIG_NET_IFE=m
CONFIG_NET_DEVLINK=m CONFIG_NET_DEVLINK=m
# CONFIG_UEVENT_HELPER is not set # CONFIG_UEVENT_HELPER is not set
CONFIG_DEVTMPFS=y CONFIG_DEVTMPFS=y
@ -349,6 +355,7 @@ CONFIG_NET_TEAM_MODE_LOADBALANCE=m
CONFIG_MACVLAN=m CONFIG_MACVLAN=m
CONFIG_MACVTAP=m CONFIG_MACVTAP=m
CONFIG_IPVLAN=m CONFIG_IPVLAN=m
CONFIG_IPVTAP=m
CONFIG_VXLAN=m CONFIG_VXLAN=m
CONFIG_GENEVE=m CONFIG_GENEVE=m
CONFIG_GTP=m CONFIG_GTP=m
@ -359,6 +366,7 @@ CONFIG_VETH=m
# CONFIG_NET_VENDOR_ALACRITECH is not set # CONFIG_NET_VENDOR_ALACRITECH is not set
# CONFIG_NET_VENDOR_AMAZON is not set # CONFIG_NET_VENDOR_AMAZON is not set
CONFIG_SUN3LANCE=y CONFIG_SUN3LANCE=y
# CONFIG_NET_VENDOR_AQUANTIA is not set
# CONFIG_NET_VENDOR_ARC is not set # CONFIG_NET_VENDOR_ARC is not set
# CONFIG_NET_CADENCE is not set # CONFIG_NET_CADENCE is not set
# CONFIG_NET_VENDOR_BROADCOM is not set # CONFIG_NET_VENDOR_BROADCOM is not set
@ -375,7 +383,6 @@ CONFIG_SUN3LANCE=y
# CONFIG_NET_VENDOR_SEEQ is not set # CONFIG_NET_VENDOR_SEEQ is not set
# CONFIG_NET_VENDOR_SOLARFLARE is not set # CONFIG_NET_VENDOR_SOLARFLARE is not set
# CONFIG_NET_VENDOR_STMICRO is not set # CONFIG_NET_VENDOR_STMICRO is not set
# CONFIG_NET_VENDOR_SYNOPSYS is not set
# CONFIG_NET_VENDOR_VIA is not set # CONFIG_NET_VENDOR_VIA is not set
# CONFIG_NET_VENDOR_WIZNET is not set # CONFIG_NET_VENDOR_WIZNET is not set
CONFIG_PPP=m CONFIG_PPP=m
@ -517,6 +524,8 @@ CONFIG_NLS_MAC_TURKISH=m
CONFIG_DLM=m CONFIG_DLM=m
# CONFIG_SECTION_MISMATCH_WARN_ONLY is not set # CONFIG_SECTION_MISMATCH_WARN_ONLY is not set
CONFIG_MAGIC_SYSRQ=y CONFIG_MAGIC_SYSRQ=y
CONFIG_WW_MUTEX_SELFTEST=m
CONFIG_ATOMIC64_SELFTEST=m
CONFIG_ASYNC_RAID6_TEST=m CONFIG_ASYNC_RAID6_TEST=m
CONFIG_TEST_HEXDUMP=m CONFIG_TEST_HEXDUMP=m
CONFIG_TEST_STRING_HELPERS=m CONFIG_TEST_STRING_HELPERS=m
@ -547,6 +556,7 @@ CONFIG_CRYPTO_CHACHA20POLY1305=m
CONFIG_CRYPTO_LRW=m CONFIG_CRYPTO_LRW=m
CONFIG_CRYPTO_PCBC=m CONFIG_CRYPTO_PCBC=m
CONFIG_CRYPTO_KEYWRAP=m CONFIG_CRYPTO_KEYWRAP=m
CONFIG_CRYPTO_CMAC=m
CONFIG_CRYPTO_XCBC=m CONFIG_CRYPTO_XCBC=m
CONFIG_CRYPTO_VMAC=m CONFIG_CRYPTO_VMAC=m
CONFIG_CRYPTO_MICHAEL_MIC=m CONFIG_CRYPTO_MICHAEL_MIC=m
@ -558,6 +568,7 @@ CONFIG_CRYPTO_SHA512=m
CONFIG_CRYPTO_SHA3=m CONFIG_CRYPTO_SHA3=m
CONFIG_CRYPTO_TGR192=m CONFIG_CRYPTO_TGR192=m
CONFIG_CRYPTO_WP512=m CONFIG_CRYPTO_WP512=m
CONFIG_CRYPTO_AES_TI=m
CONFIG_CRYPTO_ANUBIS=m CONFIG_CRYPTO_ANUBIS=m
CONFIG_CRYPTO_BLOWFISH=m CONFIG_CRYPTO_BLOWFISH=m
CONFIG_CRYPTO_CAMELLIA=m CONFIG_CRYPTO_CAMELLIA=m
@ -582,4 +593,5 @@ CONFIG_CRYPTO_USER_API_SKCIPHER=m
CONFIG_CRYPTO_USER_API_RNG=m CONFIG_CRYPTO_USER_API_RNG=m
CONFIG_CRYPTO_USER_API_AEAD=m CONFIG_CRYPTO_USER_API_AEAD=m
# CONFIG_CRYPTO_HW is not set # CONFIG_CRYPTO_HW is not set
CONFIG_CRC32_SELFTEST=m
CONFIG_XZ_DEC_TEST=m CONFIG_XZ_DEC_TEST=m

View File

@ -148,7 +148,7 @@ static inline void bfchg_mem_change_bit(int nr, volatile unsigned long *vaddr)
#define __change_bit(nr, vaddr) change_bit(nr, vaddr) #define __change_bit(nr, vaddr) change_bit(nr, vaddr)
static inline int test_bit(int nr, const unsigned long *vaddr) static inline int test_bit(int nr, const volatile unsigned long *vaddr)
{ {
return (vaddr[nr >> 5] & (1UL << (nr & 31))) != 0; return (vaddr[nr >> 5] & (1UL << (nr & 31))) != 0;
} }

View File

@ -4,7 +4,7 @@
#include <uapi/asm/unistd.h> #include <uapi/asm/unistd.h>
#define NR_syscalls 379 #define NR_syscalls 380
#define __ARCH_WANT_OLD_READDIR #define __ARCH_WANT_OLD_READDIR
#define __ARCH_WANT_OLD_STAT #define __ARCH_WANT_OLD_STAT

View File

@ -384,5 +384,6 @@
#define __NR_copy_file_range 376 #define __NR_copy_file_range 376
#define __NR_preadv2 377 #define __NR_preadv2 377
#define __NR_pwritev2 378 #define __NR_pwritev2 378
#define __NR_statx 379
#endif /* _UAPI_ASM_M68K_UNISTD_H_ */ #endif /* _UAPI_ASM_M68K_UNISTD_H_ */

View File

@ -399,3 +399,4 @@ ENTRY(sys_call_table)
.long sys_copy_file_range .long sys_copy_file_range
.long sys_preadv2 .long sys_preadv2
.long sys_pwritev2 .long sys_pwritev2
.long sys_statx

View File

@ -26,6 +26,16 @@
* user_regset definitions. * user_regset definitions.
*/ */
static unsigned long user_txstatus(const struct pt_regs *regs)
{
unsigned long data = (unsigned long)regs->ctx.Flags;
if (regs->ctx.SaveMask & TBICTX_CBUF_BIT)
data |= USER_GP_REGS_STATUS_CATCH_BIT;
return data;
}
int metag_gp_regs_copyout(const struct pt_regs *regs, int metag_gp_regs_copyout(const struct pt_regs *regs,
unsigned int pos, unsigned int count, unsigned int pos, unsigned int count,
void *kbuf, void __user *ubuf) void *kbuf, void __user *ubuf)
@ -64,9 +74,7 @@ int metag_gp_regs_copyout(const struct pt_regs *regs,
if (ret) if (ret)
goto out; goto out;
/* TXSTATUS */ /* TXSTATUS */
data = (unsigned long)regs->ctx.Flags; data = user_txstatus(regs);
if (regs->ctx.SaveMask & TBICTX_CBUF_BIT)
data |= USER_GP_REGS_STATUS_CATCH_BIT;
ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
&data, 4*25, 4*26); &data, 4*25, 4*26);
if (ret) if (ret)
@ -121,6 +129,7 @@ int metag_gp_regs_copyin(struct pt_regs *regs,
if (ret) if (ret)
goto out; goto out;
/* TXSTATUS */ /* TXSTATUS */
data = user_txstatus(regs);
ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
&data, 4*25, 4*26); &data, 4*25, 4*26);
if (ret) if (ret)
@ -246,6 +255,8 @@ int metag_rp_state_copyin(struct pt_regs *regs,
unsigned long long *ptr; unsigned long long *ptr;
int ret, i; int ret, i;
if (count < 4*13)
return -EINVAL;
/* Read the entire pipeline before making any changes */ /* Read the entire pipeline before making any changes */
ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
&rp, 0, 4*13); &rp, 0, 4*13);
@ -305,7 +316,7 @@ static int metag_tls_set(struct task_struct *target,
const void *kbuf, const void __user *ubuf) const void *kbuf, const void __user *ubuf)
{ {
int ret; int ret;
void __user *tls; void __user *tls = target->thread.tls_ptr;
ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &tls, 0, -1); ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &tls, 0, -1);
if (ret) if (ret)

View File

@ -456,7 +456,8 @@ static int fpr_set(struct task_struct *target,
&target->thread.fpu, &target->thread.fpu,
0, sizeof(elf_fpregset_t)); 0, sizeof(elf_fpregset_t));
for (i = 0; i < NUM_FPU_REGS; i++) { BUILD_BUG_ON(sizeof(fpr_val) != sizeof(elf_fpreg_t));
for (i = 0; i < NUM_FPU_REGS && count >= sizeof(elf_fpreg_t); i++) {
err = user_regset_copyin(&pos, &count, &kbuf, &ubuf, err = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
&fpr_val, i * sizeof(elf_fpreg_t), &fpr_val, i * sizeof(elf_fpreg_t),
(i + 1) * sizeof(elf_fpreg_t)); (i + 1) * sizeof(elf_fpreg_t));

View File

@ -64,6 +64,15 @@ struct exception_table_entry {
".word (" #fault_addr " - .), (" #except_addr " - .)\n\t" \ ".word (" #fault_addr " - .), (" #except_addr " - .)\n\t" \
".previous\n" ".previous\n"
/*
* ASM_EXCEPTIONTABLE_ENTRY_EFAULT() creates a special exception table entry
* (with lowest bit set) for which the fault handler in fixup_exception() will
* load -EFAULT into %r8 for a read or write fault, and zeroes the target
* register in case of a read fault in get_user().
*/
#define ASM_EXCEPTIONTABLE_ENTRY_EFAULT( fault_addr, except_addr )\
ASM_EXCEPTIONTABLE_ENTRY( fault_addr, except_addr + 1)
/* /*
* The page fault handler stores, in a per-cpu area, the following information * The page fault handler stores, in a per-cpu area, the following information
* if a fixup routine is available. * if a fixup routine is available.
@ -91,7 +100,7 @@ struct exception_data {
#define __get_user(x, ptr) \ #define __get_user(x, ptr) \
({ \ ({ \
register long __gu_err __asm__ ("r8") = 0; \ register long __gu_err __asm__ ("r8") = 0; \
register long __gu_val __asm__ ("r9") = 0; \ register long __gu_val; \
\ \
load_sr2(); \ load_sr2(); \
switch (sizeof(*(ptr))) { \ switch (sizeof(*(ptr))) { \
@ -107,22 +116,23 @@ struct exception_data {
}) })
#define __get_user_asm(ldx, ptr) \ #define __get_user_asm(ldx, ptr) \
__asm__("\n1:\t" ldx "\t0(%%sr2,%2),%0\n\t" \ __asm__("1: " ldx " 0(%%sr2,%2),%0\n" \
ASM_EXCEPTIONTABLE_ENTRY(1b, fixup_get_user_skip_1)\ "9:\n" \
ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 9b) \
: "=r"(__gu_val), "=r"(__gu_err) \ : "=r"(__gu_val), "=r"(__gu_err) \
: "r"(ptr), "1"(__gu_err) \ : "r"(ptr), "1"(__gu_err));
: "r1");
#if !defined(CONFIG_64BIT) #if !defined(CONFIG_64BIT)
#define __get_user_asm64(ptr) \ #define __get_user_asm64(ptr) \
__asm__("\n1:\tldw 0(%%sr2,%2),%0" \ __asm__(" copy %%r0,%R0\n" \
"\n2:\tldw 4(%%sr2,%2),%R0\n\t" \ "1: ldw 0(%%sr2,%2),%0\n" \
ASM_EXCEPTIONTABLE_ENTRY(1b, fixup_get_user_skip_2)\ "2: ldw 4(%%sr2,%2),%R0\n" \
ASM_EXCEPTIONTABLE_ENTRY(2b, fixup_get_user_skip_1)\ "9:\n" \
ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 9b) \
ASM_EXCEPTIONTABLE_ENTRY_EFAULT(2b, 9b) \
: "=r"(__gu_val), "=r"(__gu_err) \ : "=r"(__gu_val), "=r"(__gu_err) \
: "r"(ptr), "1"(__gu_err) \ : "r"(ptr), "1"(__gu_err));
: "r1");
#endif /* !defined(CONFIG_64BIT) */ #endif /* !defined(CONFIG_64BIT) */
@ -148,32 +158,31 @@ struct exception_data {
* The "__put_user/kernel_asm()" macros tell gcc they read from memory * The "__put_user/kernel_asm()" macros tell gcc they read from memory
* instead of writing. This is because they do not write to any memory * instead of writing. This is because they do not write to any memory
* gcc knows about, so there are no aliasing issues. These macros must * gcc knows about, so there are no aliasing issues. These macros must
* also be aware that "fixup_put_user_skip_[12]" are executed in the * also be aware that fixups are executed in the context of the fault,
* context of the fault, and any registers used there must be listed * and any registers used there must be listed as clobbers.
* as clobbers. In this case only "r1" is used by the current routines. * r8 is already listed as err.
* r8/r9 are already listed as err/val.
*/ */
#define __put_user_asm(stx, x, ptr) \ #define __put_user_asm(stx, x, ptr) \
__asm__ __volatile__ ( \ __asm__ __volatile__ ( \
"\n1:\t" stx "\t%2,0(%%sr2,%1)\n\t" \ "1: " stx " %2,0(%%sr2,%1)\n" \
ASM_EXCEPTIONTABLE_ENTRY(1b, fixup_put_user_skip_1)\ "9:\n" \
ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 9b) \
: "=r"(__pu_err) \ : "=r"(__pu_err) \
: "r"(ptr), "r"(x), "0"(__pu_err) \ : "r"(ptr), "r"(x), "0"(__pu_err))
: "r1")
#if !defined(CONFIG_64BIT) #if !defined(CONFIG_64BIT)
#define __put_user_asm64(__val, ptr) do { \ #define __put_user_asm64(__val, ptr) do { \
__asm__ __volatile__ ( \ __asm__ __volatile__ ( \
"\n1:\tstw %2,0(%%sr2,%1)" \ "1: stw %2,0(%%sr2,%1)\n" \
"\n2:\tstw %R2,4(%%sr2,%1)\n\t" \ "2: stw %R2,4(%%sr2,%1)\n" \
ASM_EXCEPTIONTABLE_ENTRY(1b, fixup_put_user_skip_2)\ "9:\n" \
ASM_EXCEPTIONTABLE_ENTRY(2b, fixup_put_user_skip_1)\ ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 9b) \
ASM_EXCEPTIONTABLE_ENTRY_EFAULT(2b, 9b) \
: "=r"(__pu_err) \ : "=r"(__pu_err) \
: "r"(ptr), "r"(__val), "0"(__pu_err) \ : "r"(ptr), "r"(__val), "0"(__pu_err)); \
: "r1"); \
} while (0) } while (0)
#endif /* !defined(CONFIG_64BIT) */ #endif /* !defined(CONFIG_64BIT) */

View File

@ -47,16 +47,6 @@ EXPORT_SYMBOL(__cmpxchg_u64);
EXPORT_SYMBOL(lclear_user); EXPORT_SYMBOL(lclear_user);
EXPORT_SYMBOL(lstrnlen_user); EXPORT_SYMBOL(lstrnlen_user);
/* Global fixups - defined as int to avoid creation of function pointers */
extern int fixup_get_user_skip_1;
extern int fixup_get_user_skip_2;
extern int fixup_put_user_skip_1;
extern int fixup_put_user_skip_2;
EXPORT_SYMBOL(fixup_get_user_skip_1);
EXPORT_SYMBOL(fixup_get_user_skip_2);
EXPORT_SYMBOL(fixup_put_user_skip_1);
EXPORT_SYMBOL(fixup_put_user_skip_2);
#ifndef CONFIG_64BIT #ifndef CONFIG_64BIT
/* Needed so insmod can set dp value */ /* Needed so insmod can set dp value */
extern int $global$; extern int $global$;

View File

@ -143,6 +143,8 @@ void machine_power_off(void)
printk(KERN_EMERG "System shut down completed.\n" printk(KERN_EMERG "System shut down completed.\n"
"Please power this system off now."); "Please power this system off now.");
/* prevent soft lockup/stalled CPU messages for endless loop. */
rcu_sysrq_start();
for (;;); for (;;);
} }

View File

@ -2,7 +2,7 @@
# Makefile for parisc-specific library files # Makefile for parisc-specific library files
# #
lib-y := lusercopy.o bitops.o checksum.o io.o memset.o fixup.o memcpy.o \ lib-y := lusercopy.o bitops.o checksum.o io.o memset.o memcpy.o \
ucmpdi2.o delay.o ucmpdi2.o delay.o
obj-y := iomap.o obj-y := iomap.o

View File

@ -1,98 +0,0 @@
/*
* Linux/PA-RISC Project (http://www.parisc-linux.org/)
*
* Copyright (C) 2004 Randolph Chung <tausq@debian.org>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2, or (at your option)
* any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*
* Fixup routines for kernel exception handling.
*/
#include <asm/asm-offsets.h>
#include <asm/assembly.h>
#include <asm/errno.h>
#include <linux/linkage.h>
#ifdef CONFIG_SMP
.macro get_fault_ip t1 t2
loadgp
addil LT%__per_cpu_offset,%r27
LDREG RT%__per_cpu_offset(%r1),\t1
/* t2 = smp_processor_id() */
mfctl 30,\t2
ldw TI_CPU(\t2),\t2
#ifdef CONFIG_64BIT
extrd,u \t2,63,32,\t2
#endif
/* t2 = &__per_cpu_offset[smp_processor_id()]; */
LDREGX \t2(\t1),\t2
addil LT%exception_data,%r27
LDREG RT%exception_data(%r1),\t1
/* t1 = this_cpu_ptr(&exception_data) */
add,l \t1,\t2,\t1
/* %r27 = t1->fault_gp - restore gp */
LDREG EXCDATA_GP(\t1), %r27
/* t1 = t1->fault_ip */
LDREG EXCDATA_IP(\t1), \t1
.endm
#else
.macro get_fault_ip t1 t2
loadgp
/* t1 = this_cpu_ptr(&exception_data) */
addil LT%exception_data,%r27
LDREG RT%exception_data(%r1),\t2
/* %r27 = t2->fault_gp - restore gp */
LDREG EXCDATA_GP(\t2), %r27
/* t1 = t2->fault_ip */
LDREG EXCDATA_IP(\t2), \t1
.endm
#endif
.level LEVEL
.text
.section .fixup, "ax"
/* get_user() fixups, store -EFAULT in r8, and 0 in r9 */
ENTRY_CFI(fixup_get_user_skip_1)
get_fault_ip %r1,%r8
ldo 4(%r1), %r1
ldi -EFAULT, %r8
bv %r0(%r1)
copy %r0, %r9
ENDPROC_CFI(fixup_get_user_skip_1)
ENTRY_CFI(fixup_get_user_skip_2)
get_fault_ip %r1,%r8
ldo 8(%r1), %r1
ldi -EFAULT, %r8
bv %r0(%r1)
copy %r0, %r9
ENDPROC_CFI(fixup_get_user_skip_2)
/* put_user() fixups, store -EFAULT in r8 */
ENTRY_CFI(fixup_put_user_skip_1)
get_fault_ip %r1,%r8
ldo 4(%r1), %r1
bv %r0(%r1)
ldi -EFAULT, %r8
ENDPROC_CFI(fixup_put_user_skip_1)
ENTRY_CFI(fixup_put_user_skip_2)
get_fault_ip %r1,%r8
ldo 8(%r1), %r1
bv %r0(%r1)
ldi -EFAULT, %r8
ENDPROC_CFI(fixup_put_user_skip_2)

View File

@ -5,6 +5,8 @@
* Copyright (C) 2000 Richard Hirst <rhirst with parisc-linux.org> * Copyright (C) 2000 Richard Hirst <rhirst with parisc-linux.org>
* Copyright (C) 2001 Matthieu Delahaye <delahaym at esiee.fr> * Copyright (C) 2001 Matthieu Delahaye <delahaym at esiee.fr>
* Copyright (C) 2003 Randolph Chung <tausq with parisc-linux.org> * Copyright (C) 2003 Randolph Chung <tausq with parisc-linux.org>
* Copyright (C) 2017 Helge Deller <deller@gmx.de>
* Copyright (C) 2017 John David Anglin <dave.anglin@bell.net>
* *
* *
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
@ -132,4 +134,320 @@ ENDPROC_CFI(lstrnlen_user)
.procend .procend
/*
* unsigned long pa_memcpy(void *dstp, const void *srcp, unsigned long len)
*
* Inputs:
* - sr1 already contains space of source region
* - sr2 already contains space of destination region
*
* Returns:
* - number of bytes that could not be copied.
* On success, this will be zero.
*
* This code is based on a C-implementation of a copy routine written by
* Randolph Chung, which in turn was derived from the glibc.
*
* Several strategies are tried to try to get the best performance for various
* conditions. In the optimal case, we copy by loops that copy 32- or 16-bytes
* at a time using general registers. Unaligned copies are handled either by
* aligning the destination and then using shift-and-write method, or in a few
* cases by falling back to a byte-at-a-time copy.
*
* Testing with various alignments and buffer sizes shows that this code is
* often >10x faster than a simple byte-at-a-time copy, even for strangely
* aligned operands. It is interesting to note that the glibc version of memcpy
* (written in C) is actually quite fast already. This routine is able to beat
* it by 30-40% for aligned copies because of the loop unrolling, but in some
* cases the glibc version is still slightly faster. This lends more
* credibility that gcc can generate very good code as long as we are careful.
*
* Possible optimizations:
* - add cache prefetching
* - try not to use the post-increment address modifiers; they may create
* additional interlocks. Assumption is that those were only efficient on old
* machines (pre PA8000 processors)
*/
dst = arg0
src = arg1
len = arg2
end = arg3
t1 = r19
t2 = r20
t3 = r21
t4 = r22
srcspc = sr1
dstspc = sr2
t0 = r1
a1 = t1
a2 = t2
a3 = t3
a0 = t4
save_src = ret0
save_dst = ret1
save_len = r31
ENTRY_CFI(pa_memcpy)
.proc
.callinfo NO_CALLS
.entry
/* Last destination address */
add dst,len,end
/* short copy with less than 16 bytes? */
cmpib,>>=,n 15,len,.Lbyte_loop
/* same alignment? */
xor src,dst,t0
extru t0,31,2,t1
cmpib,<>,n 0,t1,.Lunaligned_copy
#ifdef CONFIG_64BIT
/* only do 64-bit copies if we can get aligned. */
extru t0,31,3,t1
cmpib,<>,n 0,t1,.Lalign_loop32
/* loop until we are 64-bit aligned */
.Lalign_loop64:
extru dst,31,3,t1
cmpib,=,n 0,t1,.Lcopy_loop_16
20: ldb,ma 1(srcspc,src),t1
21: stb,ma t1,1(dstspc,dst)
b .Lalign_loop64
ldo -1(len),len
ASM_EXCEPTIONTABLE_ENTRY(20b,.Lcopy_done)
ASM_EXCEPTIONTABLE_ENTRY(21b,.Lcopy_done)
ldi 31,t0
.Lcopy_loop_16:
cmpb,COND(>>=),n t0,len,.Lword_loop
10: ldd 0(srcspc,src),t1
11: ldd 8(srcspc,src),t2
ldo 16(src),src
12: std,ma t1,8(dstspc,dst)
13: std,ma t2,8(dstspc,dst)
14: ldd 0(srcspc,src),t1
15: ldd 8(srcspc,src),t2
ldo 16(src),src
16: std,ma t1,8(dstspc,dst)
17: std,ma t2,8(dstspc,dst)
ASM_EXCEPTIONTABLE_ENTRY(10b,.Lcopy_done)
ASM_EXCEPTIONTABLE_ENTRY(11b,.Lcopy16_fault)
ASM_EXCEPTIONTABLE_ENTRY(12b,.Lcopy_done)
ASM_EXCEPTIONTABLE_ENTRY(13b,.Lcopy_done)
ASM_EXCEPTIONTABLE_ENTRY(14b,.Lcopy_done)
ASM_EXCEPTIONTABLE_ENTRY(15b,.Lcopy16_fault)
ASM_EXCEPTIONTABLE_ENTRY(16b,.Lcopy_done)
ASM_EXCEPTIONTABLE_ENTRY(17b,.Lcopy_done)
b .Lcopy_loop_16
ldo -32(len),len
.Lword_loop:
cmpib,COND(>>=),n 3,len,.Lbyte_loop
20: ldw,ma 4(srcspc,src),t1
21: stw,ma t1,4(dstspc,dst)
b .Lword_loop
ldo -4(len),len
ASM_EXCEPTIONTABLE_ENTRY(20b,.Lcopy_done)
ASM_EXCEPTIONTABLE_ENTRY(21b,.Lcopy_done)
#endif /* CONFIG_64BIT */
/* loop until we are 32-bit aligned */
.Lalign_loop32:
extru dst,31,2,t1
cmpib,=,n 0,t1,.Lcopy_loop_4
20: ldb,ma 1(srcspc,src),t1
21: stb,ma t1,1(dstspc,dst)
b .Lalign_loop32
ldo -1(len),len
ASM_EXCEPTIONTABLE_ENTRY(20b,.Lcopy_done)
ASM_EXCEPTIONTABLE_ENTRY(21b,.Lcopy_done)
.Lcopy_loop_4:
cmpib,COND(>>=),n 15,len,.Lbyte_loop
10: ldw 0(srcspc,src),t1
11: ldw 4(srcspc,src),t2
12: stw,ma t1,4(dstspc,dst)
13: stw,ma t2,4(dstspc,dst)
14: ldw 8(srcspc,src),t1
15: ldw 12(srcspc,src),t2
ldo 16(src),src
16: stw,ma t1,4(dstspc,dst)
17: stw,ma t2,4(dstspc,dst)
ASM_EXCEPTIONTABLE_ENTRY(10b,.Lcopy_done)
ASM_EXCEPTIONTABLE_ENTRY(11b,.Lcopy8_fault)
ASM_EXCEPTIONTABLE_ENTRY(12b,.Lcopy_done)
ASM_EXCEPTIONTABLE_ENTRY(13b,.Lcopy_done)
ASM_EXCEPTIONTABLE_ENTRY(14b,.Lcopy_done)
ASM_EXCEPTIONTABLE_ENTRY(15b,.Lcopy8_fault)
ASM_EXCEPTIONTABLE_ENTRY(16b,.Lcopy_done)
ASM_EXCEPTIONTABLE_ENTRY(17b,.Lcopy_done)
b .Lcopy_loop_4
ldo -16(len),len
.Lbyte_loop:
cmpclr,COND(<>) len,%r0,%r0
b,n .Lcopy_done
20: ldb 0(srcspc,src),t1
ldo 1(src),src
21: stb,ma t1,1(dstspc,dst)
b .Lbyte_loop
ldo -1(len),len
ASM_EXCEPTIONTABLE_ENTRY(20b,.Lcopy_done)
ASM_EXCEPTIONTABLE_ENTRY(21b,.Lcopy_done)
.Lcopy_done:
bv %r0(%r2)
sub end,dst,ret0
/* src and dst are not aligned the same way. */
/* need to go the hard way */
.Lunaligned_copy:
/* align until dst is 32bit-word-aligned */
extru dst,31,2,t1
cmpib,COND(=),n 0,t1,.Lcopy_dstaligned
20: ldb 0(srcspc,src),t1
ldo 1(src),src
21: stb,ma t1,1(dstspc,dst)
b .Lunaligned_copy
ldo -1(len),len
ASM_EXCEPTIONTABLE_ENTRY(20b,.Lcopy_done)
ASM_EXCEPTIONTABLE_ENTRY(21b,.Lcopy_done)
.Lcopy_dstaligned:
/* store src, dst and len in safe place */
copy src,save_src
copy dst,save_dst
copy len,save_len
/* len now needs give number of words to copy */
SHRREG len,2,len
/*
* Copy from a not-aligned src to an aligned dst using shifts.
* Handles 4 words per loop.
*/
depw,z src,28,2,t0
subi 32,t0,t0
mtsar t0
extru len,31,2,t0
cmpib,= 2,t0,.Lcase2
/* Make src aligned by rounding it down. */
depi 0,31,2,src
cmpiclr,<> 3,t0,%r0
b,n .Lcase3
cmpiclr,<> 1,t0,%r0
b,n .Lcase1
.Lcase0:
cmpb,= %r0,len,.Lcda_finish
nop
1: ldw,ma 4(srcspc,src), a3
ASM_EXCEPTIONTABLE_ENTRY(1b,.Lcda_rdfault)
1: ldw,ma 4(srcspc,src), a0
ASM_EXCEPTIONTABLE_ENTRY(1b,.Lcda_rdfault)
b,n .Ldo3
.Lcase1:
1: ldw,ma 4(srcspc,src), a2
ASM_EXCEPTIONTABLE_ENTRY(1b,.Lcda_rdfault)
1: ldw,ma 4(srcspc,src), a3
ASM_EXCEPTIONTABLE_ENTRY(1b,.Lcda_rdfault)
ldo -1(len),len
cmpb,=,n %r0,len,.Ldo0
.Ldo4:
1: ldw,ma 4(srcspc,src), a0
ASM_EXCEPTIONTABLE_ENTRY(1b,.Lcda_rdfault)
shrpw a2, a3, %sar, t0
1: stw,ma t0, 4(dstspc,dst)
ASM_EXCEPTIONTABLE_ENTRY(1b,.Lcopy_done)
.Ldo3:
1: ldw,ma 4(srcspc,src), a1
ASM_EXCEPTIONTABLE_ENTRY(1b,.Lcda_rdfault)
shrpw a3, a0, %sar, t0
1: stw,ma t0, 4(dstspc,dst)
ASM_EXCEPTIONTABLE_ENTRY(1b,.Lcopy_done)
.Ldo2:
1: ldw,ma 4(srcspc,src), a2
ASM_EXCEPTIONTABLE_ENTRY(1b,.Lcda_rdfault)
shrpw a0, a1, %sar, t0
1: stw,ma t0, 4(dstspc,dst)
ASM_EXCEPTIONTABLE_ENTRY(1b,.Lcopy_done)
.Ldo1:
1: ldw,ma 4(srcspc,src), a3
ASM_EXCEPTIONTABLE_ENTRY(1b,.Lcda_rdfault)
shrpw a1, a2, %sar, t0
1: stw,ma t0, 4(dstspc,dst)
ASM_EXCEPTIONTABLE_ENTRY(1b,.Lcopy_done)
ldo -4(len),len
cmpb,<> %r0,len,.Ldo4
nop
.Ldo0:
shrpw a2, a3, %sar, t0
1: stw,ma t0, 4(dstspc,dst)
ASM_EXCEPTIONTABLE_ENTRY(1b,.Lcopy_done)
.Lcda_rdfault:
.Lcda_finish:
/* calculate new src, dst and len and jump to byte-copy loop */
sub dst,save_dst,t0
add save_src,t0,src
b .Lbyte_loop
sub save_len,t0,len
.Lcase3:
1: ldw,ma 4(srcspc,src), a0
ASM_EXCEPTIONTABLE_ENTRY(1b,.Lcda_rdfault)
1: ldw,ma 4(srcspc,src), a1
ASM_EXCEPTIONTABLE_ENTRY(1b,.Lcda_rdfault)
b .Ldo2
ldo 1(len),len
.Lcase2:
1: ldw,ma 4(srcspc,src), a1
ASM_EXCEPTIONTABLE_ENTRY(1b,.Lcda_rdfault)
1: ldw,ma 4(srcspc,src), a2
ASM_EXCEPTIONTABLE_ENTRY(1b,.Lcda_rdfault)
b .Ldo1
ldo 2(len),len
/* fault exception fixup handlers: */
#ifdef CONFIG_64BIT
.Lcopy16_fault:
10: b .Lcopy_done
std,ma t1,8(dstspc,dst)
ASM_EXCEPTIONTABLE_ENTRY(10b,.Lcopy_done)
#endif
.Lcopy8_fault:
10: b .Lcopy_done
stw,ma t1,4(dstspc,dst)
ASM_EXCEPTIONTABLE_ENTRY(10b,.Lcopy_done)
.exit
ENDPROC_CFI(pa_memcpy)
.procend
.end .end

View File

@ -2,7 +2,7 @@
* Optimized memory copy routines. * Optimized memory copy routines.
* *
* Copyright (C) 2004 Randolph Chung <tausq@debian.org> * Copyright (C) 2004 Randolph Chung <tausq@debian.org>
* Copyright (C) 2013 Helge Deller <deller@gmx.de> * Copyright (C) 2013-2017 Helge Deller <deller@gmx.de>
* *
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
@ -21,474 +21,21 @@
* Portions derived from the GNU C Library * Portions derived from the GNU C Library
* Copyright (C) 1991, 1997, 2003 Free Software Foundation, Inc. * Copyright (C) 1991, 1997, 2003 Free Software Foundation, Inc.
* *
* Several strategies are tried to try to get the best performance for various
* conditions. In the optimal case, we copy 64-bytes in an unrolled loop using
* fp regs. This is followed by loops that copy 32- or 16-bytes at a time using
* general registers. Unaligned copies are handled either by aligning the
* destination and then using shift-and-write method, or in a few cases by
* falling back to a byte-at-a-time copy.
*
* I chose to implement this in C because it is easier to maintain and debug,
* and in my experiments it appears that the C code generated by gcc (3.3/3.4
* at the time of writing) is fairly optimal. Unfortunately some of the
* semantics of the copy routine (exception handling) is difficult to express
* in C, so we have to play some tricks to get it to work.
*
* All the loads and stores are done via explicit asm() code in order to use
* the right space registers.
*
* Testing with various alignments and buffer sizes shows that this code is
* often >10x faster than a simple byte-at-a-time copy, even for strangely
* aligned operands. It is interesting to note that the glibc version
* of memcpy (written in C) is actually quite fast already. This routine is
* able to beat it by 30-40% for aligned copies because of the loop unrolling,
* but in some cases the glibc version is still slightly faster. This lends
* more credibility that gcc can generate very good code as long as we are
* careful.
*
* TODO:
* - cache prefetching needs more experimentation to get optimal settings
* - try not to use the post-increment address modifiers; they create additional
* interlocks
* - replace byte-copy loops with stybs sequences
*/ */
#ifdef __KERNEL__
#include <linux/module.h> #include <linux/module.h>
#include <linux/compiler.h> #include <linux/compiler.h>
#include <linux/uaccess.h> #include <linux/uaccess.h>
#define s_space "%%sr1"
#define d_space "%%sr2"
#else
#include "memcpy.h"
#define s_space "%%sr0"
#define d_space "%%sr0"
#define pa_memcpy new2_copy
#endif
DECLARE_PER_CPU(struct exception_data, exception_data); DECLARE_PER_CPU(struct exception_data, exception_data);
#define preserve_branch(label) do { \
volatile int dummy = 0; \
/* The following branch is never taken, it's just here to */ \
/* prevent gcc from optimizing away our exception code. */ \
if (unlikely(dummy != dummy)) \
goto label; \
} while (0)
#define get_user_space() (segment_eq(get_fs(), KERNEL_DS) ? 0 : mfsp(3)) #define get_user_space() (segment_eq(get_fs(), KERNEL_DS) ? 0 : mfsp(3))
#define get_kernel_space() (0) #define get_kernel_space() (0)
#define MERGE(w0, sh_1, w1, sh_2) ({ \
unsigned int _r; \
asm volatile ( \
"mtsar %3\n" \
"shrpw %1, %2, %%sar, %0\n" \
: "=r"(_r) \
: "r"(w0), "r"(w1), "r"(sh_2) \
); \
_r; \
})
#define THRESHOLD 16
#ifdef DEBUG_MEMCPY
#define DPRINTF(fmt, args...) do { printk(KERN_DEBUG "%s:%d:%s ", __FILE__, __LINE__, __func__ ); printk(KERN_DEBUG fmt, ##args ); } while (0)
#else
#define DPRINTF(fmt, args...)
#endif
#define def_load_ai_insn(_insn,_sz,_tt,_s,_a,_t,_e) \
__asm__ __volatile__ ( \
"1:\t" #_insn ",ma " #_sz "(" _s ",%1), %0\n\t" \
ASM_EXCEPTIONTABLE_ENTRY(1b,_e) \
: _tt(_t), "+r"(_a) \
: \
: "r8")
#define def_store_ai_insn(_insn,_sz,_tt,_s,_a,_t,_e) \
__asm__ __volatile__ ( \
"1:\t" #_insn ",ma %1, " #_sz "(" _s ",%0)\n\t" \
ASM_EXCEPTIONTABLE_ENTRY(1b,_e) \
: "+r"(_a) \
: _tt(_t) \
: "r8")
#define ldbma(_s, _a, _t, _e) def_load_ai_insn(ldbs,1,"=r",_s,_a,_t,_e)
#define stbma(_s, _t, _a, _e) def_store_ai_insn(stbs,1,"r",_s,_a,_t,_e)
#define ldwma(_s, _a, _t, _e) def_load_ai_insn(ldw,4,"=r",_s,_a,_t,_e)
#define stwma(_s, _t, _a, _e) def_store_ai_insn(stw,4,"r",_s,_a,_t,_e)
#define flddma(_s, _a, _t, _e) def_load_ai_insn(fldd,8,"=f",_s,_a,_t,_e)
#define fstdma(_s, _t, _a, _e) def_store_ai_insn(fstd,8,"f",_s,_a,_t,_e)
#define def_load_insn(_insn,_tt,_s,_o,_a,_t,_e) \
__asm__ __volatile__ ( \
"1:\t" #_insn " " #_o "(" _s ",%1), %0\n\t" \
ASM_EXCEPTIONTABLE_ENTRY(1b,_e) \
: _tt(_t) \
: "r"(_a) \
: "r8")
#define def_store_insn(_insn,_tt,_s,_t,_o,_a,_e) \
__asm__ __volatile__ ( \
"1:\t" #_insn " %0, " #_o "(" _s ",%1)\n\t" \
ASM_EXCEPTIONTABLE_ENTRY(1b,_e) \
: \
: _tt(_t), "r"(_a) \
: "r8")
#define ldw(_s,_o,_a,_t,_e) def_load_insn(ldw,"=r",_s,_o,_a,_t,_e)
#define stw(_s,_t,_o,_a,_e) def_store_insn(stw,"r",_s,_t,_o,_a,_e)
#ifdef CONFIG_PREFETCH
static inline void prefetch_src(const void *addr)
{
__asm__("ldw 0(" s_space ",%0), %%r0" : : "r" (addr));
}
static inline void prefetch_dst(const void *addr)
{
__asm__("ldd 0(" d_space ",%0), %%r0" : : "r" (addr));
}
#else
#define prefetch_src(addr) do { } while(0)
#define prefetch_dst(addr) do { } while(0)
#endif
#define PA_MEMCPY_OK 0
#define PA_MEMCPY_LOAD_ERROR 1
#define PA_MEMCPY_STORE_ERROR 2
/* Copy from a not-aligned src to an aligned dst, using shifts. Handles 4 words
* per loop. This code is derived from glibc.
*/
static noinline unsigned long copy_dstaligned(unsigned long dst,
unsigned long src, unsigned long len)
{
/* gcc complains that a2 and a3 may be uninitialized, but actually
* they cannot be. Initialize a2/a3 to shut gcc up.
*/
register unsigned int a0, a1, a2 = 0, a3 = 0;
int sh_1, sh_2;
/* prefetch_src((const void *)src); */
/* Calculate how to shift a word read at the memory operation
aligned srcp to make it aligned for copy. */
sh_1 = 8 * (src % sizeof(unsigned int));
sh_2 = 8 * sizeof(unsigned int) - sh_1;
/* Make src aligned by rounding it down. */
src &= -sizeof(unsigned int);
switch (len % 4)
{
case 2:
/* a1 = ((unsigned int *) src)[0];
a2 = ((unsigned int *) src)[1]; */
ldw(s_space, 0, src, a1, cda_ldw_exc);
ldw(s_space, 4, src, a2, cda_ldw_exc);
src -= 1 * sizeof(unsigned int);
dst -= 3 * sizeof(unsigned int);
len += 2;
goto do1;
case 3:
/* a0 = ((unsigned int *) src)[0];
a1 = ((unsigned int *) src)[1]; */
ldw(s_space, 0, src, a0, cda_ldw_exc);
ldw(s_space, 4, src, a1, cda_ldw_exc);
src -= 0 * sizeof(unsigned int);
dst -= 2 * sizeof(unsigned int);
len += 1;
goto do2;
case 0:
if (len == 0)
return PA_MEMCPY_OK;
/* a3 = ((unsigned int *) src)[0];
a0 = ((unsigned int *) src)[1]; */
ldw(s_space, 0, src, a3, cda_ldw_exc);
ldw(s_space, 4, src, a0, cda_ldw_exc);
src -=-1 * sizeof(unsigned int);
dst -= 1 * sizeof(unsigned int);
len += 0;
goto do3;
case 1:
/* a2 = ((unsigned int *) src)[0];
a3 = ((unsigned int *) src)[1]; */
ldw(s_space, 0, src, a2, cda_ldw_exc);
ldw(s_space, 4, src, a3, cda_ldw_exc);
src -=-2 * sizeof(unsigned int);
dst -= 0 * sizeof(unsigned int);
len -= 1;
if (len == 0)
goto do0;
goto do4; /* No-op. */
}
do
{
/* prefetch_src((const void *)(src + 4 * sizeof(unsigned int))); */
do4:
/* a0 = ((unsigned int *) src)[0]; */
ldw(s_space, 0, src, a0, cda_ldw_exc);
/* ((unsigned int *) dst)[0] = MERGE (a2, sh_1, a3, sh_2); */
stw(d_space, MERGE (a2, sh_1, a3, sh_2), 0, dst, cda_stw_exc);
do3:
/* a1 = ((unsigned int *) src)[1]; */
ldw(s_space, 4, src, a1, cda_ldw_exc);
/* ((unsigned int *) dst)[1] = MERGE (a3, sh_1, a0, sh_2); */
stw(d_space, MERGE (a3, sh_1, a0, sh_2), 4, dst, cda_stw_exc);
do2:
/* a2 = ((unsigned int *) src)[2]; */
ldw(s_space, 8, src, a2, cda_ldw_exc);
/* ((unsigned int *) dst)[2] = MERGE (a0, sh_1, a1, sh_2); */
stw(d_space, MERGE (a0, sh_1, a1, sh_2), 8, dst, cda_stw_exc);
do1:
/* a3 = ((unsigned int *) src)[3]; */
ldw(s_space, 12, src, a3, cda_ldw_exc);
/* ((unsigned int *) dst)[3] = MERGE (a1, sh_1, a2, sh_2); */
stw(d_space, MERGE (a1, sh_1, a2, sh_2), 12, dst, cda_stw_exc);
src += 4 * sizeof(unsigned int);
dst += 4 * sizeof(unsigned int);
len -= 4;
}
while (len != 0);
do0:
/* ((unsigned int *) dst)[0] = MERGE (a2, sh_1, a3, sh_2); */
stw(d_space, MERGE (a2, sh_1, a3, sh_2), 0, dst, cda_stw_exc);
preserve_branch(handle_load_error);
preserve_branch(handle_store_error);
return PA_MEMCPY_OK;
handle_load_error:
__asm__ __volatile__ ("cda_ldw_exc:\n");
return PA_MEMCPY_LOAD_ERROR;
handle_store_error:
__asm__ __volatile__ ("cda_stw_exc:\n");
return PA_MEMCPY_STORE_ERROR;
}
/* Returns PA_MEMCPY_OK, PA_MEMCPY_LOAD_ERROR or PA_MEMCPY_STORE_ERROR.
* In case of an access fault the faulty address can be read from the per_cpu
* exception data struct. */
static noinline unsigned long pa_memcpy_internal(void *dstp, const void *srcp,
unsigned long len)
{
register unsigned long src, dst, t1, t2, t3;
register unsigned char *pcs, *pcd;
register unsigned int *pws, *pwd;
register double *pds, *pdd;
unsigned long ret;
src = (unsigned long)srcp;
dst = (unsigned long)dstp;
pcs = (unsigned char *)srcp;
pcd = (unsigned char *)dstp;
/* prefetch_src((const void *)srcp); */
if (len < THRESHOLD)
goto byte_copy;
/* Check alignment */
t1 = (src ^ dst);
if (unlikely(t1 & (sizeof(double)-1)))
goto unaligned_copy;
/* src and dst have same alignment. */
/* Copy bytes till we are double-aligned. */
t2 = src & (sizeof(double) - 1);
if (unlikely(t2 != 0)) {
t2 = sizeof(double) - t2;
while (t2 && len) {
/* *pcd++ = *pcs++; */
ldbma(s_space, pcs, t3, pmc_load_exc);
len--;
stbma(d_space, t3, pcd, pmc_store_exc);
t2--;
}
}
pds = (double *)pcs;
pdd = (double *)pcd;
#if 0
/* Copy 8 doubles at a time */
while (len >= 8*sizeof(double)) {
register double r1, r2, r3, r4, r5, r6, r7, r8;
/* prefetch_src((char *)pds + L1_CACHE_BYTES); */
flddma(s_space, pds, r1, pmc_load_exc);
flddma(s_space, pds, r2, pmc_load_exc);
flddma(s_space, pds, r3, pmc_load_exc);
flddma(s_space, pds, r4, pmc_load_exc);
fstdma(d_space, r1, pdd, pmc_store_exc);
fstdma(d_space, r2, pdd, pmc_store_exc);
fstdma(d_space, r3, pdd, pmc_store_exc);
fstdma(d_space, r4, pdd, pmc_store_exc);
#if 0
if (L1_CACHE_BYTES <= 32)
prefetch_src((char *)pds + L1_CACHE_BYTES);
#endif
flddma(s_space, pds, r5, pmc_load_exc);
flddma(s_space, pds, r6, pmc_load_exc);
flddma(s_space, pds, r7, pmc_load_exc);
flddma(s_space, pds, r8, pmc_load_exc);
fstdma(d_space, r5, pdd, pmc_store_exc);
fstdma(d_space, r6, pdd, pmc_store_exc);
fstdma(d_space, r7, pdd, pmc_store_exc);
fstdma(d_space, r8, pdd, pmc_store_exc);
len -= 8*sizeof(double);
}
#endif
pws = (unsigned int *)pds;
pwd = (unsigned int *)pdd;
word_copy:
while (len >= 8*sizeof(unsigned int)) {
register unsigned int r1,r2,r3,r4,r5,r6,r7,r8;
/* prefetch_src((char *)pws + L1_CACHE_BYTES); */
ldwma(s_space, pws, r1, pmc_load_exc);
ldwma(s_space, pws, r2, pmc_load_exc);
ldwma(s_space, pws, r3, pmc_load_exc);
ldwma(s_space, pws, r4, pmc_load_exc);
stwma(d_space, r1, pwd, pmc_store_exc);
stwma(d_space, r2, pwd, pmc_store_exc);
stwma(d_space, r3, pwd, pmc_store_exc);
stwma(d_space, r4, pwd, pmc_store_exc);
ldwma(s_space, pws, r5, pmc_load_exc);
ldwma(s_space, pws, r6, pmc_load_exc);
ldwma(s_space, pws, r7, pmc_load_exc);
ldwma(s_space, pws, r8, pmc_load_exc);
stwma(d_space, r5, pwd, pmc_store_exc);
stwma(d_space, r6, pwd, pmc_store_exc);
stwma(d_space, r7, pwd, pmc_store_exc);
stwma(d_space, r8, pwd, pmc_store_exc);
len -= 8*sizeof(unsigned int);
}
while (len >= 4*sizeof(unsigned int)) {
register unsigned int r1,r2,r3,r4;
ldwma(s_space, pws, r1, pmc_load_exc);
ldwma(s_space, pws, r2, pmc_load_exc);
ldwma(s_space, pws, r3, pmc_load_exc);
ldwma(s_space, pws, r4, pmc_load_exc);
stwma(d_space, r1, pwd, pmc_store_exc);
stwma(d_space, r2, pwd, pmc_store_exc);
stwma(d_space, r3, pwd, pmc_store_exc);
stwma(d_space, r4, pwd, pmc_store_exc);
len -= 4*sizeof(unsigned int);
}
pcs = (unsigned char *)pws;
pcd = (unsigned char *)pwd;
byte_copy:
while (len) {
/* *pcd++ = *pcs++; */
ldbma(s_space, pcs, t3, pmc_load_exc);
stbma(d_space, t3, pcd, pmc_store_exc);
len--;
}
return PA_MEMCPY_OK;
unaligned_copy:
/* possibly we are aligned on a word, but not on a double... */
if (likely((t1 & (sizeof(unsigned int)-1)) == 0)) {
t2 = src & (sizeof(unsigned int) - 1);
if (unlikely(t2 != 0)) {
t2 = sizeof(unsigned int) - t2;
while (t2) {
/* *pcd++ = *pcs++; */
ldbma(s_space, pcs, t3, pmc_load_exc);
stbma(d_space, t3, pcd, pmc_store_exc);
len--;
t2--;
}
}
pws = (unsigned int *)pcs;
pwd = (unsigned int *)pcd;
goto word_copy;
}
/* Align the destination. */
if (unlikely((dst & (sizeof(unsigned int) - 1)) != 0)) {
t2 = sizeof(unsigned int) - (dst & (sizeof(unsigned int) - 1));
while (t2) {
/* *pcd++ = *pcs++; */
ldbma(s_space, pcs, t3, pmc_load_exc);
stbma(d_space, t3, pcd, pmc_store_exc);
len--;
t2--;
}
dst = (unsigned long)pcd;
src = (unsigned long)pcs;
}
ret = copy_dstaligned(dst, src, len / sizeof(unsigned int));
if (ret)
return ret;
pcs += (len & -sizeof(unsigned int));
pcd += (len & -sizeof(unsigned int));
len %= sizeof(unsigned int);
preserve_branch(handle_load_error);
preserve_branch(handle_store_error);
goto byte_copy;
handle_load_error:
__asm__ __volatile__ ("pmc_load_exc:\n");
return PA_MEMCPY_LOAD_ERROR;
handle_store_error:
__asm__ __volatile__ ("pmc_store_exc:\n");
return PA_MEMCPY_STORE_ERROR;
}
/* Returns 0 for success, otherwise, returns number of bytes not transferred. */ /* Returns 0 for success, otherwise, returns number of bytes not transferred. */
static unsigned long pa_memcpy(void *dstp, const void *srcp, unsigned long len) extern unsigned long pa_memcpy(void *dst, const void *src,
{ unsigned long len);
unsigned long ret, fault_addr, reference;
struct exception_data *d;
ret = pa_memcpy_internal(dstp, srcp, len);
if (likely(ret == PA_MEMCPY_OK))
return 0;
/* if a load or store fault occured we can get the faulty addr */
d = this_cpu_ptr(&exception_data);
fault_addr = d->fault_addr;
/* error in load or store? */
if (ret == PA_MEMCPY_LOAD_ERROR)
reference = (unsigned long) srcp;
else
reference = (unsigned long) dstp;
DPRINTF("pa_memcpy: fault type = %lu, len=%lu fault_addr=%lu ref=%lu\n",
ret, len, fault_addr, reference);
if (fault_addr >= reference)
return len - (fault_addr - reference);
else
return len;
}
#ifdef __KERNEL__
unsigned long __copy_to_user(void __user *dst, const void *src, unsigned long __copy_to_user(void __user *dst, const void *src,
unsigned long len) unsigned long len)
{ {
@ -537,5 +84,3 @@ long probe_kernel_read(void *dst, const void *src, size_t size)
return __probe_kernel_read(dst, src, size); return __probe_kernel_read(dst, src, size);
} }
#endif

View File

@ -150,6 +150,23 @@ int fixup_exception(struct pt_regs *regs)
d->fault_space = regs->isr; d->fault_space = regs->isr;
d->fault_addr = regs->ior; d->fault_addr = regs->ior;
/*
* Fix up get_user() and put_user().
* ASM_EXCEPTIONTABLE_ENTRY_EFAULT() sets the least-significant
* bit in the relative address of the fixup routine to indicate
* that %r8 should be loaded with -EFAULT to report a userspace
* access error.
*/
if (fix->fixup & 1) {
regs->gr[8] = -EFAULT;
/* zero target register for get_user() */
if (parisc_acctyp(0, regs->iir) == VM_READ) {
int treg = regs->iir & 0x1f;
regs->gr[treg] = 0;
}
}
regs->iaoq[0] = (unsigned long)&fix->fixup + fix->fixup; regs->iaoq[0] = (unsigned long)&fix->fixup + fix->fixup;
regs->iaoq[0] &= ~3; regs->iaoq[0] &= ~3;
/* /*

View File

@ -4,6 +4,5 @@
#include <asm-generic/sections.h> #include <asm-generic/sections.h>
extern char _eshared[], _ehead[]; extern char _eshared[], _ehead[];
extern char __start_ro_after_init[], __end_ro_after_init[];
#endif #endif

View File

@ -63,11 +63,9 @@ SECTIONS
. = ALIGN(PAGE_SIZE); . = ALIGN(PAGE_SIZE);
__start_ro_after_init = .; __start_ro_after_init = .;
__start_data_ro_after_init = .;
.data..ro_after_init : { .data..ro_after_init : {
*(.data..ro_after_init) *(.data..ro_after_init)
} }
__end_data_ro_after_init = .;
EXCEPTION_TABLE(16) EXCEPTION_TABLE(16)
. = ALIGN(PAGE_SIZE); . = ALIGN(PAGE_SIZE);
__end_ro_after_init = .; __end_ro_after_init = .;

View File

@ -351,7 +351,7 @@ static int genregs64_set(struct task_struct *target,
} }
if (!ret) { if (!ret) {
unsigned long y; unsigned long y = regs->y;
ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
&y, &y,

View File

@ -120,10 +120,6 @@ else
# -funit-at-a-time shrinks the kernel .text considerably # -funit-at-a-time shrinks the kernel .text considerably
# unfortunately it makes reading oopses harder. # unfortunately it makes reading oopses harder.
KBUILD_CFLAGS += $(call cc-option,-funit-at-a-time) KBUILD_CFLAGS += $(call cc-option,-funit-at-a-time)
# this works around some issues with generating unwind tables in older gccs
# newer gccs do it by default
KBUILD_CFLAGS += $(call cc-option,-maccumulate-outgoing-args)
endif endif
ifdef CONFIG_X86_X32 ifdef CONFIG_X86_X32
@ -147,6 +143,37 @@ ifeq ($(CONFIG_KMEMCHECK),y)
KBUILD_CFLAGS += $(call cc-option,-fno-builtin-memcpy) KBUILD_CFLAGS += $(call cc-option,-fno-builtin-memcpy)
endif endif
#
# If the function graph tracer is used with mcount instead of fentry,
# '-maccumulate-outgoing-args' is needed to prevent a GCC bug
# (https://gcc.gnu.org/bugzilla/show_bug.cgi?id=42109)
#
ifdef CONFIG_FUNCTION_GRAPH_TRACER
ifndef CONFIG_HAVE_FENTRY
ACCUMULATE_OUTGOING_ARGS := 1
else
ifeq ($(call cc-option-yn, -mfentry), n)
ACCUMULATE_OUTGOING_ARGS := 1
endif
endif
endif
#
# Jump labels need '-maccumulate-outgoing-args' for gcc < 4.5.2 to prevent a
# GCC bug (https://gcc.gnu.org/bugzilla/show_bug.cgi?id=46226). There's no way
# to test for this bug at compile-time because the test case needs to execute,
# which is a no-go for cross compilers. So check the GCC version instead.
#
ifdef CONFIG_JUMP_LABEL
ifneq ($(ACCUMULATE_OUTGOING_ARGS), 1)
ACCUMULATE_OUTGOING_ARGS = $(call cc-if-fullversion, -lt, 040502, 1)
endif
endif
ifeq ($(ACCUMULATE_OUTGOING_ARGS), 1)
KBUILD_CFLAGS += -maccumulate-outgoing-args
endif
# Stackpointer is addressed different for 32 bit and 64 bit x86 # Stackpointer is addressed different for 32 bit and 64 bit x86
sp-$(CONFIG_X86_32) := esp sp-$(CONFIG_X86_32) := esp
sp-$(CONFIG_X86_64) := rsp sp-$(CONFIG_X86_64) := rsp

View File

@ -45,24 +45,6 @@ cflags-$(CONFIG_MGEODE_LX) += $(call cc-option,-march=geode,-march=pentium-mmx)
# cpu entries # cpu entries
cflags-$(CONFIG_X86_GENERIC) += $(call tune,generic,$(call tune,i686)) cflags-$(CONFIG_X86_GENERIC) += $(call tune,generic,$(call tune,i686))
# Work around the pentium-mmx code generator madness of gcc4.4.x which
# does stack alignment by generating horrible code _before_ the mcount
# prologue (push %ebp, mov %esp, %ebp) which breaks the function graph
# tracer assumptions. For i686, generic, core2 this is set by the
# compiler anyway
ifeq ($(CONFIG_FUNCTION_GRAPH_TRACER), y)
ADD_ACCUMULATE_OUTGOING_ARGS := y
endif
# Work around to a bug with asm goto with first implementations of it
# in gcc causing gcc to mess up the push and pop of the stack in some
# uses of asm goto.
ifeq ($(CONFIG_JUMP_LABEL), y)
ADD_ACCUMULATE_OUTGOING_ARGS := y
endif
cflags-$(ADD_ACCUMULATE_OUTGOING_ARGS) += $(call cc-option,-maccumulate-outgoing-args)
# Bug fix for binutils: this option is required in order to keep # Bug fix for binutils: this option is required in order to keep
# binutils from generating NOPL instructions against our will. # binutils from generating NOPL instructions against our will.
ifneq ($(CONFIG_X86_P6_NOP),y) ifneq ($(CONFIG_X86_P6_NOP),y)

View File

@ -4,6 +4,7 @@
* memcpy() and memmove() are defined for the compressed boot environment. * memcpy() and memmove() are defined for the compressed boot environment.
*/ */
#include "misc.h" #include "misc.h"
#include "error.h"
void warn(char *m) void warn(char *m)
{ {

View File

@ -2256,6 +2256,7 @@ void arch_perf_update_userpage(struct perf_event *event,
struct perf_event_mmap_page *userpg, u64 now) struct perf_event_mmap_page *userpg, u64 now)
{ {
struct cyc2ns_data *data; struct cyc2ns_data *data;
u64 offset;
userpg->cap_user_time = 0; userpg->cap_user_time = 0;
userpg->cap_user_time_zero = 0; userpg->cap_user_time_zero = 0;
@ -2263,11 +2264,13 @@ void arch_perf_update_userpage(struct perf_event *event,
!!(event->hw.flags & PERF_X86_EVENT_RDPMC_ALLOWED); !!(event->hw.flags & PERF_X86_EVENT_RDPMC_ALLOWED);
userpg->pmc_width = x86_pmu.cntval_bits; userpg->pmc_width = x86_pmu.cntval_bits;
if (!sched_clock_stable()) if (!using_native_sched_clock() || !sched_clock_stable())
return; return;
data = cyc2ns_read_begin(); data = cyc2ns_read_begin();
offset = data->cyc2ns_offset + __sched_clock_offset;
/* /*
* Internal timekeeping for enabled/running/stopped times * Internal timekeeping for enabled/running/stopped times
* is always in the local_clock domain. * is always in the local_clock domain.
@ -2275,7 +2278,7 @@ void arch_perf_update_userpage(struct perf_event *event,
userpg->cap_user_time = 1; userpg->cap_user_time = 1;
userpg->time_mult = data->cyc2ns_mul; userpg->time_mult = data->cyc2ns_mul;
userpg->time_shift = data->cyc2ns_shift; userpg->time_shift = data->cyc2ns_shift;
userpg->time_offset = data->cyc2ns_offset - now; userpg->time_offset = offset - now;
/* /*
* cap_user_time_zero doesn't make sense when we're using a different * cap_user_time_zero doesn't make sense when we're using a different
@ -2283,7 +2286,7 @@ void arch_perf_update_userpage(struct perf_event *event,
*/ */
if (!event->attr.use_clockid) { if (!event->attr.use_clockid) {
userpg->cap_user_time_zero = 1; userpg->cap_user_time_zero = 1;
userpg->time_zero = data->cyc2ns_offset; userpg->time_zero = offset;
} }
cyc2ns_read_end(data); cyc2ns_read_end(data);

View File

@ -46,6 +46,7 @@ struct kvm_page_track_notifier_node {
}; };
void kvm_page_track_init(struct kvm *kvm); void kvm_page_track_init(struct kvm *kvm);
void kvm_page_track_cleanup(struct kvm *kvm);
void kvm_page_track_free_memslot(struct kvm_memory_slot *free, void kvm_page_track_free_memslot(struct kvm_memory_slot *free,
struct kvm_memory_slot *dont); struct kvm_memory_slot *dont);

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@ -12,6 +12,8 @@ extern int recalibrate_cpu_khz(void);
extern int no_timer_check; extern int no_timer_check;
extern bool using_native_sched_clock(void);
/* /*
* We use the full linear equation: f(x) = a + b*x, in order to allow * We use the full linear equation: f(x) = a + b*x, in order to allow
* a continuous function in the face of dynamic freq changes. * a continuous function in the face of dynamic freq changes.

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@ -485,15 +485,17 @@ static inline unsigned long uv_soc_phys_ram_to_gpa(unsigned long paddr)
if (paddr < uv_hub_info->lowmem_remap_top) if (paddr < uv_hub_info->lowmem_remap_top)
paddr |= uv_hub_info->lowmem_remap_base; paddr |= uv_hub_info->lowmem_remap_base;
paddr |= uv_hub_info->gnode_upper;
if (m_val) if (m_val) {
paddr |= uv_hub_info->gnode_upper;
paddr = ((paddr << uv_hub_info->m_shift) paddr = ((paddr << uv_hub_info->m_shift)
>> uv_hub_info->m_shift) | >> uv_hub_info->m_shift) |
((paddr >> uv_hub_info->m_val) ((paddr >> uv_hub_info->m_val)
<< uv_hub_info->n_lshift); << uv_hub_info->n_lshift);
else } else {
paddr |= uv_soc_phys_ram_to_nasid(paddr) paddr |= uv_soc_phys_ram_to_nasid(paddr)
<< uv_hub_info->gpa_shift; << uv_hub_info->gpa_shift;
}
return paddr; return paddr;
} }

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@ -1105,7 +1105,8 @@ void __init uv_init_hub_info(struct uv_hub_info_s *hi)
node_id.v = uv_read_local_mmr(UVH_NODE_ID); node_id.v = uv_read_local_mmr(UVH_NODE_ID);
uv_cpuid.gnode_shift = max_t(unsigned int, uv_cpuid.gnode_shift, mn.n_val); uv_cpuid.gnode_shift = max_t(unsigned int, uv_cpuid.gnode_shift, mn.n_val);
hi->gnode_extra = (node_id.s.node_id & ~((1 << uv_cpuid.gnode_shift) - 1)) >> 1; hi->gnode_extra = (node_id.s.node_id & ~((1 << uv_cpuid.gnode_shift) - 1)) >> 1;
hi->gnode_upper = (unsigned long)hi->gnode_extra << mn.m_val; if (mn.m_val)
hi->gnode_upper = (u64)hi->gnode_extra << mn.m_val;
if (uv_gp_table) { if (uv_gp_table) {
hi->global_mmr_base = uv_gp_table->mmr_base; hi->global_mmr_base = uv_gp_table->mmr_base;

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@ -60,7 +60,7 @@ static const char * const th_names[] = {
"load_store", "load_store",
"insn_fetch", "insn_fetch",
"combined_unit", "combined_unit",
"", "decode_unit",
"northbridge", "northbridge",
"execution_unit", "execution_unit",
}; };

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@ -29,6 +29,12 @@
#include <asm/ftrace.h> #include <asm/ftrace.h>
#include <asm/nops.h> #include <asm/nops.h>
#if defined(CONFIG_FUNCTION_GRAPH_TRACER) && \
!defined(CC_USING_FENTRY) && \
!defined(CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE)
# error The following combination is not supported: ((compiler missing -mfentry) || (CONFIG_X86_32 and !CONFIG_DYNAMIC_FTRACE)) && CONFIG_FUNCTION_GRAPH_TRACER && CONFIG_CC_OPTIMIZE_FOR_SIZE
#endif
#ifdef CONFIG_DYNAMIC_FTRACE #ifdef CONFIG_DYNAMIC_FTRACE
int ftrace_arch_code_modify_prepare(void) int ftrace_arch_code_modify_prepare(void)

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@ -328,7 +328,7 @@ unsigned long long sched_clock(void)
return paravirt_sched_clock(); return paravirt_sched_clock();
} }
static inline bool using_native_sched_clock(void) bool using_native_sched_clock(void)
{ {
return pv_time_ops.sched_clock == native_sched_clock; return pv_time_ops.sched_clock == native_sched_clock;
} }
@ -336,7 +336,7 @@ static inline bool using_native_sched_clock(void)
unsigned long long unsigned long long
sched_clock(void) __attribute__((alias("native_sched_clock"))); sched_clock(void) __attribute__((alias("native_sched_clock")));
static inline bool using_native_sched_clock(void) { return true; } bool using_native_sched_clock(void) { return true; }
#endif #endif
int check_tsc_unstable(void) int check_tsc_unstable(void)

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@ -657,6 +657,9 @@ void kvm_pic_destroy(struct kvm *kvm)
{ {
struct kvm_pic *vpic = kvm->arch.vpic; struct kvm_pic *vpic = kvm->arch.vpic;
if (!vpic)
return;
kvm_io_bus_unregister_dev(vpic->kvm, KVM_PIO_BUS, &vpic->dev_master); kvm_io_bus_unregister_dev(vpic->kvm, KVM_PIO_BUS, &vpic->dev_master);
kvm_io_bus_unregister_dev(vpic->kvm, KVM_PIO_BUS, &vpic->dev_slave); kvm_io_bus_unregister_dev(vpic->kvm, KVM_PIO_BUS, &vpic->dev_slave);
kvm_io_bus_unregister_dev(vpic->kvm, KVM_PIO_BUS, &vpic->dev_eclr); kvm_io_bus_unregister_dev(vpic->kvm, KVM_PIO_BUS, &vpic->dev_eclr);

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@ -635,6 +635,9 @@ void kvm_ioapic_destroy(struct kvm *kvm)
{ {
struct kvm_ioapic *ioapic = kvm->arch.vioapic; struct kvm_ioapic *ioapic = kvm->arch.vioapic;
if (!ioapic)
return;
cancel_delayed_work_sync(&ioapic->eoi_inject); cancel_delayed_work_sync(&ioapic->eoi_inject);
kvm_io_bus_unregister_dev(kvm, KVM_MMIO_BUS, &ioapic->dev); kvm_io_bus_unregister_dev(kvm, KVM_MMIO_BUS, &ioapic->dev);
kvm->arch.vioapic = NULL; kvm->arch.vioapic = NULL;

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@ -160,6 +160,14 @@ bool kvm_page_track_is_active(struct kvm_vcpu *vcpu, gfn_t gfn,
return !!ACCESS_ONCE(slot->arch.gfn_track[mode][index]); return !!ACCESS_ONCE(slot->arch.gfn_track[mode][index]);
} }
void kvm_page_track_cleanup(struct kvm *kvm)
{
struct kvm_page_track_notifier_head *head;
head = &kvm->arch.track_notifier_head;
cleanup_srcu_struct(&head->track_srcu);
}
void kvm_page_track_init(struct kvm *kvm) void kvm_page_track_init(struct kvm *kvm)
{ {
struct kvm_page_track_notifier_head *head; struct kvm_page_track_notifier_head *head;

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@ -1379,6 +1379,9 @@ static void avic_vm_destroy(struct kvm *kvm)
unsigned long flags; unsigned long flags;
struct kvm_arch *vm_data = &kvm->arch; struct kvm_arch *vm_data = &kvm->arch;
if (!avic)
return;
avic_free_vm_id(vm_data->avic_vm_id); avic_free_vm_id(vm_data->avic_vm_id);
if (vm_data->avic_logical_id_table_page) if (vm_data->avic_logical_id_table_page)

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@ -1239,6 +1239,11 @@ static inline bool cpu_has_vmx_invvpid_global(void)
return vmx_capability.vpid & VMX_VPID_EXTENT_GLOBAL_CONTEXT_BIT; return vmx_capability.vpid & VMX_VPID_EXTENT_GLOBAL_CONTEXT_BIT;
} }
static inline bool cpu_has_vmx_invvpid(void)
{
return vmx_capability.vpid & VMX_VPID_INVVPID_BIT;
}
static inline bool cpu_has_vmx_ept(void) static inline bool cpu_has_vmx_ept(void)
{ {
return vmcs_config.cpu_based_2nd_exec_ctrl & return vmcs_config.cpu_based_2nd_exec_ctrl &
@ -2753,7 +2758,6 @@ static void nested_vmx_setup_ctls_msrs(struct vcpu_vmx *vmx)
SECONDARY_EXEC_RDTSCP | SECONDARY_EXEC_RDTSCP |
SECONDARY_EXEC_DESC | SECONDARY_EXEC_DESC |
SECONDARY_EXEC_VIRTUALIZE_X2APIC_MODE | SECONDARY_EXEC_VIRTUALIZE_X2APIC_MODE |
SECONDARY_EXEC_ENABLE_VPID |
SECONDARY_EXEC_APIC_REGISTER_VIRT | SECONDARY_EXEC_APIC_REGISTER_VIRT |
SECONDARY_EXEC_VIRTUAL_INTR_DELIVERY | SECONDARY_EXEC_VIRTUAL_INTR_DELIVERY |
SECONDARY_EXEC_WBINVD_EXITING | SECONDARY_EXEC_WBINVD_EXITING |
@ -2781,10 +2785,12 @@ static void nested_vmx_setup_ctls_msrs(struct vcpu_vmx *vmx)
* though it is treated as global context. The alternative is * though it is treated as global context. The alternative is
* not failing the single-context invvpid, and it is worse. * not failing the single-context invvpid, and it is worse.
*/ */
if (enable_vpid) if (enable_vpid) {
vmx->nested.nested_vmx_secondary_ctls_high |=
SECONDARY_EXEC_ENABLE_VPID;
vmx->nested.nested_vmx_vpid_caps = VMX_VPID_INVVPID_BIT | vmx->nested.nested_vmx_vpid_caps = VMX_VPID_INVVPID_BIT |
VMX_VPID_EXTENT_SUPPORTED_MASK; VMX_VPID_EXTENT_SUPPORTED_MASK;
else } else
vmx->nested.nested_vmx_vpid_caps = 0; vmx->nested.nested_vmx_vpid_caps = 0;
if (enable_unrestricted_guest) if (enable_unrestricted_guest)
@ -4024,6 +4030,12 @@ static void vmx_flush_tlb(struct kvm_vcpu *vcpu)
__vmx_flush_tlb(vcpu, to_vmx(vcpu)->vpid); __vmx_flush_tlb(vcpu, to_vmx(vcpu)->vpid);
} }
static void vmx_flush_tlb_ept_only(struct kvm_vcpu *vcpu)
{
if (enable_ept)
vmx_flush_tlb(vcpu);
}
static void vmx_decache_cr0_guest_bits(struct kvm_vcpu *vcpu) static void vmx_decache_cr0_guest_bits(struct kvm_vcpu *vcpu)
{ {
ulong cr0_guest_owned_bits = vcpu->arch.cr0_guest_owned_bits; ulong cr0_guest_owned_bits = vcpu->arch.cr0_guest_owned_bits;
@ -6517,8 +6529,10 @@ static __init int hardware_setup(void)
if (boot_cpu_has(X86_FEATURE_NX)) if (boot_cpu_has(X86_FEATURE_NX))
kvm_enable_efer_bits(EFER_NX); kvm_enable_efer_bits(EFER_NX);
if (!cpu_has_vmx_vpid()) if (!cpu_has_vmx_vpid() || !cpu_has_vmx_invvpid() ||
!(cpu_has_vmx_invvpid_single() || cpu_has_vmx_invvpid_global()))
enable_vpid = 0; enable_vpid = 0;
if (!cpu_has_vmx_shadow_vmcs()) if (!cpu_has_vmx_shadow_vmcs())
enable_shadow_vmcs = 0; enable_shadow_vmcs = 0;
if (enable_shadow_vmcs) if (enable_shadow_vmcs)
@ -8501,7 +8515,8 @@ static int vmx_handle_exit(struct kvm_vcpu *vcpu)
&& kvm_vmx_exit_handlers[exit_reason]) && kvm_vmx_exit_handlers[exit_reason])
return kvm_vmx_exit_handlers[exit_reason](vcpu); return kvm_vmx_exit_handlers[exit_reason](vcpu);
else { else {
WARN_ONCE(1, "vmx: unexpected exit reason 0x%x\n", exit_reason); vcpu_unimpl(vcpu, "vmx: unexpected exit reason 0x%x\n",
exit_reason);
kvm_queue_exception(vcpu, UD_VECTOR); kvm_queue_exception(vcpu, UD_VECTOR);
return 1; return 1;
} }
@ -8547,6 +8562,7 @@ static void vmx_set_virtual_x2apic_mode(struct kvm_vcpu *vcpu, bool set)
} else { } else {
sec_exec_control &= ~SECONDARY_EXEC_VIRTUALIZE_X2APIC_MODE; sec_exec_control &= ~SECONDARY_EXEC_VIRTUALIZE_X2APIC_MODE;
sec_exec_control |= SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES; sec_exec_control |= SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES;
vmx_flush_tlb_ept_only(vcpu);
} }
vmcs_write32(SECONDARY_VM_EXEC_CONTROL, sec_exec_control); vmcs_write32(SECONDARY_VM_EXEC_CONTROL, sec_exec_control);
@ -8572,8 +8588,10 @@ static void vmx_set_apic_access_page_addr(struct kvm_vcpu *vcpu, hpa_t hpa)
*/ */
if (!is_guest_mode(vcpu) || if (!is_guest_mode(vcpu) ||
!nested_cpu_has2(get_vmcs12(&vmx->vcpu), !nested_cpu_has2(get_vmcs12(&vmx->vcpu),
SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES)) SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES)) {
vmcs_write64(APIC_ACCESS_ADDR, hpa); vmcs_write64(APIC_ACCESS_ADDR, hpa);
vmx_flush_tlb_ept_only(vcpu);
}
} }
static void vmx_hwapic_isr_update(struct kvm_vcpu *vcpu, int max_isr) static void vmx_hwapic_isr_update(struct kvm_vcpu *vcpu, int max_isr)
@ -9974,7 +9992,6 @@ static int prepare_vmcs02(struct kvm_vcpu *vcpu, struct vmcs12 *vmcs12,
{ {
struct vcpu_vmx *vmx = to_vmx(vcpu); struct vcpu_vmx *vmx = to_vmx(vcpu);
u32 exec_control; u32 exec_control;
bool nested_ept_enabled = false;
vmcs_write16(GUEST_ES_SELECTOR, vmcs12->guest_es_selector); vmcs_write16(GUEST_ES_SELECTOR, vmcs12->guest_es_selector);
vmcs_write16(GUEST_CS_SELECTOR, vmcs12->guest_cs_selector); vmcs_write16(GUEST_CS_SELECTOR, vmcs12->guest_cs_selector);
@ -10121,8 +10138,6 @@ static int prepare_vmcs02(struct kvm_vcpu *vcpu, struct vmcs12 *vmcs12,
vmcs12->guest_intr_status); vmcs12->guest_intr_status);
} }
nested_ept_enabled = (exec_control & SECONDARY_EXEC_ENABLE_EPT) != 0;
/* /*
* Write an illegal value to APIC_ACCESS_ADDR. Later, * Write an illegal value to APIC_ACCESS_ADDR. Later,
* nested_get_vmcs12_pages will either fix it up or * nested_get_vmcs12_pages will either fix it up or
@ -10255,6 +10270,9 @@ static int prepare_vmcs02(struct kvm_vcpu *vcpu, struct vmcs12 *vmcs12,
if (nested_cpu_has_ept(vmcs12)) { if (nested_cpu_has_ept(vmcs12)) {
kvm_mmu_unload(vcpu); kvm_mmu_unload(vcpu);
nested_ept_init_mmu_context(vcpu); nested_ept_init_mmu_context(vcpu);
} else if (nested_cpu_has2(vmcs12,
SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES)) {
vmx_flush_tlb_ept_only(vcpu);
} }
/* /*
@ -10282,12 +10300,10 @@ static int prepare_vmcs02(struct kvm_vcpu *vcpu, struct vmcs12 *vmcs12,
vmx_set_efer(vcpu, vcpu->arch.efer); vmx_set_efer(vcpu, vcpu->arch.efer);
/* Shadow page tables on either EPT or shadow page tables. */ /* Shadow page tables on either EPT or shadow page tables. */
if (nested_vmx_load_cr3(vcpu, vmcs12->guest_cr3, nested_ept_enabled, if (nested_vmx_load_cr3(vcpu, vmcs12->guest_cr3, nested_cpu_has_ept(vmcs12),
entry_failure_code)) entry_failure_code))
return 1; return 1;
kvm_mmu_reset_context(vcpu);
if (!enable_ept) if (!enable_ept)
vcpu->arch.walk_mmu->inject_page_fault = vmx_inject_page_fault_nested; vcpu->arch.walk_mmu->inject_page_fault = vmx_inject_page_fault_nested;
@ -11056,6 +11072,10 @@ static void nested_vmx_vmexit(struct kvm_vcpu *vcpu, u32 exit_reason,
vmx->nested.change_vmcs01_virtual_x2apic_mode = false; vmx->nested.change_vmcs01_virtual_x2apic_mode = false;
vmx_set_virtual_x2apic_mode(vcpu, vmx_set_virtual_x2apic_mode(vcpu,
vcpu->arch.apic_base & X2APIC_ENABLE); vcpu->arch.apic_base & X2APIC_ENABLE);
} else if (!nested_cpu_has_ept(vmcs12) &&
nested_cpu_has2(vmcs12,
SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES)) {
vmx_flush_tlb_ept_only(vcpu);
} }
/* This is needed for same reason as it was needed in prepare_vmcs02 */ /* This is needed for same reason as it was needed in prepare_vmcs02 */

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@ -8153,11 +8153,12 @@ void kvm_arch_destroy_vm(struct kvm *kvm)
if (kvm_x86_ops->vm_destroy) if (kvm_x86_ops->vm_destroy)
kvm_x86_ops->vm_destroy(kvm); kvm_x86_ops->vm_destroy(kvm);
kvm_iommu_unmap_guest(kvm); kvm_iommu_unmap_guest(kvm);
kfree(kvm->arch.vpic); kvm_pic_destroy(kvm);
kfree(kvm->arch.vioapic); kvm_ioapic_destroy(kvm);
kvm_free_vcpus(kvm); kvm_free_vcpus(kvm);
kvfree(rcu_dereference_check(kvm->arch.apic_map, 1)); kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
kvm_mmu_uninit_vm(kvm); kvm_mmu_uninit_vm(kvm);
kvm_page_track_cleanup(kvm);
} }
void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free, void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
@ -8566,11 +8567,11 @@ void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
{ {
struct x86_exception fault; struct x86_exception fault;
trace_kvm_async_pf_ready(work->arch.token, work->gva);
if (work->wakeup_all) if (work->wakeup_all)
work->arch.token = ~0; /* broadcast wakeup */ work->arch.token = ~0; /* broadcast wakeup */
else else
kvm_del_async_pf_gfn(vcpu, work->arch.gfn); kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
trace_kvm_async_pf_ready(work->arch.token, work->gva);
if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) && if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
!apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) { !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {

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@ -290,7 +290,7 @@ EXPORT_SYMBOL_GPL(memcpy_mcsafe_unrolled)
_ASM_EXTABLE_FAULT(.L_copy_leading_bytes, .L_memcpy_mcsafe_fail) _ASM_EXTABLE_FAULT(.L_copy_leading_bytes, .L_memcpy_mcsafe_fail)
_ASM_EXTABLE_FAULT(.L_cache_w0, .L_memcpy_mcsafe_fail) _ASM_EXTABLE_FAULT(.L_cache_w0, .L_memcpy_mcsafe_fail)
_ASM_EXTABLE_FAULT(.L_cache_w1, .L_memcpy_mcsafe_fail) _ASM_EXTABLE_FAULT(.L_cache_w1, .L_memcpy_mcsafe_fail)
_ASM_EXTABLE_FAULT(.L_cache_w3, .L_memcpy_mcsafe_fail) _ASM_EXTABLE_FAULT(.L_cache_w2, .L_memcpy_mcsafe_fail)
_ASM_EXTABLE_FAULT(.L_cache_w3, .L_memcpy_mcsafe_fail) _ASM_EXTABLE_FAULT(.L_cache_w3, .L_memcpy_mcsafe_fail)
_ASM_EXTABLE_FAULT(.L_cache_w4, .L_memcpy_mcsafe_fail) _ASM_EXTABLE_FAULT(.L_cache_w4, .L_memcpy_mcsafe_fail)
_ASM_EXTABLE_FAULT(.L_cache_w5, .L_memcpy_mcsafe_fail) _ASM_EXTABLE_FAULT(.L_cache_w5, .L_memcpy_mcsafe_fail)

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@ -48,7 +48,7 @@ static const unsigned long vaddr_start = __PAGE_OFFSET_BASE;
#if defined(CONFIG_X86_ESPFIX64) #if defined(CONFIG_X86_ESPFIX64)
static const unsigned long vaddr_end = ESPFIX_BASE_ADDR; static const unsigned long vaddr_end = ESPFIX_BASE_ADDR;
#elif defined(CONFIG_EFI) #elif defined(CONFIG_EFI)
static const unsigned long vaddr_end = EFI_VA_START; static const unsigned long vaddr_end = EFI_VA_END;
#else #else
static const unsigned long vaddr_end = __START_KERNEL_map; static const unsigned long vaddr_end = __START_KERNEL_map;
#endif #endif
@ -105,7 +105,7 @@ void __init kernel_randomize_memory(void)
*/ */
BUILD_BUG_ON(vaddr_start >= vaddr_end); BUILD_BUG_ON(vaddr_start >= vaddr_end);
BUILD_BUG_ON(IS_ENABLED(CONFIG_X86_ESPFIX64) && BUILD_BUG_ON(IS_ENABLED(CONFIG_X86_ESPFIX64) &&
vaddr_end >= EFI_VA_START); vaddr_end >= EFI_VA_END);
BUILD_BUG_ON((IS_ENABLED(CONFIG_X86_ESPFIX64) || BUILD_BUG_ON((IS_ENABLED(CONFIG_X86_ESPFIX64) ||
IS_ENABLED(CONFIG_EFI)) && IS_ENABLED(CONFIG_EFI)) &&
vaddr_end >= __START_KERNEL_map); vaddr_end >= __START_KERNEL_map);

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@ -8,6 +8,7 @@ PURGATORY_OBJS = $(addprefix $(obj)/,$(purgatory-y))
LDFLAGS_purgatory.ro := -e purgatory_start -r --no-undefined -nostdlib -z nodefaultlib LDFLAGS_purgatory.ro := -e purgatory_start -r --no-undefined -nostdlib -z nodefaultlib
targets += purgatory.ro targets += purgatory.ro
KASAN_SANITIZE := n
KCOV_INSTRUMENT := n KCOV_INSTRUMENT := n
# Default KBUILD_CFLAGS can have -pg option set when FTRACE is enabled. That # Default KBUILD_CFLAGS can have -pg option set when FTRACE is enabled. That

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@ -969,7 +969,7 @@ bool blk_mq_dispatch_rq_list(struct blk_mq_hw_ctx *hctx, struct list_head *list)
struct request *rq; struct request *rq;
LIST_HEAD(driver_list); LIST_HEAD(driver_list);
struct list_head *dptr; struct list_head *dptr;
int queued, ret = BLK_MQ_RQ_QUEUE_OK; int errors, queued, ret = BLK_MQ_RQ_QUEUE_OK;
/* /*
* Start off with dptr being NULL, so we start the first request * Start off with dptr being NULL, so we start the first request
@ -980,7 +980,7 @@ bool blk_mq_dispatch_rq_list(struct blk_mq_hw_ctx *hctx, struct list_head *list)
/* /*
* Now process all the entries, sending them to the driver. * Now process all the entries, sending them to the driver.
*/ */
queued = 0; errors = queued = 0;
while (!list_empty(list)) { while (!list_empty(list)) {
struct blk_mq_queue_data bd; struct blk_mq_queue_data bd;
@ -1037,6 +1037,7 @@ bool blk_mq_dispatch_rq_list(struct blk_mq_hw_ctx *hctx, struct list_head *list)
default: default:
pr_err("blk-mq: bad return on queue: %d\n", ret); pr_err("blk-mq: bad return on queue: %d\n", ret);
case BLK_MQ_RQ_QUEUE_ERROR: case BLK_MQ_RQ_QUEUE_ERROR:
errors++;
rq->errors = -EIO; rq->errors = -EIO;
blk_mq_end_request(rq, rq->errors); blk_mq_end_request(rq, rq->errors);
break; break;
@ -1088,7 +1089,7 @@ bool blk_mq_dispatch_rq_list(struct blk_mq_hw_ctx *hctx, struct list_head *list)
blk_mq_run_hw_queue(hctx, true); blk_mq_run_hw_queue(hctx, true);
} }
return queued != 0; return (queued + errors) != 0;
} }
static void __blk_mq_run_hw_queue(struct blk_mq_hw_ctx *hctx) static void __blk_mq_run_hw_queue(struct blk_mq_hw_ctx *hctx)

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@ -286,8 +286,11 @@ static int init_crypt(struct skcipher_request *req, crypto_completion_t done)
subreq->cryptlen = LRW_BUFFER_SIZE; subreq->cryptlen = LRW_BUFFER_SIZE;
if (req->cryptlen > LRW_BUFFER_SIZE) { if (req->cryptlen > LRW_BUFFER_SIZE) {
subreq->cryptlen = min(req->cryptlen, (unsigned)PAGE_SIZE); unsigned int n = min(req->cryptlen, (unsigned int)PAGE_SIZE);
rctx->ext = kmalloc(subreq->cryptlen, gfp);
rctx->ext = kmalloc(n, gfp);
if (rctx->ext)
subreq->cryptlen = n;
} }
rctx->src = req->src; rctx->src = req->src;

View File

@ -230,8 +230,11 @@ static int init_crypt(struct skcipher_request *req, crypto_completion_t done)
subreq->cryptlen = XTS_BUFFER_SIZE; subreq->cryptlen = XTS_BUFFER_SIZE;
if (req->cryptlen > XTS_BUFFER_SIZE) { if (req->cryptlen > XTS_BUFFER_SIZE) {
subreq->cryptlen = min(req->cryptlen, (unsigned)PAGE_SIZE); unsigned int n = min(req->cryptlen, (unsigned int)PAGE_SIZE);
rctx->ext = kmalloc(subreq->cryptlen, gfp);
rctx->ext = kmalloc(n, gfp);
if (rctx->ext)
subreq->cryptlen = n;
} }
rctx->src = req->src; rctx->src = req->src;

View File

@ -2,7 +2,6 @@
# Makefile for the Linux ACPI interpreter # Makefile for the Linux ACPI interpreter
# #
ccflags-y := -Os
ccflags-$(CONFIG_ACPI_DEBUG) += -DACPI_DEBUG_OUTPUT ccflags-$(CONFIG_ACPI_DEBUG) += -DACPI_DEBUG_OUTPUT
# #

View File

@ -25,9 +25,11 @@
ACPI_MODULE_NAME("platform"); ACPI_MODULE_NAME("platform");
static const struct acpi_device_id forbidden_id_list[] = { static const struct acpi_device_id forbidden_id_list[] = {
{"PNP0000", 0}, /* PIC */ {"PNP0000", 0}, /* PIC */
{"PNP0100", 0}, /* Timer */ {"PNP0100", 0}, /* Timer */
{"PNP0200", 0}, /* AT DMA Controller */ {"PNP0200", 0}, /* AT DMA Controller */
{"ACPI0009", 0}, /* IOxAPIC */
{"ACPI000A", 0}, /* IOAPIC */
{"", 0}, {"", 0},
}; };

View File

@ -1073,6 +1073,7 @@ static int ghes_remove(struct platform_device *ghes_dev)
if (list_empty(&ghes_sci)) if (list_empty(&ghes_sci))
unregister_acpi_hed_notifier(&ghes_notifier_sci); unregister_acpi_hed_notifier(&ghes_notifier_sci);
mutex_unlock(&ghes_list_mutex); mutex_unlock(&ghes_list_mutex);
synchronize_rcu();
break; break;
case ACPI_HEST_NOTIFY_NMI: case ACPI_HEST_NOTIFY_NMI:
ghes_nmi_remove(ghes); ghes_nmi_remove(ghes);

View File

@ -45,6 +45,12 @@ static acpi_status setup_res(struct acpi_resource *acpi_res, void *data)
struct resource *res = data; struct resource *res = data;
struct resource_win win; struct resource_win win;
/*
* We might assign this to 'res' later, make sure all pointers are
* cleared before the resource is added to the global list
*/
memset(&win, 0, sizeof(win));
res->flags = 0; res->flags = 0;
if (acpi_dev_filter_resource_type(acpi_res, IORESOURCE_MEM)) if (acpi_dev_filter_resource_type(acpi_res, IORESOURCE_MEM))
return AE_OK; return AE_OK;

View File

@ -47,6 +47,8 @@ static DEFINE_MUTEX(nbd_index_mutex);
struct nbd_sock { struct nbd_sock {
struct socket *sock; struct socket *sock;
struct mutex tx_lock; struct mutex tx_lock;
struct request *pending;
int sent;
}; };
#define NBD_TIMEDOUT 0 #define NBD_TIMEDOUT 0
@ -124,7 +126,8 @@ static const char *nbdcmd_to_ascii(int cmd)
static int nbd_size_clear(struct nbd_device *nbd, struct block_device *bdev) static int nbd_size_clear(struct nbd_device *nbd, struct block_device *bdev)
{ {
bd_set_size(bdev, 0); if (bdev->bd_openers <= 1)
bd_set_size(bdev, 0);
set_capacity(nbd->disk, 0); set_capacity(nbd->disk, 0);
kobject_uevent(&nbd_to_dev(nbd)->kobj, KOBJ_CHANGE); kobject_uevent(&nbd_to_dev(nbd)->kobj, KOBJ_CHANGE);
@ -190,7 +193,7 @@ static enum blk_eh_timer_return nbd_xmit_timeout(struct request *req,
dev_err(nbd_to_dev(nbd), "Connection timed out, shutting down connection\n"); dev_err(nbd_to_dev(nbd), "Connection timed out, shutting down connection\n");
set_bit(NBD_TIMEDOUT, &nbd->runtime_flags); set_bit(NBD_TIMEDOUT, &nbd->runtime_flags);
req->errors++; req->errors = -EIO;
mutex_lock(&nbd->config_lock); mutex_lock(&nbd->config_lock);
sock_shutdown(nbd); sock_shutdown(nbd);
@ -202,7 +205,7 @@ static enum blk_eh_timer_return nbd_xmit_timeout(struct request *req,
* Send or receive packet. * Send or receive packet.
*/ */
static int sock_xmit(struct nbd_device *nbd, int index, int send, static int sock_xmit(struct nbd_device *nbd, int index, int send,
struct iov_iter *iter, int msg_flags) struct iov_iter *iter, int msg_flags, int *sent)
{ {
struct socket *sock = nbd->socks[index]->sock; struct socket *sock = nbd->socks[index]->sock;
int result; int result;
@ -237,6 +240,8 @@ static int sock_xmit(struct nbd_device *nbd, int index, int send,
result = -EPIPE; /* short read */ result = -EPIPE; /* short read */
break; break;
} }
if (sent)
*sent += result;
} while (msg_data_left(&msg)); } while (msg_data_left(&msg));
tsk_restore_flags(current, pflags, PF_MEMALLOC); tsk_restore_flags(current, pflags, PF_MEMALLOC);
@ -248,6 +253,7 @@ static int sock_xmit(struct nbd_device *nbd, int index, int send,
static int nbd_send_cmd(struct nbd_device *nbd, struct nbd_cmd *cmd, int index) static int nbd_send_cmd(struct nbd_device *nbd, struct nbd_cmd *cmd, int index)
{ {
struct request *req = blk_mq_rq_from_pdu(cmd); struct request *req = blk_mq_rq_from_pdu(cmd);
struct nbd_sock *nsock = nbd->socks[index];
int result; int result;
struct nbd_request request = {.magic = htonl(NBD_REQUEST_MAGIC)}; struct nbd_request request = {.magic = htonl(NBD_REQUEST_MAGIC)};
struct kvec iov = {.iov_base = &request, .iov_len = sizeof(request)}; struct kvec iov = {.iov_base = &request, .iov_len = sizeof(request)};
@ -256,6 +262,7 @@ static int nbd_send_cmd(struct nbd_device *nbd, struct nbd_cmd *cmd, int index)
struct bio *bio; struct bio *bio;
u32 type; u32 type;
u32 tag = blk_mq_unique_tag(req); u32 tag = blk_mq_unique_tag(req);
int sent = nsock->sent, skip = 0;
iov_iter_kvec(&from, WRITE | ITER_KVEC, &iov, 1, sizeof(request)); iov_iter_kvec(&from, WRITE | ITER_KVEC, &iov, 1, sizeof(request));
@ -283,6 +290,17 @@ static int nbd_send_cmd(struct nbd_device *nbd, struct nbd_cmd *cmd, int index)
return -EIO; return -EIO;
} }
/* We did a partial send previously, and we at least sent the whole
* request struct, so just go and send the rest of the pages in the
* request.
*/
if (sent) {
if (sent >= sizeof(request)) {
skip = sent - sizeof(request);
goto send_pages;
}
iov_iter_advance(&from, sent);
}
request.type = htonl(type); request.type = htonl(type);
if (type != NBD_CMD_FLUSH) { if (type != NBD_CMD_FLUSH) {
request.from = cpu_to_be64((u64)blk_rq_pos(req) << 9); request.from = cpu_to_be64((u64)blk_rq_pos(req) << 9);
@ -294,15 +312,27 @@ static int nbd_send_cmd(struct nbd_device *nbd, struct nbd_cmd *cmd, int index)
cmd, nbdcmd_to_ascii(type), cmd, nbdcmd_to_ascii(type),
(unsigned long long)blk_rq_pos(req) << 9, blk_rq_bytes(req)); (unsigned long long)blk_rq_pos(req) << 9, blk_rq_bytes(req));
result = sock_xmit(nbd, index, 1, &from, result = sock_xmit(nbd, index, 1, &from,
(type == NBD_CMD_WRITE) ? MSG_MORE : 0); (type == NBD_CMD_WRITE) ? MSG_MORE : 0, &sent);
if (result <= 0) { if (result <= 0) {
if (result == -ERESTARTSYS) {
/* If we havne't sent anything we can just return BUSY,
* however if we have sent something we need to make
* sure we only allow this req to be sent until we are
* completely done.
*/
if (sent) {
nsock->pending = req;
nsock->sent = sent;
}
return BLK_MQ_RQ_QUEUE_BUSY;
}
dev_err_ratelimited(disk_to_dev(nbd->disk), dev_err_ratelimited(disk_to_dev(nbd->disk),
"Send control failed (result %d)\n", result); "Send control failed (result %d)\n", result);
return -EIO; return -EIO;
} }
send_pages:
if (type != NBD_CMD_WRITE) if (type != NBD_CMD_WRITE)
return 0; goto out;
bio = req->bio; bio = req->bio;
while (bio) { while (bio) {
@ -318,8 +348,25 @@ static int nbd_send_cmd(struct nbd_device *nbd, struct nbd_cmd *cmd, int index)
cmd, bvec.bv_len); cmd, bvec.bv_len);
iov_iter_bvec(&from, ITER_BVEC | WRITE, iov_iter_bvec(&from, ITER_BVEC | WRITE,
&bvec, 1, bvec.bv_len); &bvec, 1, bvec.bv_len);
result = sock_xmit(nbd, index, 1, &from, flags); if (skip) {
if (skip >= iov_iter_count(&from)) {
skip -= iov_iter_count(&from);
continue;
}
iov_iter_advance(&from, skip);
skip = 0;
}
result = sock_xmit(nbd, index, 1, &from, flags, &sent);
if (result <= 0) { if (result <= 0) {
if (result == -ERESTARTSYS) {
/* We've already sent the header, we
* have no choice but to set pending and
* return BUSY.
*/
nsock->pending = req;
nsock->sent = sent;
return BLK_MQ_RQ_QUEUE_BUSY;
}
dev_err(disk_to_dev(nbd->disk), dev_err(disk_to_dev(nbd->disk),
"Send data failed (result %d)\n", "Send data failed (result %d)\n",
result); result);
@ -336,6 +383,9 @@ static int nbd_send_cmd(struct nbd_device *nbd, struct nbd_cmd *cmd, int index)
} }
bio = next; bio = next;
} }
out:
nsock->pending = NULL;
nsock->sent = 0;
return 0; return 0;
} }
@ -353,7 +403,7 @@ static struct nbd_cmd *nbd_read_stat(struct nbd_device *nbd, int index)
reply.magic = 0; reply.magic = 0;
iov_iter_kvec(&to, READ | ITER_KVEC, &iov, 1, sizeof(reply)); iov_iter_kvec(&to, READ | ITER_KVEC, &iov, 1, sizeof(reply));
result = sock_xmit(nbd, index, 0, &to, MSG_WAITALL); result = sock_xmit(nbd, index, 0, &to, MSG_WAITALL, NULL);
if (result <= 0) { if (result <= 0) {
if (!test_bit(NBD_DISCONNECTED, &nbd->runtime_flags) && if (!test_bit(NBD_DISCONNECTED, &nbd->runtime_flags) &&
!test_bit(NBD_DISCONNECT_REQUESTED, &nbd->runtime_flags)) !test_bit(NBD_DISCONNECT_REQUESTED, &nbd->runtime_flags))
@ -383,7 +433,7 @@ static struct nbd_cmd *nbd_read_stat(struct nbd_device *nbd, int index)
if (ntohl(reply.error)) { if (ntohl(reply.error)) {
dev_err(disk_to_dev(nbd->disk), "Other side returned error (%d)\n", dev_err(disk_to_dev(nbd->disk), "Other side returned error (%d)\n",
ntohl(reply.error)); ntohl(reply.error));
req->errors++; req->errors = -EIO;
return cmd; return cmd;
} }
@ -395,11 +445,11 @@ static struct nbd_cmd *nbd_read_stat(struct nbd_device *nbd, int index)
rq_for_each_segment(bvec, req, iter) { rq_for_each_segment(bvec, req, iter) {
iov_iter_bvec(&to, ITER_BVEC | READ, iov_iter_bvec(&to, ITER_BVEC | READ,
&bvec, 1, bvec.bv_len); &bvec, 1, bvec.bv_len);
result = sock_xmit(nbd, index, 0, &to, MSG_WAITALL); result = sock_xmit(nbd, index, 0, &to, MSG_WAITALL, NULL);
if (result <= 0) { if (result <= 0) {
dev_err(disk_to_dev(nbd->disk), "Receive data failed (result %d)\n", dev_err(disk_to_dev(nbd->disk), "Receive data failed (result %d)\n",
result); result);
req->errors++; req->errors = -EIO;
return cmd; return cmd;
} }
dev_dbg(nbd_to_dev(nbd), "request %p: got %d bytes data\n", dev_dbg(nbd_to_dev(nbd), "request %p: got %d bytes data\n",
@ -469,7 +519,7 @@ static void nbd_clear_req(struct request *req, void *data, bool reserved)
if (!blk_mq_request_started(req)) if (!blk_mq_request_started(req))
return; return;
cmd = blk_mq_rq_to_pdu(req); cmd = blk_mq_rq_to_pdu(req);
req->errors++; req->errors = -EIO;
nbd_end_request(cmd); nbd_end_request(cmd);
} }
@ -482,22 +532,23 @@ static void nbd_clear_que(struct nbd_device *nbd)
} }
static void nbd_handle_cmd(struct nbd_cmd *cmd, int index) static int nbd_handle_cmd(struct nbd_cmd *cmd, int index)
{ {
struct request *req = blk_mq_rq_from_pdu(cmd); struct request *req = blk_mq_rq_from_pdu(cmd);
struct nbd_device *nbd = cmd->nbd; struct nbd_device *nbd = cmd->nbd;
struct nbd_sock *nsock; struct nbd_sock *nsock;
int ret;
if (index >= nbd->num_connections) { if (index >= nbd->num_connections) {
dev_err_ratelimited(disk_to_dev(nbd->disk), dev_err_ratelimited(disk_to_dev(nbd->disk),
"Attempted send on invalid socket\n"); "Attempted send on invalid socket\n");
goto error_out; return -EINVAL;
} }
if (test_bit(NBD_DISCONNECTED, &nbd->runtime_flags)) { if (test_bit(NBD_DISCONNECTED, &nbd->runtime_flags)) {
dev_err_ratelimited(disk_to_dev(nbd->disk), dev_err_ratelimited(disk_to_dev(nbd->disk),
"Attempted send on closed socket\n"); "Attempted send on closed socket\n");
goto error_out; return -EINVAL;
} }
req->errors = 0; req->errors = 0;
@ -508,29 +559,30 @@ static void nbd_handle_cmd(struct nbd_cmd *cmd, int index)
mutex_unlock(&nsock->tx_lock); mutex_unlock(&nsock->tx_lock);
dev_err_ratelimited(disk_to_dev(nbd->disk), dev_err_ratelimited(disk_to_dev(nbd->disk),
"Attempted send on closed socket\n"); "Attempted send on closed socket\n");
goto error_out; return -EINVAL;
} }
if (nbd_send_cmd(nbd, cmd, index) != 0) { /* Handle the case that we have a pending request that was partially
dev_err_ratelimited(disk_to_dev(nbd->disk), * transmitted that _has_ to be serviced first. We need to call requeue
"Request send failed\n"); * here so that it gets put _after_ the request that is already on the
req->errors++; * dispatch list.
nbd_end_request(cmd); */
if (unlikely(nsock->pending && nsock->pending != req)) {
blk_mq_requeue_request(req, true);
ret = 0;
goto out;
} }
ret = nbd_send_cmd(nbd, cmd, index);
out:
mutex_unlock(&nsock->tx_lock); mutex_unlock(&nsock->tx_lock);
return ret;
return;
error_out:
req->errors++;
nbd_end_request(cmd);
} }
static int nbd_queue_rq(struct blk_mq_hw_ctx *hctx, static int nbd_queue_rq(struct blk_mq_hw_ctx *hctx,
const struct blk_mq_queue_data *bd) const struct blk_mq_queue_data *bd)
{ {
struct nbd_cmd *cmd = blk_mq_rq_to_pdu(bd->rq); struct nbd_cmd *cmd = blk_mq_rq_to_pdu(bd->rq);
int ret;
/* /*
* Since we look at the bio's to send the request over the network we * Since we look at the bio's to send the request over the network we
@ -543,10 +595,20 @@ static int nbd_queue_rq(struct blk_mq_hw_ctx *hctx,
*/ */
init_completion(&cmd->send_complete); init_completion(&cmd->send_complete);
blk_mq_start_request(bd->rq); blk_mq_start_request(bd->rq);
nbd_handle_cmd(cmd, hctx->queue_num);
/* We can be called directly from the user space process, which means we
* could possibly have signals pending so our sendmsg will fail. In
* this case we need to return that we are busy, otherwise error out as
* appropriate.
*/
ret = nbd_handle_cmd(cmd, hctx->queue_num);
if (ret < 0)
ret = BLK_MQ_RQ_QUEUE_ERROR;
if (!ret)
ret = BLK_MQ_RQ_QUEUE_OK;
complete(&cmd->send_complete); complete(&cmd->send_complete);
return BLK_MQ_RQ_QUEUE_OK; return ret;
} }
static int nbd_add_socket(struct nbd_device *nbd, struct block_device *bdev, static int nbd_add_socket(struct nbd_device *nbd, struct block_device *bdev,
@ -581,6 +643,8 @@ static int nbd_add_socket(struct nbd_device *nbd, struct block_device *bdev,
mutex_init(&nsock->tx_lock); mutex_init(&nsock->tx_lock);
nsock->sock = sock; nsock->sock = sock;
nsock->pending = NULL;
nsock->sent = 0;
socks[nbd->num_connections++] = nsock; socks[nbd->num_connections++] = nsock;
if (max_part) if (max_part)
@ -602,6 +666,8 @@ static void nbd_reset(struct nbd_device *nbd)
static void nbd_bdev_reset(struct block_device *bdev) static void nbd_bdev_reset(struct block_device *bdev)
{ {
if (bdev->bd_openers > 1)
return;
set_device_ro(bdev, false); set_device_ro(bdev, false);
bdev->bd_inode->i_size = 0; bdev->bd_inode->i_size = 0;
if (max_part > 0) { if (max_part > 0) {
@ -634,7 +700,7 @@ static void send_disconnects(struct nbd_device *nbd)
for (i = 0; i < nbd->num_connections; i++) { for (i = 0; i < nbd->num_connections; i++) {
iov_iter_kvec(&from, WRITE | ITER_KVEC, &iov, 1, sizeof(request)); iov_iter_kvec(&from, WRITE | ITER_KVEC, &iov, 1, sizeof(request));
ret = sock_xmit(nbd, i, 1, &from, 0); ret = sock_xmit(nbd, i, 1, &from, 0, NULL);
if (ret <= 0) if (ret <= 0)
dev_err(disk_to_dev(nbd->disk), dev_err(disk_to_dev(nbd->disk),
"Send disconnect failed %d\n", ret); "Send disconnect failed %d\n", ret);
@ -665,7 +731,8 @@ static int nbd_clear_sock(struct nbd_device *nbd, struct block_device *bdev)
{ {
sock_shutdown(nbd); sock_shutdown(nbd);
nbd_clear_que(nbd); nbd_clear_que(nbd);
kill_bdev(bdev);
__invalidate_device(bdev, true);
nbd_bdev_reset(bdev); nbd_bdev_reset(bdev);
/* /*
* We want to give the run thread a chance to wait for everybody * We want to give the run thread a chance to wait for everybody
@ -781,7 +848,10 @@ static int __nbd_ioctl(struct block_device *bdev, struct nbd_device *nbd,
nbd_size_set(nbd, bdev, nbd->blksize, arg); nbd_size_set(nbd, bdev, nbd->blksize, arg);
return 0; return 0;
case NBD_SET_TIMEOUT: case NBD_SET_TIMEOUT:
nbd->tag_set.timeout = arg * HZ; if (arg) {
nbd->tag_set.timeout = arg * HZ;
blk_queue_rq_timeout(nbd->disk->queue, arg * HZ);
}
return 0; return 0;
case NBD_SET_FLAGS: case NBD_SET_FLAGS:

View File

@ -17,7 +17,7 @@
#include <linux/init.h> #include <linux/init.h>
#include <linux/of.h> #include <linux/of.h>
#include <linux/clockchip.h> #include <linux/clockchips.h>
extern struct of_device_id __clkevt_of_table[]; extern struct of_device_id __clkevt_of_table[];

View File

@ -918,11 +918,19 @@ static struct kobj_type ktype_cpufreq = {
.release = cpufreq_sysfs_release, .release = cpufreq_sysfs_release,
}; };
static int add_cpu_dev_symlink(struct cpufreq_policy *policy, static void add_cpu_dev_symlink(struct cpufreq_policy *policy, unsigned int cpu)
struct device *dev)
{ {
struct device *dev = get_cpu_device(cpu);
if (!dev)
return;
if (cpumask_test_and_set_cpu(cpu, policy->real_cpus))
return;
dev_dbg(dev, "%s: Adding symlink\n", __func__); dev_dbg(dev, "%s: Adding symlink\n", __func__);
return sysfs_create_link(&dev->kobj, &policy->kobj, "cpufreq"); if (sysfs_create_link(&dev->kobj, &policy->kobj, "cpufreq"))
dev_err(dev, "cpufreq symlink creation failed\n");
} }
static void remove_cpu_dev_symlink(struct cpufreq_policy *policy, static void remove_cpu_dev_symlink(struct cpufreq_policy *policy,
@ -1180,10 +1188,10 @@ static int cpufreq_online(unsigned int cpu)
policy->user_policy.min = policy->min; policy->user_policy.min = policy->min;
policy->user_policy.max = policy->max; policy->user_policy.max = policy->max;
write_lock_irqsave(&cpufreq_driver_lock, flags); for_each_cpu(j, policy->related_cpus) {
for_each_cpu(j, policy->related_cpus)
per_cpu(cpufreq_cpu_data, j) = policy; per_cpu(cpufreq_cpu_data, j) = policy;
write_unlock_irqrestore(&cpufreq_driver_lock, flags); add_cpu_dev_symlink(policy, j);
}
} else { } else {
policy->min = policy->user_policy.min; policy->min = policy->user_policy.min;
policy->max = policy->user_policy.max; policy->max = policy->user_policy.max;
@ -1275,13 +1283,15 @@ out_exit_policy:
if (cpufreq_driver->exit) if (cpufreq_driver->exit)
cpufreq_driver->exit(policy); cpufreq_driver->exit(policy);
for_each_cpu(j, policy->real_cpus)
remove_cpu_dev_symlink(policy, get_cpu_device(j));
out_free_policy: out_free_policy:
cpufreq_policy_free(policy); cpufreq_policy_free(policy);
return ret; return ret;
} }
static int cpufreq_offline(unsigned int cpu);
/** /**
* cpufreq_add_dev - the cpufreq interface for a CPU device. * cpufreq_add_dev - the cpufreq interface for a CPU device.
* @dev: CPU device. * @dev: CPU device.
@ -1303,16 +1313,10 @@ static int cpufreq_add_dev(struct device *dev, struct subsys_interface *sif)
/* Create sysfs link on CPU registration */ /* Create sysfs link on CPU registration */
policy = per_cpu(cpufreq_cpu_data, cpu); policy = per_cpu(cpufreq_cpu_data, cpu);
if (!policy || cpumask_test_and_set_cpu(cpu, policy->real_cpus)) if (policy)
return 0; add_cpu_dev_symlink(policy, cpu);
ret = add_cpu_dev_symlink(policy, dev); return 0;
if (ret) {
cpumask_clear_cpu(cpu, policy->real_cpus);
cpufreq_offline(cpu);
}
return ret;
} }
static int cpufreq_offline(unsigned int cpu) static int cpufreq_offline(unsigned int cpu)

View File

@ -175,6 +175,24 @@ static int powernv_cpuidle_driver_init(void)
drv->state_count += 1; drv->state_count += 1;
} }
/*
* On the PowerNV platform cpu_present may be less than cpu_possible in
* cases when firmware detects the CPU, but it is not available to the
* OS. If CONFIG_HOTPLUG_CPU=n, then such CPUs are not hotplugable at
* run time and hence cpu_devices are not created for those CPUs by the
* generic topology_init().
*
* drv->cpumask defaults to cpu_possible_mask in
* __cpuidle_driver_init(). This breaks cpuidle on PowerNV where
* cpu_devices are not created for CPUs in cpu_possible_mask that
* cannot be hot-added later at run time.
*
* Trying cpuidle_register_device() on a CPU without a cpu_device is
* incorrect, so pass a correct CPU mask to the generic cpuidle driver.
*/
drv->cpumask = (struct cpumask *)cpu_present_mask;
return 0; return 0;
} }

View File

@ -1015,6 +1015,7 @@ const struct ccp_vdata ccpv5a = {
const struct ccp_vdata ccpv5b = { const struct ccp_vdata ccpv5b = {
.version = CCP_VERSION(5, 0), .version = CCP_VERSION(5, 0),
.dma_chan_attr = DMA_PRIVATE,
.setup = ccp5other_config, .setup = ccp5other_config,
.perform = &ccp5_actions, .perform = &ccp5_actions,
.bar = 2, .bar = 2,

View File

@ -179,6 +179,10 @@
/* ------------------------ General CCP Defines ------------------------ */ /* ------------------------ General CCP Defines ------------------------ */
#define CCP_DMA_DFLT 0x0
#define CCP_DMA_PRIV 0x1
#define CCP_DMA_PUB 0x2
#define CCP_DMAPOOL_MAX_SIZE 64 #define CCP_DMAPOOL_MAX_SIZE 64
#define CCP_DMAPOOL_ALIGN BIT(5) #define CCP_DMAPOOL_ALIGN BIT(5)
@ -636,6 +640,7 @@ struct ccp_actions {
/* Structure to hold CCP version-specific values */ /* Structure to hold CCP version-specific values */
struct ccp_vdata { struct ccp_vdata {
const unsigned int version; const unsigned int version;
const unsigned int dma_chan_attr;
void (*setup)(struct ccp_device *); void (*setup)(struct ccp_device *);
const struct ccp_actions *perform; const struct ccp_actions *perform;
const unsigned int bar; const unsigned int bar;

View File

@ -10,6 +10,7 @@
* published by the Free Software Foundation. * published by the Free Software Foundation.
*/ */
#include <linux/module.h>
#include <linux/kernel.h> #include <linux/kernel.h>
#include <linux/dmaengine.h> #include <linux/dmaengine.h>
#include <linux/spinlock.h> #include <linux/spinlock.h>
@ -25,6 +26,37 @@
(mask == 0) ? 64 : fls64(mask); \ (mask == 0) ? 64 : fls64(mask); \
}) })
/* The CCP as a DMA provider can be configured for public or private
* channels. Default is specified in the vdata for the device (PCI ID).
* This module parameter will override for all channels on all devices:
* dma_chan_attr = 0x2 to force all channels public
* = 0x1 to force all channels private
* = 0x0 to defer to the vdata setting
* = any other value: warning, revert to 0x0
*/
static unsigned int dma_chan_attr = CCP_DMA_DFLT;
module_param(dma_chan_attr, uint, 0444);
MODULE_PARM_DESC(dma_chan_attr, "Set DMA channel visibility: 0 (default) = device defaults, 1 = make private, 2 = make public");
unsigned int ccp_get_dma_chan_attr(struct ccp_device *ccp)
{
switch (dma_chan_attr) {
case CCP_DMA_DFLT:
return ccp->vdata->dma_chan_attr;
case CCP_DMA_PRIV:
return DMA_PRIVATE;
case CCP_DMA_PUB:
return 0;
default:
dev_info_once(ccp->dev, "Invalid value for dma_chan_attr: %d\n",
dma_chan_attr);
return ccp->vdata->dma_chan_attr;
}
}
static void ccp_free_cmd_resources(struct ccp_device *ccp, static void ccp_free_cmd_resources(struct ccp_device *ccp,
struct list_head *list) struct list_head *list)
{ {
@ -675,6 +707,15 @@ int ccp_dmaengine_register(struct ccp_device *ccp)
dma_cap_set(DMA_SG, dma_dev->cap_mask); dma_cap_set(DMA_SG, dma_dev->cap_mask);
dma_cap_set(DMA_INTERRUPT, dma_dev->cap_mask); dma_cap_set(DMA_INTERRUPT, dma_dev->cap_mask);
/* The DMA channels for this device can be set to public or private,
* and overridden by the module parameter dma_chan_attr.
* Default: according to the value in vdata (dma_chan_attr=0)
* dma_chan_attr=0x1: all channels private (override vdata)
* dma_chan_attr=0x2: all channels public (override vdata)
*/
if (ccp_get_dma_chan_attr(ccp) == DMA_PRIVATE)
dma_cap_set(DMA_PRIVATE, dma_dev->cap_mask);
INIT_LIST_HEAD(&dma_dev->channels); INIT_LIST_HEAD(&dma_dev->channels);
for (i = 0; i < ccp->cmd_q_count; i++) { for (i = 0; i < ccp->cmd_q_count; i++) {
chan = ccp->ccp_dma_chan + i; chan = ccp->ccp_dma_chan + i;

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@ -251,8 +251,11 @@ static void bcm2835_dma_create_cb_set_length(
*/ */
/* have we filled in period_length yet? */ /* have we filled in period_length yet? */
if (*total_len + control_block->length < period_len) if (*total_len + control_block->length < period_len) {
/* update number of bytes in this period so far */
*total_len += control_block->length;
return; return;
}
/* calculate the length that remains to reach period_length */ /* calculate the length that remains to reach period_length */
control_block->length = period_len - *total_len; control_block->length = period_len - *total_len;

View File

@ -1108,12 +1108,14 @@ static struct dmaengine_unmap_pool *__get_unmap_pool(int nr)
switch (order) { switch (order) {
case 0 ... 1: case 0 ... 1:
return &unmap_pool[0]; return &unmap_pool[0];
#if IS_ENABLED(CONFIG_DMA_ENGINE_RAID)
case 2 ... 4: case 2 ... 4:
return &unmap_pool[1]; return &unmap_pool[1];
case 5 ... 7: case 5 ... 7:
return &unmap_pool[2]; return &unmap_pool[2];
case 8: case 8:
return &unmap_pool[3]; return &unmap_pool[3];
#endif
default: default:
BUG(); BUG();
return NULL; return NULL;

View File

@ -43,6 +43,7 @@ config EDAC_LEGACY_SYSFS
config EDAC_DEBUG config EDAC_DEBUG
bool "Debugging" bool "Debugging"
select DEBUG_FS
help help
This turns on debugging information for the entire EDAC subsystem. This turns on debugging information for the entire EDAC subsystem.
You do so by inserting edac_module with "edac_debug_level=x." Valid You do so by inserting edac_module with "edac_debug_level=x." Valid
@ -259,6 +260,15 @@ config EDAC_SKX
Support for error detection and correction the Intel Support for error detection and correction the Intel
Skylake server Integrated Memory Controllers. Skylake server Integrated Memory Controllers.
config EDAC_PND2
tristate "Intel Pondicherry2"
depends on EDAC_MM_EDAC && PCI && X86_64 && X86_MCE_INTEL
help
Support for error detection and correction on the Intel
Pondicherry2 Integrated Memory Controller. This SoC IP is
first used on the Apollo Lake platform and Denverton
micro-server but may appear on others in the future.
config EDAC_MPC85XX config EDAC_MPC85XX
tristate "Freescale MPC83xx / MPC85xx" tristate "Freescale MPC83xx / MPC85xx"
depends on EDAC_MM_EDAC && FSL_SOC depends on EDAC_MM_EDAC && FSL_SOC

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@ -32,6 +32,7 @@ obj-$(CONFIG_EDAC_I7300) += i7300_edac.o
obj-$(CONFIG_EDAC_I7CORE) += i7core_edac.o obj-$(CONFIG_EDAC_I7CORE) += i7core_edac.o
obj-$(CONFIG_EDAC_SBRIDGE) += sb_edac.o obj-$(CONFIG_EDAC_SBRIDGE) += sb_edac.o
obj-$(CONFIG_EDAC_SKX) += skx_edac.o obj-$(CONFIG_EDAC_SKX) += skx_edac.o
obj-$(CONFIG_EDAC_PND2) += pnd2_edac.o
obj-$(CONFIG_EDAC_E7XXX) += e7xxx_edac.o obj-$(CONFIG_EDAC_E7XXX) += e7xxx_edac.o
obj-$(CONFIG_EDAC_E752X) += e752x_edac.o obj-$(CONFIG_EDAC_E752X) += e752x_edac.o
obj-$(CONFIG_EDAC_I82443BXGX) += i82443bxgx_edac.o obj-$(CONFIG_EDAC_I82443BXGX) += i82443bxgx_edac.o

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@ -1293,7 +1293,7 @@ static int i5000_init_csrows(struct mem_ctl_info *mci)
dimm->mtype = MEM_FB_DDR2; dimm->mtype = MEM_FB_DDR2;
/* ask what device type on this row */ /* ask what device type on this row */
if (MTR_DRAM_WIDTH(mtr)) if (MTR_DRAM_WIDTH(mtr) == 8)
dimm->dtype = DEV_X8; dimm->dtype = DEV_X8;
else else
dimm->dtype = DEV_X4; dimm->dtype = DEV_X4;

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@ -1207,13 +1207,14 @@ static int i5400_init_dimms(struct mem_ctl_info *mci)
dimm->nr_pages = size_mb << 8; dimm->nr_pages = size_mb << 8;
dimm->grain = 8; dimm->grain = 8;
dimm->dtype = MTR_DRAM_WIDTH(mtr) ? DEV_X8 : DEV_X4; dimm->dtype = MTR_DRAM_WIDTH(mtr) == 8 ?
DEV_X8 : DEV_X4;
dimm->mtype = MEM_FB_DDR2; dimm->mtype = MEM_FB_DDR2;
/* /*
* The eccc mechanism is SDDC (aka SECC), with * The eccc mechanism is SDDC (aka SECC), with
* is similar to Chipkill. * is similar to Chipkill.
*/ */
dimm->edac_mode = MTR_DRAM_WIDTH(mtr) ? dimm->edac_mode = MTR_DRAM_WIDTH(mtr) == 8 ?
EDAC_S8ECD8ED : EDAC_S4ECD4ED; EDAC_S8ECD8ED : EDAC_S4ECD4ED;
ndimms++; ndimms++;
} }

1546
drivers/edac/pnd2_edac.c Normal file

File diff suppressed because it is too large Load Diff

301
drivers/edac/pnd2_edac.h Normal file
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@ -0,0 +1,301 @@
/*
* Register bitfield descriptions for Pondicherry2 memory controller.
*
* Copyright (c) 2016, Intel Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*/
#ifndef _PND2_REGS_H
#define _PND2_REGS_H
struct b_cr_touud_lo_pci {
u32 lock : 1;
u32 reserved_1 : 19;
u32 touud : 12;
};
#define b_cr_touud_lo_pci_port 0x4c
#define b_cr_touud_lo_pci_offset 0xa8
#define b_cr_touud_lo_pci_r_opcode 0x04
struct b_cr_touud_hi_pci {
u32 touud : 7;
u32 reserved_0 : 25;
};
#define b_cr_touud_hi_pci_port 0x4c
#define b_cr_touud_hi_pci_offset 0xac
#define b_cr_touud_hi_pci_r_opcode 0x04
struct b_cr_tolud_pci {
u32 lock : 1;
u32 reserved_0 : 19;
u32 tolud : 12;
};
#define b_cr_tolud_pci_port 0x4c
#define b_cr_tolud_pci_offset 0xbc
#define b_cr_tolud_pci_r_opcode 0x04
struct b_cr_mchbar_lo_pci {
u32 enable : 1;
u32 pad_3_1 : 3;
u32 pad_14_4: 11;
u32 base: 17;
};
struct b_cr_mchbar_hi_pci {
u32 base : 7;
u32 pad_31_7 : 25;
};
/* Symmetric region */
struct b_cr_slice_channel_hash {
u64 slice_1_disabled : 1;
u64 hvm_mode : 1;
u64 interleave_mode : 2;
u64 slice_0_mem_disabled : 1;
u64 reserved_0 : 1;
u64 slice_hash_mask : 14;
u64 reserved_1 : 11;
u64 enable_pmi_dual_data_mode : 1;
u64 ch_1_disabled : 1;
u64 reserved_2 : 1;
u64 sym_slice0_channel_enabled : 2;
u64 sym_slice1_channel_enabled : 2;
u64 ch_hash_mask : 14;
u64 reserved_3 : 11;
u64 lock : 1;
};
#define b_cr_slice_channel_hash_port 0x4c
#define b_cr_slice_channel_hash_offset 0x4c58
#define b_cr_slice_channel_hash_r_opcode 0x06
struct b_cr_mot_out_base_mchbar {
u32 reserved_0 : 14;
u32 mot_out_base : 15;
u32 reserved_1 : 1;
u32 tr_en : 1;
u32 imr_en : 1;
};
#define b_cr_mot_out_base_mchbar_port 0x4c
#define b_cr_mot_out_base_mchbar_offset 0x6af0
#define b_cr_mot_out_base_mchbar_r_opcode 0x00
struct b_cr_mot_out_mask_mchbar {
u32 reserved_0 : 14;
u32 mot_out_mask : 15;
u32 reserved_1 : 1;
u32 ia_iwb_en : 1;
u32 gt_iwb_en : 1;
};
#define b_cr_mot_out_mask_mchbar_port 0x4c
#define b_cr_mot_out_mask_mchbar_offset 0x6af4
#define b_cr_mot_out_mask_mchbar_r_opcode 0x00
struct b_cr_asym_mem_region0_mchbar {
u32 pad : 4;
u32 slice0_asym_base : 11;
u32 pad_18_15 : 4;
u32 slice0_asym_limit : 11;
u32 slice0_asym_channel_select : 1;
u32 slice0_asym_enable : 1;
};
#define b_cr_asym_mem_region0_mchbar_port 0x4c
#define b_cr_asym_mem_region0_mchbar_offset 0x6e40
#define b_cr_asym_mem_region0_mchbar_r_opcode 0x00
struct b_cr_asym_mem_region1_mchbar {
u32 pad : 4;
u32 slice1_asym_base : 11;
u32 pad_18_15 : 4;
u32 slice1_asym_limit : 11;
u32 slice1_asym_channel_select : 1;
u32 slice1_asym_enable : 1;
};
#define b_cr_asym_mem_region1_mchbar_port 0x4c
#define b_cr_asym_mem_region1_mchbar_offset 0x6e44
#define b_cr_asym_mem_region1_mchbar_r_opcode 0x00
/* Some bit fields moved in above two structs on Denverton */
struct b_cr_asym_mem_region_denverton {
u32 pad : 4;
u32 slice_asym_base : 8;
u32 pad_19_12 : 8;
u32 slice_asym_limit : 8;
u32 pad_28_30 : 3;
u32 slice_asym_enable : 1;
};
struct b_cr_asym_2way_mem_region_mchbar {
u32 pad : 2;
u32 asym_2way_intlv_mode : 2;
u32 asym_2way_base : 11;
u32 pad_16_15 : 2;
u32 asym_2way_limit : 11;
u32 pad_30_28 : 3;
u32 asym_2way_interleave_enable : 1;
};
#define b_cr_asym_2way_mem_region_mchbar_port 0x4c
#define b_cr_asym_2way_mem_region_mchbar_offset 0x6e50
#define b_cr_asym_2way_mem_region_mchbar_r_opcode 0x00
/* Apollo Lake d-unit */
struct d_cr_drp0 {
u32 rken0 : 1;
u32 rken1 : 1;
u32 ddmen : 1;
u32 rsvd3 : 1;
u32 dwid : 2;
u32 dden : 3;
u32 rsvd13_9 : 5;
u32 rsien : 1;
u32 bahen : 1;
u32 rsvd18_16 : 3;
u32 caswizzle : 2;
u32 eccen : 1;
u32 dramtype : 3;
u32 blmode : 3;
u32 addrdec : 2;
u32 dramdevice_pr : 2;
};
#define d_cr_drp0_offset 0x1400
#define d_cr_drp0_r_opcode 0x00
/* Denverton d-unit */
struct d_cr_dsch {
u32 ch0en : 1;
u32 ch1en : 1;
u32 ddr4en : 1;
u32 coldwake : 1;
u32 newbypdis : 1;
u32 chan_width : 1;
u32 rsvd6_6 : 1;
u32 ooodis : 1;
u32 rsvd18_8 : 11;
u32 ic : 1;
u32 rsvd31_20 : 12;
};
#define d_cr_dsch_port 0x16
#define d_cr_dsch_offset 0x0
#define d_cr_dsch_r_opcode 0x0
struct d_cr_ecc_ctrl {
u32 eccen : 1;
u32 rsvd31_1 : 31;
};
#define d_cr_ecc_ctrl_offset 0x180
#define d_cr_ecc_ctrl_r_opcode 0x0
struct d_cr_drp {
u32 rken0 : 1;
u32 rken1 : 1;
u32 rken2 : 1;
u32 rken3 : 1;
u32 dimmdwid0 : 2;
u32 dimmdden0 : 2;
u32 dimmdwid1 : 2;
u32 dimmdden1 : 2;
u32 rsvd15_12 : 4;
u32 dimmflip : 1;
u32 rsvd31_17 : 15;
};
#define d_cr_drp_offset 0x158
#define d_cr_drp_r_opcode 0x0
struct d_cr_dmap {
u32 ba0 : 5;
u32 ba1 : 5;
u32 bg0 : 5; /* if ddr3, ba2 = bg0 */
u32 bg1 : 5; /* if ddr3, ba3 = bg1 */
u32 rs0 : 5;
u32 rs1 : 5;
u32 rsvd : 2;
};
#define d_cr_dmap_offset 0x174
#define d_cr_dmap_r_opcode 0x0
struct d_cr_dmap1 {
u32 ca11 : 6;
u32 bxor : 1;
u32 rsvd : 25;
};
#define d_cr_dmap1_offset 0xb4
#define d_cr_dmap1_r_opcode 0x0
struct d_cr_dmap2 {
u32 row0 : 5;
u32 row1 : 5;
u32 row2 : 5;
u32 row3 : 5;
u32 row4 : 5;
u32 row5 : 5;
u32 rsvd : 2;
};
#define d_cr_dmap2_offset 0x148
#define d_cr_dmap2_r_opcode 0x0
struct d_cr_dmap3 {
u32 row6 : 5;
u32 row7 : 5;
u32 row8 : 5;
u32 row9 : 5;
u32 row10 : 5;
u32 row11 : 5;
u32 rsvd : 2;
};
#define d_cr_dmap3_offset 0x14c
#define d_cr_dmap3_r_opcode 0x0
struct d_cr_dmap4 {
u32 row12 : 5;
u32 row13 : 5;
u32 row14 : 5;
u32 row15 : 5;
u32 row16 : 5;
u32 row17 : 5;
u32 rsvd : 2;
};
#define d_cr_dmap4_offset 0x150
#define d_cr_dmap4_r_opcode 0x0
struct d_cr_dmap5 {
u32 ca3 : 4;
u32 ca4 : 4;
u32 ca5 : 4;
u32 ca6 : 4;
u32 ca7 : 4;
u32 ca8 : 4;
u32 ca9 : 4;
u32 rsvd : 4;
};
#define d_cr_dmap5_offset 0x154
#define d_cr_dmap5_r_opcode 0x0
#endif /* _PND2_REGS_H */

View File

@ -1596,7 +1596,7 @@ static void xgene_edac_pa_report(struct edac_device_ctl_info *edac_dev)
reg = readl(ctx->dev_csr + IOBPATRANSERRINTSTS); reg = readl(ctx->dev_csr + IOBPATRANSERRINTSTS);
if (!reg) if (!reg)
goto chk_iob_axi0; goto chk_iob_axi0;
dev_err(edac_dev->dev, "IOB procesing agent (PA) transaction error\n"); dev_err(edac_dev->dev, "IOB processing agent (PA) transaction error\n");
if (reg & IOBPA_RDATA_CORRUPT_MASK) if (reg & IOBPA_RDATA_CORRUPT_MASK)
dev_err(edac_dev->dev, "IOB PA read data RAM error\n"); dev_err(edac_dev->dev, "IOB PA read data RAM error\n");
if (reg & IOBPA_M_RDATA_CORRUPT_MASK) if (reg & IOBPA_M_RDATA_CORRUPT_MASK)

View File

@ -389,7 +389,6 @@ int __init efi_mem_desc_lookup(u64 phys_addr, efi_memory_desc_t *out_md)
return 0; return 0;
} }
} }
pr_err_once("requested map not found.\n");
return -ENOENT; return -ENOENT;
} }

View File

@ -254,7 +254,7 @@ void __init efi_esrt_init(void)
rc = efi_mem_desc_lookup(efi.esrt, &md); rc = efi_mem_desc_lookup(efi.esrt, &md);
if (rc < 0) { if (rc < 0) {
pr_err("ESRT header is not in the memory map.\n"); pr_warn("ESRT header is not in the memory map.\n");
return; return;
} }

View File

@ -1311,6 +1311,8 @@ int etnaviv_gpu_submit(struct etnaviv_gpu *gpu,
goto out_pm_put; goto out_pm_put;
} }
mutex_lock(&gpu->lock);
fence = etnaviv_gpu_fence_alloc(gpu); fence = etnaviv_gpu_fence_alloc(gpu);
if (!fence) { if (!fence) {
event_free(gpu, event); event_free(gpu, event);
@ -1318,8 +1320,6 @@ int etnaviv_gpu_submit(struct etnaviv_gpu *gpu,
goto out_pm_put; goto out_pm_put;
} }
mutex_lock(&gpu->lock);
gpu->event[event].fence = fence; gpu->event[event].fence = fence;
submit->fence = fence->seqno; submit->fence = fence->seqno;
gpu->active_fence = submit->fence; gpu->active_fence = submit->fence;

View File

@ -495,7 +495,8 @@ void intel_gvt_i2c_handle_aux_ch_write(struct intel_vgpu *vgpu,
unsigned char val = edid_get_byte(vgpu); unsigned char val = edid_get_byte(vgpu);
aux_data_for_write = (val << 16); aux_data_for_write = (val << 16);
} } else
aux_data_for_write = (0xff << 16);
} }
/* write the return value in AUX_CH_DATA reg which includes: /* write the return value in AUX_CH_DATA reg which includes:
* ACK of I2C_WRITE * ACK of I2C_WRITE

View File

@ -1837,11 +1837,15 @@ static int emulate_gtt_mmio_write(struct intel_vgpu *vgpu, unsigned int off,
ret = gtt_entry_p2m(vgpu, &e, &m); ret = gtt_entry_p2m(vgpu, &e, &m);
if (ret) { if (ret) {
gvt_vgpu_err("fail to translate guest gtt entry\n"); gvt_vgpu_err("fail to translate guest gtt entry\n");
return ret; /* guest driver may read/write the entry when partial
* update the entry in this situation p2m will fail
* settting the shadow entry to point to a scratch page
*/
ops->set_pfn(&m, gvt->gtt.scratch_ggtt_mfn);
} }
} else { } else {
m = e; m = e;
m.val64 = 0; ops->set_pfn(&m, gvt->gtt.scratch_ggtt_mfn);
} }
ggtt_set_shadow_entry(ggtt_mm, &m, g_gtt_index); ggtt_set_shadow_entry(ggtt_mm, &m, g_gtt_index);

View File

@ -970,6 +970,14 @@ static int dp_aux_ch_ctl_mmio_write(struct intel_vgpu *vgpu,
return 0; return 0;
} }
static int mbctl_write(struct intel_vgpu *vgpu, unsigned int offset,
void *p_data, unsigned int bytes)
{
*(u32 *)p_data &= (~GEN6_MBCTL_ENABLE_BOOT_FETCH);
write_vreg(vgpu, offset, p_data, bytes);
return 0;
}
static int vga_control_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, static int vga_control_mmio_write(struct intel_vgpu *vgpu, unsigned int offset,
void *p_data, unsigned int bytes) void *p_data, unsigned int bytes)
{ {
@ -2238,7 +2246,7 @@ static int init_generic_mmio_info(struct intel_gvt *gvt)
MMIO_D(0x7180, D_ALL); MMIO_D(0x7180, D_ALL);
MMIO_D(0x7408, D_ALL); MMIO_D(0x7408, D_ALL);
MMIO_D(0x7c00, D_ALL); MMIO_D(0x7c00, D_ALL);
MMIO_D(GEN6_MBCTL, D_ALL); MMIO_DH(GEN6_MBCTL, D_ALL, NULL, mbctl_write);
MMIO_D(0x911c, D_ALL); MMIO_D(0x911c, D_ALL);
MMIO_D(0x9120, D_ALL); MMIO_D(0x9120, D_ALL);
MMIO_DFH(GEN7_UCGCTL4, D_ALL, F_CMD_ACCESS, NULL, NULL); MMIO_DFH(GEN7_UCGCTL4, D_ALL, F_CMD_ACCESS, NULL, NULL);

View File

@ -1326,6 +1326,7 @@ static int kvmgt_guest_init(struct mdev_device *mdev)
vgpu->handle = (unsigned long)info; vgpu->handle = (unsigned long)info;
info->vgpu = vgpu; info->vgpu = vgpu;
info->kvm = kvm; info->kvm = kvm;
kvm_get_kvm(info->kvm);
kvmgt_protect_table_init(info); kvmgt_protect_table_init(info);
gvt_cache_init(vgpu); gvt_cache_init(vgpu);
@ -1347,6 +1348,7 @@ static bool kvmgt_guest_exit(struct kvmgt_guest_info *info)
} }
kvm_page_track_unregister_notifier(info->kvm, &info->track_node); kvm_page_track_unregister_notifier(info->kvm, &info->track_node);
kvm_put_kvm(info->kvm);
kvmgt_protect_table_destroy(info); kvmgt_protect_table_destroy(info);
gvt_cache_destroy(info->vgpu); gvt_cache_destroy(info->vgpu);
vfree(info); vfree(info);

View File

@ -207,7 +207,7 @@ static void load_mocs(struct intel_vgpu *vgpu, int ring_id)
l3_offset.reg = 0xb020; l3_offset.reg = 0xb020;
for (i = 0; i < 32; i++) { for (i = 0; i < 32; i++) {
gen9_render_mocs_L3[i] = I915_READ(l3_offset); gen9_render_mocs_L3[i] = I915_READ(l3_offset);
I915_WRITE(l3_offset, vgpu_vreg(vgpu, offset)); I915_WRITE(l3_offset, vgpu_vreg(vgpu, l3_offset));
POSTING_READ(l3_offset); POSTING_READ(l3_offset);
l3_offset.reg += 4; l3_offset.reg += 4;
} }

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