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https://mirrors.bfsu.edu.cn/git/linux.git
synced 2024-11-11 12:28:41 +08:00
Merge branch 'for-3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata
Pull libata updates from Tejun Heo: "Overview of changes: - The rest of maintainer email address updates. - Some core updates - more robust default behavior for port multipliers, better error reporting for SG_IO commands, and a way to better work around now ancient and probably pretty rare PATA -> SATA bridges with ATAPI devices. - sata_rcar stabilization. - Some hardware PCI ID additions and one-off low level driver updates." * 'for-3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata: (22 commits) AHCI: use ATA_BUSY libata-zpodd: must use ata_tf_init() ahci: AHCI-mode SATA patch for Intel Coleto Creek DeviceIDs ata_piix: IDE-mode SATA patch for Intel Coleto Creek DeviceIDs libata: cleanup SAT error translation ahci: sata: add support for exynos5440 sata libata: skip SRST for all SIMG [34]7x port-multipliers ahci: remove pmp link online check in FBS EH sata highbank: add bit-banged SGPIO driver support ahci: make ahci_transmit_led_message into a function pointer sata_rcar: fix compilation warning in sata_rcar_thaw() sata_highbank: increase retry count but shorten duration for Calxeda controller ata: use pci_get_drvdata() ipr: qc_fill_rtf() method should not store alternate status register sata_rcar: add 'base' local variable to some functions sata_rcar: correct 'sata_rcar_sht' sata_rcar: kill superfluous code in sata_rcar_bmdma_fill_sg() libata: do not limit R-Car SATA driver to shmobile ata: use platform_{get,set}_drvdata() AHCI: Make distinct names for ports in /proc/interrupts ...
This commit is contained in:
commit
9e220385c4
@ -12,6 +12,11 @@ Optional properties:
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- calxeda,port-phys: phandle-combophy and lane assignment, which maps each
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SATA port to a combophy and a lane within that
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combophy
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- calxeda,sgpio-gpio: phandle-gpio bank, bit offset, and default on or off,
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which indicates that the driver supports SGPIO
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indicator lights using the indicated GPIOs
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- calxeda,led-order : a u32 array that map port numbers to offsets within the
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SGPIO bitstream.
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- dma-coherent : Present if dma operations are coherent
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Example:
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|
@ -1458,6 +1458,8 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
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* dump_id: dump IDENTIFY data.
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* atapi_dmadir: Enable ATAPI DMADIR bridge support
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If there are multiple matching configurations changing
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the same attribute, the last one is used.
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|
@ -33,6 +33,8 @@
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calxeda,port-phys = <&combophy5 0 &combophy0 0
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&combophy0 1 &combophy0 2
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&combophy0 3>;
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calxeda,sgpio-gpio =<&gpioh 5 1 &gpioh 6 1 &gpioh 7 1>;
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calxeda,led-order = <4 0 1 2 3>;
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};
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sdhci@ffe0e000 {
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@ -263,7 +263,6 @@ config SATA_PROMISE
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config SATA_RCAR
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tristate "Renesas R-Car SATA support"
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depends on ARCH_SHMOBILE && ARCH_R8A7779
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help
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This option enables support for Renesas R-Car Serial ATA.
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@ -128,7 +128,7 @@ static struct pci_driver acard_ahci_pci_driver = {
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#ifdef CONFIG_PM
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static int acard_ahci_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg)
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{
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struct ata_host *host = dev_get_drvdata(&pdev->dev);
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struct ata_host *host = pci_get_drvdata(pdev);
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struct ahci_host_priv *hpriv = host->private_data;
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void __iomem *mmio = hpriv->mmio;
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u32 ctl;
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@ -156,7 +156,7 @@ static int acard_ahci_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg
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static int acard_ahci_pci_device_resume(struct pci_dev *pdev)
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{
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struct ata_host *host = dev_get_drvdata(&pdev->dev);
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struct ata_host *host = pci_get_drvdata(pdev);
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int rc;
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rc = ata_pci_device_do_resume(pdev);
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@ -291,6 +291,7 @@ static const struct pci_device_id ahci_pci_tbl[] = {
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{ PCI_VDEVICE(INTEL, 0x8d64), board_ahci }, /* Wellsburg RAID */
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{ PCI_VDEVICE(INTEL, 0x8d66), board_ahci }, /* Wellsburg RAID */
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{ PCI_VDEVICE(INTEL, 0x8d6e), board_ahci }, /* Wellsburg RAID */
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{ PCI_VDEVICE(INTEL, 0x23a3), board_ahci }, /* Coleto Creek AHCI */
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/* JMicron 360/1/3/5/6, match class to avoid IDE function */
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{ PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
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@ -586,7 +587,7 @@ static int ahci_p5wdh_hardreset(struct ata_link *link, unsigned int *class,
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/* clear D2H reception area to properly wait for D2H FIS */
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ata_tf_init(link->device, &tf);
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tf.command = 0x80;
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tf.command = ATA_BUSY;
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ata_tf_to_fis(&tf, 0, 0, d2h_fis);
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rc = sata_link_hardreset(link, sata_ehc_deb_timing(&link->eh_context),
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@ -619,7 +620,7 @@ static int ahci_p5wdh_hardreset(struct ata_link *link, unsigned int *class,
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#ifdef CONFIG_PM
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static int ahci_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg)
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{
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struct ata_host *host = dev_get_drvdata(&pdev->dev);
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struct ata_host *host = pci_get_drvdata(pdev);
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struct ahci_host_priv *hpriv = host->private_data;
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void __iomem *mmio = hpriv->mmio;
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u32 ctl;
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@ -647,7 +648,7 @@ static int ahci_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg)
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static int ahci_pci_device_resume(struct pci_dev *pdev)
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{
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struct ata_host *host = dev_get_drvdata(&pdev->dev);
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struct ata_host *host = pci_get_drvdata(pdev);
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int rc;
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rc = ata_pci_device_do_resume(pdev);
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@ -1145,9 +1146,11 @@ int ahci_host_activate(struct ata_host *host, int irq, unsigned int n_msis)
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return rc;
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for (i = 0; i < host->n_ports; i++) {
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struct ahci_port_priv *pp = host->ports[i]->private_data;
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rc = devm_request_threaded_irq(host->dev,
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irq + i, ahci_hw_interrupt, ahci_thread_fn, IRQF_SHARED,
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dev_driver_string(host->dev), host->ports[i]);
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pp->irq_desc, host->ports[i]);
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if (rc)
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goto out_free_irqs;
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}
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|
@ -306,6 +306,7 @@ struct ahci_port_priv {
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int fbs_last_dev; /* save FBS.DEV of last FIS */
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/* enclosure management info per PM slot */
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struct ahci_em_priv em_priv[EM_MAX_SLOTS];
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char *irq_desc; /* desc in /proc/interrupts */
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};
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struct ahci_host_priv {
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@ -321,6 +322,7 @@ struct ahci_host_priv {
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u32 em_buf_sz; /* EM buffer size in byte */
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u32 em_msg_type; /* EM message type */
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struct clk *clk; /* Only for platforms supporting clk */
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void *plat_data; /* Other platform data */
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};
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extern int ahci_ignore_sss;
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@ -327,6 +327,7 @@ static SIMPLE_DEV_PM_OPS(ahci_pm_ops, ahci_suspend, ahci_resume);
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static const struct of_device_id ahci_of_match[] = {
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{ .compatible = "snps,spear-ahci", },
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{ .compatible = "snps,exynos5440-ahci", },
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{},
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};
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MODULE_DEVICE_TABLE(of, ahci_of_match);
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|
@ -338,6 +338,8 @@ static const struct pci_device_id piix_pci_tbl[] = {
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/* SATA Controller IDE (BayTrail) */
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{ 0x8086, 0x0F20, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata_byt },
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{ 0x8086, 0x0F21, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata_byt },
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/* SATA Controller IDE (Coleto Creek) */
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{ 0x8086, 0x23a6, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
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{ } /* terminate list */
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};
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@ -993,7 +995,7 @@ static int piix_broken_suspend(void)
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static int piix_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg)
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{
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struct ata_host *host = dev_get_drvdata(&pdev->dev);
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struct ata_host *host = pci_get_drvdata(pdev);
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unsigned long flags;
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int rc = 0;
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@ -1028,7 +1030,7 @@ static int piix_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg)
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static int piix_pci_device_resume(struct pci_dev *pdev)
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{
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struct ata_host *host = dev_get_drvdata(&pdev->dev);
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struct ata_host *host = pci_get_drvdata(pdev);
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unsigned long flags;
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int rc;
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@ -1751,7 +1753,7 @@ static int piix_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
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static void piix_remove_one(struct pci_dev *pdev)
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{
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struct ata_host *host = dev_get_drvdata(&pdev->dev);
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struct ata_host *host = pci_get_drvdata(pdev);
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struct piix_host_priv *hpriv = host->private_data;
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pci_write_config_dword(pdev, PIIX_IOCFG, hpriv->saved_iocfg);
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|
@ -173,6 +173,7 @@ struct ata_port_operations ahci_ops = {
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.em_store = ahci_led_store,
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.sw_activity_show = ahci_activity_show,
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.sw_activity_store = ahci_activity_store,
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.transmit_led_message = ahci_transmit_led_message,
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#ifdef CONFIG_PM
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.port_suspend = ahci_port_suspend,
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.port_resume = ahci_port_resume,
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@ -774,7 +775,7 @@ static void ahci_start_port(struct ata_port *ap)
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/* EM Transmit bit maybe busy during init */
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for (i = 0; i < EM_MAX_RETRY; i++) {
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rc = ahci_transmit_led_message(ap,
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rc = ap->ops->transmit_led_message(ap,
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emp->led_state,
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4);
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if (rc == -EBUSY)
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@ -915,7 +916,7 @@ static void ahci_sw_activity_blink(unsigned long arg)
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led_message |= (1 << 16);
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}
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spin_unlock_irqrestore(ap->lock, flags);
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ahci_transmit_led_message(ap, led_message, 4);
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ap->ops->transmit_led_message(ap, led_message, 4);
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}
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static void ahci_init_sw_activity(struct ata_link *link)
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@ -1044,7 +1045,7 @@ static ssize_t ahci_led_store(struct ata_port *ap, const char *buf,
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if (emp->blink_policy)
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state &= ~EM_MSG_LED_VALUE_ACTIVITY;
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return ahci_transmit_led_message(ap, state, size);
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return ap->ops->transmit_led_message(ap, state, size);
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}
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static ssize_t ahci_activity_store(struct ata_device *dev, enum sw_activity val)
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@ -1063,7 +1064,7 @@ static ssize_t ahci_activity_store(struct ata_device *dev, enum sw_activity val)
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/* set the LED to OFF */
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port_led_state &= EM_MSG_LED_VALUE_OFF;
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port_led_state |= (ap->port_no | (link->pmp << 8));
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ahci_transmit_led_message(ap, port_led_state, 4);
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ap->ops->transmit_led_message(ap, port_led_state, 4);
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} else {
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link->flags |= ATA_LFLAG_SW_ACTIVITY;
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if (val == BLINK_OFF) {
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@ -1071,7 +1072,7 @@ static ssize_t ahci_activity_store(struct ata_device *dev, enum sw_activity val)
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port_led_state &= EM_MSG_LED_VALUE_OFF;
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port_led_state |= (ap->port_no | (link->pmp << 8));
|
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port_led_state |= EM_MSG_LED_VALUE_ON; /* check this */
|
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ahci_transmit_led_message(ap, port_led_state, 4);
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ap->ops->transmit_led_message(ap, port_led_state, 4);
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}
|
||||
}
|
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emp->blink_policy = val;
|
||||
@ -1412,7 +1413,7 @@ static int ahci_hardreset(struct ata_link *link, unsigned int *class,
|
||||
|
||||
/* clear D2H reception area to properly wait for D2H FIS */
|
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ata_tf_init(link->device, &tf);
|
||||
tf.command = 0x80;
|
||||
tf.command = ATA_BUSY;
|
||||
ata_tf_to_fis(&tf, 0, 0, d2h_fis);
|
||||
|
||||
rc = sata_link_hardreset(link, timing, deadline, &online,
|
||||
@ -1560,8 +1561,7 @@ static void ahci_error_intr(struct ata_port *ap, u32 irq_stat)
|
||||
u32 fbs = readl(port_mmio + PORT_FBS);
|
||||
int pmp = fbs >> PORT_FBS_DWE_OFFSET;
|
||||
|
||||
if ((fbs & PORT_FBS_SDE) && (pmp < ap->nr_pmp_links) &&
|
||||
ata_link_online(&ap->pmp_link[pmp])) {
|
||||
if ((fbs & PORT_FBS_SDE) && (pmp < ap->nr_pmp_links)) {
|
||||
link = &ap->pmp_link[pmp];
|
||||
fbs_need_dec = true;
|
||||
}
|
||||
@ -2234,6 +2234,16 @@ static int ahci_port_start(struct ata_port *ap)
|
||||
if (!pp)
|
||||
return -ENOMEM;
|
||||
|
||||
if (ap->host->n_ports > 1) {
|
||||
pp->irq_desc = devm_kzalloc(dev, 8, GFP_KERNEL);
|
||||
if (!pp->irq_desc) {
|
||||
devm_kfree(dev, pp);
|
||||
return -ENOMEM;
|
||||
}
|
||||
snprintf(pp->irq_desc, 8,
|
||||
"%s%d", dev_driver_string(dev), ap->port_no);
|
||||
}
|
||||
|
||||
/* check FBS capability */
|
||||
if ((hpriv->cap & HOST_CAP_FBS) && sata_pmp_supported(ap)) {
|
||||
void __iomem *port_mmio = ahci_port_base(ap);
|
||||
|
@ -2401,7 +2401,7 @@ int ata_dev_configure(struct ata_device *dev)
|
||||
cdb_intr_string = ", CDB intr";
|
||||
}
|
||||
|
||||
if (atapi_dmadir || atapi_id_dmadir(dev->id)) {
|
||||
if (atapi_dmadir || (dev->horkage & ATA_HORKAGE_ATAPI_DMADIR) || atapi_id_dmadir(dev->id)) {
|
||||
dev->flags |= ATA_DFLAG_DMADIR;
|
||||
dma_dir_string = ", DMADIR";
|
||||
}
|
||||
@ -5642,6 +5642,7 @@ struct ata_port *ata_port_alloc(struct ata_host *host)
|
||||
ap->pflags |= ATA_PFLAG_INITIALIZING | ATA_PFLAG_FROZEN;
|
||||
ap->lock = &host->lock;
|
||||
ap->print_id = -1;
|
||||
ap->local_port_no = -1;
|
||||
ap->host = host;
|
||||
ap->dev = host->dev;
|
||||
|
||||
@ -6132,9 +6133,10 @@ int ata_host_register(struct ata_host *host, struct scsi_host_template *sht)
|
||||
kfree(host->ports[i]);
|
||||
|
||||
/* give ports names and add SCSI hosts */
|
||||
for (i = 0; i < host->n_ports; i++)
|
||||
for (i = 0; i < host->n_ports; i++) {
|
||||
host->ports[i]->print_id = atomic_inc_return(&ata_print_id);
|
||||
|
||||
host->ports[i]->local_port_no = i + 1;
|
||||
}
|
||||
|
||||
/* Create associated sysfs transport objects */
|
||||
for (i = 0; i < host->n_ports; i++) {
|
||||
@ -6502,6 +6504,7 @@ static int __init ata_parse_force_one(char **cur,
|
||||
{ "nosrst", .lflags = ATA_LFLAG_NO_SRST },
|
||||
{ "norst", .lflags = ATA_LFLAG_NO_HRST | ATA_LFLAG_NO_SRST },
|
||||
{ "rstonce", .lflags = ATA_LFLAG_RST_ONCE },
|
||||
{ "atapi_dmadir", .horkage_on = ATA_HORKAGE_ATAPI_DMADIR },
|
||||
};
|
||||
char *start = *cur, *p = *cur;
|
||||
char *id, *val, *endp;
|
||||
|
@ -389,9 +389,13 @@ static void sata_pmp_quirks(struct ata_port *ap)
|
||||
/* link reports offline after LPM */
|
||||
link->flags |= ATA_LFLAG_NO_LPM;
|
||||
|
||||
/* Class code report is unreliable. */
|
||||
/*
|
||||
* Class code report is unreliable and SRST times
|
||||
* out under certain configurations.
|
||||
*/
|
||||
if (link->pmp < 5)
|
||||
link->flags |= ATA_LFLAG_ASSUME_ATA;
|
||||
link->flags |= ATA_LFLAG_NO_SRST |
|
||||
ATA_LFLAG_ASSUME_ATA;
|
||||
|
||||
/* port 5 is for SEMB device and it doesn't like SRST */
|
||||
if (link->pmp == 5)
|
||||
@ -399,20 +403,17 @@ static void sata_pmp_quirks(struct ata_port *ap)
|
||||
ATA_LFLAG_ASSUME_SEMB;
|
||||
}
|
||||
} else if (vendor == 0x1095 && devid == 0x4723) {
|
||||
/* sil4723 quirks */
|
||||
ata_for_each_link(link, ap, EDGE) {
|
||||
/* link reports offline after LPM */
|
||||
link->flags |= ATA_LFLAG_NO_LPM;
|
||||
|
||||
/* class code report is unreliable */
|
||||
if (link->pmp < 2)
|
||||
link->flags |= ATA_LFLAG_ASSUME_ATA;
|
||||
|
||||
/* the config device at port 2 locks up on SRST */
|
||||
if (link->pmp == 2)
|
||||
link->flags |= ATA_LFLAG_NO_SRST |
|
||||
ATA_LFLAG_ASSUME_ATA;
|
||||
}
|
||||
/*
|
||||
* sil4723 quirks
|
||||
*
|
||||
* Link reports offline after LPM. Class code report is
|
||||
* unreliable. SIMG PMPs never got SRST reliable and the
|
||||
* config device at port 2 locks up on SRST.
|
||||
*/
|
||||
ata_for_each_link(link, ap, EDGE)
|
||||
link->flags |= ATA_LFLAG_NO_LPM |
|
||||
ATA_LFLAG_NO_SRST |
|
||||
ATA_LFLAG_ASSUME_ATA;
|
||||
} else if (vendor == 0x1095 && devid == 0x4726) {
|
||||
/* sil4726 quirks */
|
||||
ata_for_each_link(link, ap, EDGE) {
|
||||
|
@ -849,25 +849,24 @@ static void ata_to_sense_error(unsigned id, u8 drv_stat, u8 drv_err, u8 *sk,
|
||||
/* Bad address mark */
|
||||
{0x01, MEDIUM_ERROR, 0x13, 0x00}, // Address mark not found Address mark not found for data field
|
||||
/* TRK0 */
|
||||
{0x02, HARDWARE_ERROR, 0x00, 0x00}, // Track 0 not found Hardware error
|
||||
/* Abort & !ICRC */
|
||||
{0x04, ABORTED_COMMAND, 0x00, 0x00}, // Aborted command Aborted command
|
||||
{0x02, HARDWARE_ERROR, 0x00, 0x00}, // Track 0 not found Hardware error
|
||||
/* Abort: 0x04 is not translated here, see below */
|
||||
/* Media change request */
|
||||
{0x08, NOT_READY, 0x04, 0x00}, // Media change request FIXME: faking offline
|
||||
/* SRV */
|
||||
{0x10, ABORTED_COMMAND, 0x14, 0x00}, // ID not found Recorded entity not found
|
||||
/* Media change */
|
||||
{0x08, NOT_READY, 0x04, 0x00}, // Media change FIXME: faking offline
|
||||
/* SRV/IDNF */
|
||||
{0x10, ILLEGAL_REQUEST, 0x21, 0x00}, // ID not found Logical address out of range
|
||||
/* MC */
|
||||
{0x20, UNIT_ATTENTION, 0x28, 0x00}, // Media Changed Not ready to ready change, medium may have changed
|
||||
/* ECC */
|
||||
{0x40, MEDIUM_ERROR, 0x11, 0x04}, // Uncorrectable ECC error Unrecovered read error
|
||||
/* BBD - block marked bad */
|
||||
{0x80, MEDIUM_ERROR, 0x11, 0x04}, // Block marked bad Medium error, unrecovered read error
|
||||
{0x80, MEDIUM_ERROR, 0x11, 0x04}, // Block marked bad Medium error, unrecovered read error
|
||||
{0xFF, 0xFF, 0xFF, 0xFF}, // END mark
|
||||
};
|
||||
static const unsigned char stat_table[][4] = {
|
||||
/* Must be first because BUSY means no other bits valid */
|
||||
{0x80, ABORTED_COMMAND, 0x47, 0x00}, // Busy, fake parity for now
|
||||
{0x20, HARDWARE_ERROR, 0x00, 0x00}, // Device fault
|
||||
{0x20, HARDWARE_ERROR, 0x44, 0x00}, // Device fault, internal target failure
|
||||
{0x08, ABORTED_COMMAND, 0x47, 0x00}, // Timed out in xfer, fake parity for now
|
||||
{0x04, RECOVERED_ERROR, 0x11, 0x00}, // Recovered ECC error Medium error, recovered
|
||||
{0xFF, 0xFF, 0xFF, 0xFF}, // END mark
|
||||
@ -892,13 +891,13 @@ static void ata_to_sense_error(unsigned id, u8 drv_stat, u8 drv_err, u8 *sk,
|
||||
goto translate_done;
|
||||
}
|
||||
}
|
||||
/* No immediate match */
|
||||
if (verbose)
|
||||
printk(KERN_WARNING "ata%u: no sense translation for "
|
||||
"error 0x%02x\n", id, drv_err);
|
||||
}
|
||||
|
||||
/* Fall back to interpreting status bits */
|
||||
/*
|
||||
* Fall back to interpreting status bits. Note that if the drv_err
|
||||
* has only the ABRT bit set, we decode drv_stat. ABRT by itself
|
||||
* is not descriptive enough.
|
||||
*/
|
||||
for (i = 0; stat_table[i][0] != 0xFF; i++) {
|
||||
if (stat_table[i][0] & drv_stat) {
|
||||
*sk = stat_table[i][1];
|
||||
@ -907,13 +906,11 @@ static void ata_to_sense_error(unsigned id, u8 drv_stat, u8 drv_err, u8 *sk,
|
||||
goto translate_done;
|
||||
}
|
||||
}
|
||||
/* No error? Undecoded? */
|
||||
if (verbose)
|
||||
printk(KERN_WARNING "ata%u: no sense translation for "
|
||||
"status: 0x%02x\n", id, drv_stat);
|
||||
|
||||
/* We need a sensible error return here, which is tricky, and one
|
||||
that won't cause people to do things like return a disk wrongly */
|
||||
/*
|
||||
* We need a sensible error return here, which is tricky, and one
|
||||
* that won't cause people to do things like return a disk wrongly.
|
||||
*/
|
||||
*sk = ABORTED_COMMAND;
|
||||
*asc = 0x00;
|
||||
*ascq = 0x00;
|
||||
|
@ -37,7 +37,7 @@
|
||||
#include "libata.h"
|
||||
#include "libata-transport.h"
|
||||
|
||||
#define ATA_PORT_ATTRS 2
|
||||
#define ATA_PORT_ATTRS 3
|
||||
#define ATA_LINK_ATTRS 3
|
||||
#define ATA_DEV_ATTRS 9
|
||||
|
||||
@ -216,6 +216,7 @@ static DEVICE_ATTR(name, S_IRUGO, show_ata_port_##name, NULL)
|
||||
|
||||
ata_port_simple_attr(nr_pmp_links, nr_pmp_links, "%d\n", int);
|
||||
ata_port_simple_attr(stats.idle_irq, idle_irq, "%ld\n", unsigned long);
|
||||
ata_port_simple_attr(local_port_no, port_no, "%u\n", unsigned int);
|
||||
|
||||
static DECLARE_TRANSPORT_CLASS(ata_port_class,
|
||||
"ata_port", NULL, NULL, NULL);
|
||||
@ -709,6 +710,7 @@ struct scsi_transport_template *ata_attach_transport(void)
|
||||
count = 0;
|
||||
SETUP_PORT_ATTRIBUTE(nr_pmp_links);
|
||||
SETUP_PORT_ATTRIBUTE(idle_irq);
|
||||
SETUP_PORT_ATTRIBUTE(port_no);
|
||||
BUG_ON(count > ATA_PORT_ATTRS);
|
||||
i->port_attrs[count] = NULL;
|
||||
|
||||
|
@ -32,13 +32,14 @@ struct zpodd {
|
||||
|
||||
static int eject_tray(struct ata_device *dev)
|
||||
{
|
||||
struct ata_taskfile tf = {};
|
||||
struct ata_taskfile tf;
|
||||
const char cdb[] = { GPCMD_START_STOP_UNIT,
|
||||
0, 0, 0,
|
||||
0x02, /* LoEj */
|
||||
0, 0, 0, 0, 0, 0, 0,
|
||||
};
|
||||
|
||||
ata_tf_init(dev, &tf);
|
||||
tf.flags = ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
|
||||
tf.command = ATA_CMD_PACKET;
|
||||
tf.protocol = ATAPI_PROT_NODATA;
|
||||
@ -52,8 +53,7 @@ static enum odd_mech_type zpodd_get_mech_type(struct ata_device *dev)
|
||||
char buf[16];
|
||||
unsigned int ret;
|
||||
struct rm_feature_desc *desc = (void *)(buf + 8);
|
||||
struct ata_taskfile tf = {};
|
||||
|
||||
struct ata_taskfile tf;
|
||||
char cdb[] = { GPCMD_GET_CONFIGURATION,
|
||||
2, /* only 1 feature descriptor requested */
|
||||
0, 3, /* 3, removable medium feature */
|
||||
@ -62,6 +62,7 @@ static enum odd_mech_type zpodd_get_mech_type(struct ata_device *dev)
|
||||
0, 0, 0,
|
||||
};
|
||||
|
||||
ata_tf_init(dev, &tf);
|
||||
tf.flags = ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
|
||||
tf.command = ATA_CMD_PACKET;
|
||||
tf.protocol = ATAPI_PROT_PIO;
|
||||
|
@ -592,7 +592,7 @@ static int ali_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
|
||||
#ifdef CONFIG_PM
|
||||
static int ali_reinit_one(struct pci_dev *pdev)
|
||||
{
|
||||
struct ata_host *host = dev_get_drvdata(&pdev->dev);
|
||||
struct ata_host *host = pci_get_drvdata(pdev);
|
||||
int rc;
|
||||
|
||||
rc = ata_pci_device_do_resume(pdev);
|
||||
|
@ -578,7 +578,7 @@ static int amd_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
|
||||
#ifdef CONFIG_PM
|
||||
static int amd_reinit_one(struct pci_dev *pdev)
|
||||
{
|
||||
struct ata_host *host = dev_get_drvdata(&pdev->dev);
|
||||
struct ata_host *host = pci_get_drvdata(pdev);
|
||||
int rc;
|
||||
|
||||
rc = ata_pci_device_do_resume(pdev);
|
||||
|
@ -908,7 +908,7 @@ free_clk:
|
||||
|
||||
static int arasan_cf_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct ata_host *host = dev_get_drvdata(&pdev->dev);
|
||||
struct ata_host *host = platform_get_drvdata(pdev);
|
||||
struct arasan_cf_dev *acdev = host->ports[0]->private_data;
|
||||
|
||||
ata_host_detach(host);
|
||||
|
@ -426,7 +426,7 @@ static const struct pci_device_id artop_pci_tbl[] = {
|
||||
#ifdef CONFIG_PM
|
||||
static int atp8xx_reinit_one(struct pci_dev *pdev)
|
||||
{
|
||||
struct ata_host *host = dev_get_drvdata(&pdev->dev);
|
||||
struct ata_host *host = pci_get_drvdata(pdev);
|
||||
int rc;
|
||||
|
||||
rc = ata_pci_device_do_resume(pdev);
|
||||
|
@ -422,7 +422,7 @@ err_put:
|
||||
|
||||
static int pata_at91_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct ata_host *host = dev_get_drvdata(&pdev->dev);
|
||||
struct ata_host *host = platform_get_drvdata(pdev);
|
||||
struct at91_ide_info *info;
|
||||
|
||||
if (!host)
|
||||
|
@ -534,7 +534,7 @@ err_out:
|
||||
#ifdef CONFIG_PM
|
||||
static int atp867x_reinit_one(struct pci_dev *pdev)
|
||||
{
|
||||
struct ata_host *host = dev_get_drvdata(&pdev->dev);
|
||||
struct ata_host *host = pci_get_drvdata(pdev);
|
||||
int rc;
|
||||
|
||||
rc = ata_pci_device_do_resume(pdev);
|
||||
|
@ -1596,7 +1596,7 @@ static int bfin_atapi_probe(struct platform_device *pdev)
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
dev_set_drvdata(&pdev->dev, host);
|
||||
platform_set_drvdata(pdev, host);
|
||||
|
||||
return 0;
|
||||
}
|
||||
@ -1610,11 +1610,9 @@ static int bfin_atapi_probe(struct platform_device *pdev)
|
||||
*/
|
||||
static int bfin_atapi_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct device *dev = &pdev->dev;
|
||||
struct ata_host *host = dev_get_drvdata(dev);
|
||||
struct ata_host *host = platform_get_drvdata(pdev);
|
||||
|
||||
ata_host_detach(host);
|
||||
dev_set_drvdata(&pdev->dev, NULL);
|
||||
|
||||
peripheral_free_list(atapi_io_port);
|
||||
|
||||
@ -1624,7 +1622,7 @@ static int bfin_atapi_remove(struct platform_device *pdev)
|
||||
#ifdef CONFIG_PM
|
||||
static int bfin_atapi_suspend(struct platform_device *pdev, pm_message_t state)
|
||||
{
|
||||
struct ata_host *host = dev_get_drvdata(&pdev->dev);
|
||||
struct ata_host *host = platform_get_drvdata(pdev);
|
||||
if (host)
|
||||
return ata_host_suspend(host, state);
|
||||
else
|
||||
@ -1633,7 +1631,7 @@ static int bfin_atapi_suspend(struct platform_device *pdev, pm_message_t state)
|
||||
|
||||
static int bfin_atapi_resume(struct platform_device *pdev)
|
||||
{
|
||||
struct ata_host *host = dev_get_drvdata(&pdev->dev);
|
||||
struct ata_host *host = platform_get_drvdata(pdev);
|
||||
int ret;
|
||||
|
||||
if (host) {
|
||||
|
@ -235,7 +235,7 @@ static int cmd640_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
|
||||
#ifdef CONFIG_PM
|
||||
static int cmd640_reinit_one(struct pci_dev *pdev)
|
||||
{
|
||||
struct ata_host *host = dev_get_drvdata(&pdev->dev);
|
||||
struct ata_host *host = pci_get_drvdata(pdev);
|
||||
int rc;
|
||||
|
||||
rc = ata_pci_device_do_resume(pdev);
|
||||
|
@ -491,7 +491,7 @@ static int cmd64x_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
|
||||
#ifdef CONFIG_PM
|
||||
static int cmd64x_reinit_one(struct pci_dev *pdev)
|
||||
{
|
||||
struct ata_host *host = dev_get_drvdata(&pdev->dev);
|
||||
struct ata_host *host = pci_get_drvdata(pdev);
|
||||
int rc;
|
||||
|
||||
rc = ata_pci_device_do_resume(pdev);
|
||||
|
@ -241,7 +241,7 @@ static int cs5520_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
|
||||
|
||||
static int cs5520_reinit_one(struct pci_dev *pdev)
|
||||
{
|
||||
struct ata_host *host = dev_get_drvdata(&pdev->dev);
|
||||
struct ata_host *host = pci_get_drvdata(pdev);
|
||||
u8 pcicfg;
|
||||
int rc;
|
||||
|
||||
@ -269,7 +269,7 @@ static int cs5520_reinit_one(struct pci_dev *pdev)
|
||||
|
||||
static int cs5520_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg)
|
||||
{
|
||||
struct ata_host *host = dev_get_drvdata(&pdev->dev);
|
||||
struct ata_host *host = pci_get_drvdata(pdev);
|
||||
int rc = 0;
|
||||
|
||||
rc = ata_host_suspend(host, mesg);
|
||||
|
@ -330,7 +330,7 @@ static int cs5530_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
|
||||
#ifdef CONFIG_PM
|
||||
static int cs5530_reinit_one(struct pci_dev *pdev)
|
||||
{
|
||||
struct ata_host *host = dev_get_drvdata(&pdev->dev);
|
||||
struct ata_host *host = pci_get_drvdata(pdev);
|
||||
int rc;
|
||||
|
||||
rc = ata_pci_device_do_resume(pdev);
|
||||
|
@ -390,7 +390,7 @@ static int hpt36x_init_one(struct pci_dev *dev, const struct pci_device_id *id)
|
||||
#ifdef CONFIG_PM
|
||||
static int hpt36x_reinit_one(struct pci_dev *dev)
|
||||
{
|
||||
struct ata_host *host = dev_get_drvdata(&dev->dev);
|
||||
struct ata_host *host = pci_get_drvdata(dev);
|
||||
int rc;
|
||||
|
||||
rc = ata_pci_device_do_resume(dev);
|
||||
|
@ -253,7 +253,7 @@ static int hpt3x3_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
|
||||
#ifdef CONFIG_PM
|
||||
static int hpt3x3_reinit_one(struct pci_dev *dev)
|
||||
{
|
||||
struct ata_host *host = dev_get_drvdata(&dev->dev);
|
||||
struct ata_host *host = pci_get_drvdata(dev);
|
||||
int rc;
|
||||
|
||||
rc = ata_pci_device_do_resume(dev);
|
||||
|
@ -177,7 +177,7 @@ err:
|
||||
|
||||
static int pata_imx_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct ata_host *host = dev_get_drvdata(&pdev->dev);
|
||||
struct ata_host *host = platform_get_drvdata(pdev);
|
||||
struct pata_imx_priv *priv = host->private_data;
|
||||
|
||||
ata_host_detach(host);
|
||||
|
@ -939,7 +939,7 @@ static int it821x_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
|
||||
#ifdef CONFIG_PM
|
||||
static int it821x_reinit_one(struct pci_dev *pdev)
|
||||
{
|
||||
struct ata_host *host = dev_get_drvdata(&pdev->dev);
|
||||
struct ata_host *host = pci_get_drvdata(pdev);
|
||||
int rc;
|
||||
|
||||
rc = ata_pci_device_do_resume(pdev);
|
||||
|
@ -1311,7 +1311,7 @@ static int pata_macio_pci_attach(struct pci_dev *pdev,
|
||||
|
||||
static void pata_macio_pci_detach(struct pci_dev *pdev)
|
||||
{
|
||||
struct ata_host *host = dev_get_drvdata(&pdev->dev);
|
||||
struct ata_host *host = pci_get_drvdata(pdev);
|
||||
|
||||
ata_host_detach(host);
|
||||
}
|
||||
@ -1320,14 +1320,14 @@ static void pata_macio_pci_detach(struct pci_dev *pdev)
|
||||
|
||||
static int pata_macio_pci_suspend(struct pci_dev *pdev, pm_message_t mesg)
|
||||
{
|
||||
struct ata_host *host = dev_get_drvdata(&pdev->dev);
|
||||
struct ata_host *host = pci_get_drvdata(pdev);
|
||||
|
||||
return pata_macio_do_suspend(host->private_data, mesg);
|
||||
}
|
||||
|
||||
static int pata_macio_pci_resume(struct pci_dev *pdev)
|
||||
{
|
||||
struct ata_host *host = dev_get_drvdata(&pdev->dev);
|
||||
struct ata_host *host = pci_get_drvdata(pdev);
|
||||
|
||||
return pata_macio_do_resume(host->private_data);
|
||||
}
|
||||
|
@ -825,7 +825,7 @@ mpc52xx_ata_remove(struct platform_device *op)
|
||||
static int
|
||||
mpc52xx_ata_suspend(struct platform_device *op, pm_message_t state)
|
||||
{
|
||||
struct ata_host *host = dev_get_drvdata(&op->dev);
|
||||
struct ata_host *host = platform_get_drvdata(op);
|
||||
|
||||
return ata_host_suspend(host, state);
|
||||
}
|
||||
@ -833,7 +833,7 @@ mpc52xx_ata_suspend(struct platform_device *op, pm_message_t state)
|
||||
static int
|
||||
mpc52xx_ata_resume(struct platform_device *op)
|
||||
{
|
||||
struct ata_host *host = dev_get_drvdata(&op->dev);
|
||||
struct ata_host *host = platform_get_drvdata(op);
|
||||
struct mpc52xx_ata_priv *priv = host->private_data;
|
||||
int rv;
|
||||
|
||||
|
@ -157,7 +157,7 @@ static int ninja32_init_one(struct pci_dev *dev, const struct pci_device_id *id)
|
||||
|
||||
static int ninja32_reinit_one(struct pci_dev *pdev)
|
||||
{
|
||||
struct ata_host *host = dev_get_drvdata(&pdev->dev);
|
||||
struct ata_host *host = pci_get_drvdata(pdev);
|
||||
int rc;
|
||||
|
||||
rc = ata_pci_device_do_resume(pdev);
|
||||
|
@ -389,7 +389,7 @@ static const struct pci_device_id ns87415_pci_tbl[] = {
|
||||
#ifdef CONFIG_PM
|
||||
static int ns87415_reinit_one(struct pci_dev *pdev)
|
||||
{
|
||||
struct ata_host *host = dev_get_drvdata(&pdev->dev);
|
||||
struct ata_host *host = pci_get_drvdata(pdev);
|
||||
int rc;
|
||||
|
||||
rc = ata_pci_device_do_resume(pdev);
|
||||
|
@ -765,7 +765,7 @@ static int pdc2027x_init_one(struct pci_dev *pdev,
|
||||
#ifdef CONFIG_PM
|
||||
static int pdc2027x_reinit_one(struct pci_dev *pdev)
|
||||
{
|
||||
struct ata_host *host = dev_get_drvdata(&pdev->dev);
|
||||
struct ata_host *host = pci_get_drvdata(pdev);
|
||||
unsigned int board_idx;
|
||||
int rc;
|
||||
|
||||
|
@ -371,7 +371,7 @@ static int pxa_ata_probe(struct platform_device *pdev)
|
||||
|
||||
static int pxa_ata_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct ata_host *host = dev_get_drvdata(&pdev->dev);
|
||||
struct ata_host *host = platform_get_drvdata(pdev);
|
||||
struct pata_pxa_data *data = host->ports[0]->private_data;
|
||||
|
||||
pxa_free_dma(data->dma_channel);
|
||||
|
@ -364,7 +364,7 @@ static int rdc_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
|
||||
|
||||
static void rdc_remove_one(struct pci_dev *pdev)
|
||||
{
|
||||
struct ata_host *host = dev_get_drvdata(&pdev->dev);
|
||||
struct ata_host *host = pci_get_drvdata(pdev);
|
||||
struct rdc_host_priv *hpriv = host->private_data;
|
||||
|
||||
pci_write_config_dword(pdev, 0x54, hpriv->saved_iocfg);
|
||||
|
@ -105,7 +105,7 @@ static int rz1000_init_one (struct pci_dev *pdev, const struct pci_device_id *en
|
||||
#ifdef CONFIG_PM
|
||||
static int rz1000_reinit_one(struct pci_dev *pdev)
|
||||
{
|
||||
struct ata_host *host = dev_get_drvdata(&pdev->dev);
|
||||
struct ata_host *host = pci_get_drvdata(pdev);
|
||||
int rc;
|
||||
|
||||
rc = ata_pci_device_do_resume(pdev);
|
||||
|
@ -440,7 +440,7 @@ static int serverworks_init_one(struct pci_dev *pdev, const struct pci_device_id
|
||||
#ifdef CONFIG_PM
|
||||
static int serverworks_reinit_one(struct pci_dev *pdev)
|
||||
{
|
||||
struct ata_host *host = dev_get_drvdata(&pdev->dev);
|
||||
struct ata_host *host = pci_get_drvdata(pdev);
|
||||
int rc;
|
||||
|
||||
rc = ata_pci_device_do_resume(pdev);
|
||||
|
@ -407,7 +407,7 @@ use_ioports:
|
||||
#ifdef CONFIG_PM
|
||||
static int sil680_reinit_one(struct pci_dev *pdev)
|
||||
{
|
||||
struct ata_host *host = dev_get_drvdata(&pdev->dev);
|
||||
struct ata_host *host = pci_get_drvdata(pdev);
|
||||
int try_mmio, rc;
|
||||
|
||||
rc = ata_pci_device_do_resume(pdev);
|
||||
|
@ -873,7 +873,7 @@ static int sis_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
|
||||
#ifdef CONFIG_PM
|
||||
static int sis_reinit_one(struct pci_dev *pdev)
|
||||
{
|
||||
struct ata_host *host = dev_get_drvdata(&pdev->dev);
|
||||
struct ata_host *host = pci_get_drvdata(pdev);
|
||||
int rc;
|
||||
|
||||
rc = ata_pci_device_do_resume(pdev);
|
||||
|
@ -341,7 +341,7 @@ static int sl82c105_init_one(struct pci_dev *dev, const struct pci_device_id *id
|
||||
#ifdef CONFIG_PM
|
||||
static int sl82c105_reinit_one(struct pci_dev *pdev)
|
||||
{
|
||||
struct ata_host *host = dev_get_drvdata(&pdev->dev);
|
||||
struct ata_host *host = pci_get_drvdata(pdev);
|
||||
int rc;
|
||||
|
||||
rc = ata_pci_device_do_resume(pdev);
|
||||
|
@ -211,7 +211,7 @@ static const struct pci_device_id triflex[] = {
|
||||
#ifdef CONFIG_PM
|
||||
static int triflex_ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg)
|
||||
{
|
||||
struct ata_host *host = dev_get_drvdata(&pdev->dev);
|
||||
struct ata_host *host = pci_get_drvdata(pdev);
|
||||
int rc = 0;
|
||||
|
||||
rc = ata_host_suspend(host, mesg);
|
||||
|
@ -673,7 +673,7 @@ static int via_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
|
||||
|
||||
static int via_reinit_one(struct pci_dev *pdev)
|
||||
{
|
||||
struct ata_host *host = dev_get_drvdata(&pdev->dev);
|
||||
struct ata_host *host = pci_get_drvdata(pdev);
|
||||
int rc;
|
||||
|
||||
rc = ata_pci_device_do_resume(pdev);
|
||||
|
@ -1532,7 +1532,7 @@ static int sata_fsl_probe(struct platform_device *ofdev)
|
||||
ata_host_activate(host, irq, sata_fsl_interrupt, SATA_FSL_IRQ_FLAG,
|
||||
&sata_fsl_sht);
|
||||
|
||||
dev_set_drvdata(&ofdev->dev, host);
|
||||
platform_set_drvdata(ofdev, host);
|
||||
|
||||
host_priv->intr_coalescing.show = fsl_sata_intr_coalescing_show;
|
||||
host_priv->intr_coalescing.store = fsl_sata_intr_coalescing_store;
|
||||
@ -1558,10 +1558,8 @@ static int sata_fsl_probe(struct platform_device *ofdev)
|
||||
|
||||
error_exit_with_cleanup:
|
||||
|
||||
if (host) {
|
||||
dev_set_drvdata(&ofdev->dev, NULL);
|
||||
if (host)
|
||||
ata_host_detach(host);
|
||||
}
|
||||
|
||||
if (hcr_base)
|
||||
iounmap(hcr_base);
|
||||
@ -1572,7 +1570,7 @@ error_exit_with_cleanup:
|
||||
|
||||
static int sata_fsl_remove(struct platform_device *ofdev)
|
||||
{
|
||||
struct ata_host *host = dev_get_drvdata(&ofdev->dev);
|
||||
struct ata_host *host = platform_get_drvdata(ofdev);
|
||||
struct sata_fsl_host_priv *host_priv = host->private_data;
|
||||
|
||||
device_remove_file(&ofdev->dev, &host_priv->intr_coalescing);
|
||||
@ -1580,8 +1578,6 @@ static int sata_fsl_remove(struct platform_device *ofdev)
|
||||
|
||||
ata_host_detach(host);
|
||||
|
||||
dev_set_drvdata(&ofdev->dev, NULL);
|
||||
|
||||
irq_dispose_mapping(host_priv->irq);
|
||||
iounmap(host_priv->hcr_base);
|
||||
kfree(host_priv);
|
||||
@ -1592,13 +1588,13 @@ static int sata_fsl_remove(struct platform_device *ofdev)
|
||||
#ifdef CONFIG_PM
|
||||
static int sata_fsl_suspend(struct platform_device *op, pm_message_t state)
|
||||
{
|
||||
struct ata_host *host = dev_get_drvdata(&op->dev);
|
||||
struct ata_host *host = platform_get_drvdata(op);
|
||||
return ata_host_suspend(host, state);
|
||||
}
|
||||
|
||||
static int sata_fsl_resume(struct platform_device *op)
|
||||
{
|
||||
struct ata_host *host = dev_get_drvdata(&op->dev);
|
||||
struct ata_host *host = platform_get_drvdata(op);
|
||||
struct sata_fsl_host_priv *host_priv = host->private_data;
|
||||
int ret;
|
||||
void __iomem *hcr_base = host_priv->hcr_base;
|
||||
|
@ -33,6 +33,9 @@
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/export.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/of_gpio.h>
|
||||
|
||||
#include "ahci.h"
|
||||
|
||||
#define CPHY_MAP(dev, addr) ((((dev) & 0x1f) << 7) | (((addr) >> 9) & 0x7f))
|
||||
@ -66,6 +69,146 @@ struct phy_lane_info {
|
||||
};
|
||||
static struct phy_lane_info port_data[CPHY_PORT_COUNT];
|
||||
|
||||
static DEFINE_SPINLOCK(sgpio_lock);
|
||||
#define SCLOCK 0
|
||||
#define SLOAD 1
|
||||
#define SDATA 2
|
||||
#define SGPIO_PINS 3
|
||||
#define SGPIO_PORTS 8
|
||||
|
||||
/* can be cast as an ahci_host_priv for compatibility with most functions */
|
||||
struct ecx_plat_data {
|
||||
u32 n_ports;
|
||||
unsigned sgpio_gpio[SGPIO_PINS];
|
||||
u32 sgpio_pattern;
|
||||
u32 port_to_sgpio[SGPIO_PORTS];
|
||||
};
|
||||
|
||||
#define SGPIO_SIGNALS 3
|
||||
#define ECX_ACTIVITY_BITS 0x300000
|
||||
#define ECX_ACTIVITY_SHIFT 2
|
||||
#define ECX_LOCATE_BITS 0x80000
|
||||
#define ECX_LOCATE_SHIFT 1
|
||||
#define ECX_FAULT_BITS 0x400000
|
||||
#define ECX_FAULT_SHIFT 0
|
||||
static inline int sgpio_bit_shift(struct ecx_plat_data *pdata, u32 port,
|
||||
u32 shift)
|
||||
{
|
||||
return 1 << (3 * pdata->port_to_sgpio[port] + shift);
|
||||
}
|
||||
|
||||
static void ecx_parse_sgpio(struct ecx_plat_data *pdata, u32 port, u32 state)
|
||||
{
|
||||
if (state & ECX_ACTIVITY_BITS)
|
||||
pdata->sgpio_pattern |= sgpio_bit_shift(pdata, port,
|
||||
ECX_ACTIVITY_SHIFT);
|
||||
else
|
||||
pdata->sgpio_pattern &= ~sgpio_bit_shift(pdata, port,
|
||||
ECX_ACTIVITY_SHIFT);
|
||||
if (state & ECX_LOCATE_BITS)
|
||||
pdata->sgpio_pattern |= sgpio_bit_shift(pdata, port,
|
||||
ECX_LOCATE_SHIFT);
|
||||
else
|
||||
pdata->sgpio_pattern &= ~sgpio_bit_shift(pdata, port,
|
||||
ECX_LOCATE_SHIFT);
|
||||
if (state & ECX_FAULT_BITS)
|
||||
pdata->sgpio_pattern |= sgpio_bit_shift(pdata, port,
|
||||
ECX_FAULT_SHIFT);
|
||||
else
|
||||
pdata->sgpio_pattern &= ~sgpio_bit_shift(pdata, port,
|
||||
ECX_FAULT_SHIFT);
|
||||
}
|
||||
|
||||
/*
|
||||
* Tell the LED controller that the signal has changed by raising the clock
|
||||
* line for 50 uS and then lowering it for 50 uS.
|
||||
*/
|
||||
static void ecx_led_cycle_clock(struct ecx_plat_data *pdata)
|
||||
{
|
||||
gpio_set_value(pdata->sgpio_gpio[SCLOCK], 1);
|
||||
udelay(50);
|
||||
gpio_set_value(pdata->sgpio_gpio[SCLOCK], 0);
|
||||
udelay(50);
|
||||
}
|
||||
|
||||
static ssize_t ecx_transmit_led_message(struct ata_port *ap, u32 state,
|
||||
ssize_t size)
|
||||
{
|
||||
struct ahci_host_priv *hpriv = ap->host->private_data;
|
||||
struct ecx_plat_data *pdata = (struct ecx_plat_data *) hpriv->plat_data;
|
||||
struct ahci_port_priv *pp = ap->private_data;
|
||||
unsigned long flags;
|
||||
int pmp, i;
|
||||
struct ahci_em_priv *emp;
|
||||
u32 sgpio_out;
|
||||
|
||||
/* get the slot number from the message */
|
||||
pmp = (state & EM_MSG_LED_PMP_SLOT) >> 8;
|
||||
if (pmp < EM_MAX_SLOTS)
|
||||
emp = &pp->em_priv[pmp];
|
||||
else
|
||||
return -EINVAL;
|
||||
|
||||
if (!(hpriv->em_msg_type & EM_MSG_TYPE_LED))
|
||||
return size;
|
||||
|
||||
spin_lock_irqsave(&sgpio_lock, flags);
|
||||
ecx_parse_sgpio(pdata, ap->port_no, state);
|
||||
sgpio_out = pdata->sgpio_pattern;
|
||||
gpio_set_value(pdata->sgpio_gpio[SLOAD], 1);
|
||||
ecx_led_cycle_clock(pdata);
|
||||
gpio_set_value(pdata->sgpio_gpio[SLOAD], 0);
|
||||
/*
|
||||
* bit-bang out the SGPIO pattern, by consuming a bit and then
|
||||
* clocking it out.
|
||||
*/
|
||||
for (i = 0; i < (SGPIO_SIGNALS * pdata->n_ports); i++) {
|
||||
gpio_set_value(pdata->sgpio_gpio[SDATA], sgpio_out & 1);
|
||||
sgpio_out >>= 1;
|
||||
ecx_led_cycle_clock(pdata);
|
||||
}
|
||||
|
||||
/* save off new led state for port/slot */
|
||||
emp->led_state = state;
|
||||
|
||||
spin_unlock_irqrestore(&sgpio_lock, flags);
|
||||
return size;
|
||||
}
|
||||
|
||||
static void highbank_set_em_messages(struct device *dev,
|
||||
struct ahci_host_priv *hpriv,
|
||||
struct ata_port_info *pi)
|
||||
{
|
||||
struct device_node *np = dev->of_node;
|
||||
struct ecx_plat_data *pdata = hpriv->plat_data;
|
||||
int i;
|
||||
int err;
|
||||
|
||||
for (i = 0; i < SGPIO_PINS; i++) {
|
||||
err = of_get_named_gpio(np, "calxeda,sgpio-gpio", i);
|
||||
if (IS_ERR_VALUE(err))
|
||||
return;
|
||||
|
||||
pdata->sgpio_gpio[i] = err;
|
||||
err = gpio_request(pdata->sgpio_gpio[i], "CX SGPIO");
|
||||
if (err) {
|
||||
pr_err("sata_highbank gpio_request %d failed: %d\n",
|
||||
i, err);
|
||||
return;
|
||||
}
|
||||
gpio_direction_output(pdata->sgpio_gpio[i], 1);
|
||||
}
|
||||
of_property_read_u32_array(np, "calxeda,led-order",
|
||||
pdata->port_to_sgpio,
|
||||
pdata->n_ports);
|
||||
|
||||
/* store em_loc */
|
||||
hpriv->em_loc = 0;
|
||||
hpriv->em_buf_sz = 4;
|
||||
hpriv->em_msg_type = EM_MSG_TYPE_LED;
|
||||
pi->flags |= ATA_FLAG_EM | ATA_FLAG_SW_ACTIVITY;
|
||||
}
|
||||
|
||||
static u32 __combo_phy_reg_read(u8 sata_port, u32 addr)
|
||||
{
|
||||
u32 data;
|
||||
@ -196,10 +339,26 @@ static int highbank_initialize_phys(struct device *dev, void __iomem *addr)
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* The Calxeda SATA phy intermittently fails to bring up a link with Gen3
|
||||
* Retrying the phy hard reset can work around the issue, but the drive
|
||||
* may fail again. In less than 150 out of 15000 test runs, it took more
|
||||
* than 10 tries for the link to be established (but never more than 35).
|
||||
* Triple the maximum observed retry count to provide plenty of margin for
|
||||
* rare events and to guarantee that the link is established.
|
||||
*
|
||||
* Also, the default 2 second time-out on a failed drive is too long in
|
||||
* this situation. The uboot implementation of the same driver function
|
||||
* uses a much shorter time-out period and never experiences a time out
|
||||
* issue. Reducing the time-out to 500ms improves the responsiveness.
|
||||
* The other timing constants were kept the same as the stock AHCI driver.
|
||||
* This change was also tested 15000 times on 24 drives and none of them
|
||||
* experienced a time out.
|
||||
*/
|
||||
static int ahci_highbank_hardreset(struct ata_link *link, unsigned int *class,
|
||||
unsigned long deadline)
|
||||
{
|
||||
const unsigned long *timing = sata_ehc_deb_timing(&link->eh_context);
|
||||
static const unsigned long timing[] = { 5, 100, 500};
|
||||
struct ata_port *ap = link->ap;
|
||||
struct ahci_port_priv *pp = ap->private_data;
|
||||
u8 *d2h_fis = pp->rx_fis + RX_FIS_D2H_REG;
|
||||
@ -207,7 +366,7 @@ static int ahci_highbank_hardreset(struct ata_link *link, unsigned int *class,
|
||||
bool online;
|
||||
u32 sstatus;
|
||||
int rc;
|
||||
int retry = 10;
|
||||
int retry = 100;
|
||||
|
||||
ahci_stop_engine(ap);
|
||||
|
||||
@ -241,6 +400,7 @@ static int ahci_highbank_hardreset(struct ata_link *link, unsigned int *class,
|
||||
static struct ata_port_operations ahci_highbank_ops = {
|
||||
.inherits = &ahci_ops,
|
||||
.hardreset = ahci_highbank_hardreset,
|
||||
.transmit_led_message = ecx_transmit_led_message,
|
||||
};
|
||||
|
||||
static const struct ata_port_info ahci_highbank_port_info = {
|
||||
@ -264,12 +424,13 @@ static int ahci_highbank_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct device *dev = &pdev->dev;
|
||||
struct ahci_host_priv *hpriv;
|
||||
struct ecx_plat_data *pdata;
|
||||
struct ata_host *host;
|
||||
struct resource *mem;
|
||||
int irq;
|
||||
int n_ports;
|
||||
int i;
|
||||
int rc;
|
||||
u32 n_ports;
|
||||
struct ata_port_info pi = ahci_highbank_port_info;
|
||||
const struct ata_port_info *ppi[] = { &pi, NULL };
|
||||
|
||||
@ -290,6 +451,11 @@ static int ahci_highbank_probe(struct platform_device *pdev)
|
||||
dev_err(dev, "can't alloc ahci_host_priv\n");
|
||||
return -ENOMEM;
|
||||
}
|
||||
pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
|
||||
if (!pdata) {
|
||||
dev_err(dev, "can't alloc ecx_plat_data\n");
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
hpriv->flags |= (unsigned long)pi.private_data;
|
||||
|
||||
@ -313,8 +479,6 @@ static int ahci_highbank_probe(struct platform_device *pdev)
|
||||
if (hpriv->cap & HOST_CAP_PMP)
|
||||
pi.flags |= ATA_FLAG_PMP;
|
||||
|
||||
ahci_set_em_messages(hpriv, &pi);
|
||||
|
||||
/* CAP.NP sometimes indicate the index of the last enabled
|
||||
* port, at other times, that of the last possible port, so
|
||||
* determining the maximum port number requires looking at
|
||||
@ -322,6 +486,10 @@ static int ahci_highbank_probe(struct platform_device *pdev)
|
||||
*/
|
||||
n_ports = max(ahci_nr_ports(hpriv->cap), fls(hpriv->port_map));
|
||||
|
||||
pdata->n_ports = n_ports;
|
||||
hpriv->plat_data = pdata;
|
||||
highbank_set_em_messages(dev, hpriv, &pi);
|
||||
|
||||
host = ata_host_alloc_pinfo(dev, ppi, n_ports);
|
||||
if (!host) {
|
||||
rc = -ENOMEM;
|
||||
@ -333,9 +501,6 @@ static int ahci_highbank_probe(struct platform_device *pdev)
|
||||
if (!(hpriv->cap & HOST_CAP_SSS) || ahci_ignore_sss)
|
||||
host->flags |= ATA_HOST_PARALLEL_SCAN;
|
||||
|
||||
if (pi.flags & ATA_FLAG_EM)
|
||||
ahci_reset_em(host);
|
||||
|
||||
for (i = 0; i < host->n_ports; i++) {
|
||||
struct ata_port *ap = host->ports[i];
|
||||
|
||||
|
@ -776,7 +776,7 @@ static int init_controller(void __iomem *mmio_base, u16 hctl)
|
||||
#ifdef CONFIG_PM
|
||||
static int inic_pci_device_resume(struct pci_dev *pdev)
|
||||
{
|
||||
struct ata_host *host = dev_get_drvdata(&pdev->dev);
|
||||
struct ata_host *host = pci_get_drvdata(pdev);
|
||||
struct inic_host_priv *hpriv = host->private_data;
|
||||
int rc;
|
||||
|
||||
|
@ -2435,7 +2435,7 @@ static int nv_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
|
||||
#ifdef CONFIG_PM
|
||||
static int nv_pci_device_resume(struct pci_dev *pdev)
|
||||
{
|
||||
struct ata_host *host = dev_get_drvdata(&pdev->dev);
|
||||
struct ata_host *host = pci_get_drvdata(pdev);
|
||||
struct nv_host_priv *hpriv = host->private_data;
|
||||
int rc;
|
||||
|
||||
|
@ -121,6 +121,8 @@
|
||||
/* Descriptor table word 0 bit (when DTA32M = 1) */
|
||||
#define SATA_RCAR_DTEND BIT(0)
|
||||
|
||||
#define SATA_RCAR_DMA_BOUNDARY 0x1FFFFFFEUL
|
||||
|
||||
struct sata_rcar_priv {
|
||||
void __iomem *base;
|
||||
struct clk *clk;
|
||||
@ -128,41 +130,44 @@ struct sata_rcar_priv {
|
||||
|
||||
static void sata_rcar_phy_initialize(struct sata_rcar_priv *priv)
|
||||
{
|
||||
void __iomem *base = priv->base;
|
||||
|
||||
/* idle state */
|
||||
iowrite32(0, priv->base + SATAPHYADDR_REG);
|
||||
iowrite32(0, base + SATAPHYADDR_REG);
|
||||
/* reset */
|
||||
iowrite32(SATAPHYRESET_PHYRST, priv->base + SATAPHYRESET_REG);
|
||||
iowrite32(SATAPHYRESET_PHYRST, base + SATAPHYRESET_REG);
|
||||
udelay(10);
|
||||
/* deassert reset */
|
||||
iowrite32(0, priv->base + SATAPHYRESET_REG);
|
||||
iowrite32(0, base + SATAPHYRESET_REG);
|
||||
}
|
||||
|
||||
static void sata_rcar_phy_write(struct sata_rcar_priv *priv, u16 reg, u32 val,
|
||||
int group)
|
||||
{
|
||||
void __iomem *base = priv->base;
|
||||
int timeout;
|
||||
|
||||
/* deassert reset */
|
||||
iowrite32(0, priv->base + SATAPHYRESET_REG);
|
||||
iowrite32(0, base + SATAPHYRESET_REG);
|
||||
/* lane 1 */
|
||||
iowrite32(SATAPHYACCEN_PHYLANE, priv->base + SATAPHYACCEN_REG);
|
||||
iowrite32(SATAPHYACCEN_PHYLANE, base + SATAPHYACCEN_REG);
|
||||
/* write phy register value */
|
||||
iowrite32(val, priv->base + SATAPHYWDATA_REG);
|
||||
iowrite32(val, base + SATAPHYWDATA_REG);
|
||||
/* set register group */
|
||||
if (group)
|
||||
reg |= SATAPHYADDR_PHYRATEMODE;
|
||||
/* write command */
|
||||
iowrite32(SATAPHYADDR_PHYCMD_WRITE | reg, priv->base + SATAPHYADDR_REG);
|
||||
iowrite32(SATAPHYADDR_PHYCMD_WRITE | reg, base + SATAPHYADDR_REG);
|
||||
/* wait for ack */
|
||||
for (timeout = 0; timeout < 100; timeout++) {
|
||||
val = ioread32(priv->base + SATAPHYACK_REG);
|
||||
val = ioread32(base + SATAPHYACK_REG);
|
||||
if (val & SATAPHYACK_PHYACK)
|
||||
break;
|
||||
}
|
||||
if (timeout >= 100)
|
||||
pr_err("%s timeout\n", __func__);
|
||||
/* idle state */
|
||||
iowrite32(0, priv->base + SATAPHYADDR_REG);
|
||||
iowrite32(0, base + SATAPHYADDR_REG);
|
||||
}
|
||||
|
||||
static void sata_rcar_freeze(struct ata_port *ap)
|
||||
@ -178,14 +183,15 @@ static void sata_rcar_freeze(struct ata_port *ap)
|
||||
static void sata_rcar_thaw(struct ata_port *ap)
|
||||
{
|
||||
struct sata_rcar_priv *priv = ap->host->private_data;
|
||||
void __iomem *base = priv->base;
|
||||
|
||||
/* ack */
|
||||
iowrite32(~SATA_RCAR_INT_MASK, priv->base + SATAINTSTAT_REG);
|
||||
iowrite32(~(u32)SATA_RCAR_INT_MASK, base + SATAINTSTAT_REG);
|
||||
|
||||
ata_sff_thaw(ap);
|
||||
|
||||
/* unmask */
|
||||
iowrite32(0x7ff & ~SATA_RCAR_INT_MASK, priv->base + SATAINTMASK_REG);
|
||||
iowrite32(0x7ff & ~SATA_RCAR_INT_MASK, base + SATAINTMASK_REG);
|
||||
}
|
||||
|
||||
static void sata_rcar_ioread16_rep(void __iomem *reg, void *buffer, int count)
|
||||
@ -474,11 +480,10 @@ static void sata_rcar_bmdma_fill_sg(struct ata_queued_cmd *qc)
|
||||
struct ata_port *ap = qc->ap;
|
||||
struct ata_bmdma_prd *prd = ap->bmdma_prd;
|
||||
struct scatterlist *sg;
|
||||
unsigned int si, pi;
|
||||
unsigned int si;
|
||||
|
||||
pi = 0;
|
||||
for_each_sg(qc->sg, sg, qc->n_elem, si) {
|
||||
u32 addr, sg_len, len;
|
||||
u32 addr, sg_len;
|
||||
|
||||
/*
|
||||
* Note: h/w doesn't support 64-bit, so we unconditionally
|
||||
@ -487,24 +492,13 @@ static void sata_rcar_bmdma_fill_sg(struct ata_queued_cmd *qc)
|
||||
addr = (u32)sg_dma_address(sg);
|
||||
sg_len = sg_dma_len(sg);
|
||||
|
||||
/* H/w transfer count is only 29 bits long, let's be careful */
|
||||
while (sg_len) {
|
||||
len = sg_len;
|
||||
if (len > 0x1ffffffe)
|
||||
len = 0x1ffffffe;
|
||||
|
||||
prd[pi].addr = cpu_to_le32(addr);
|
||||
prd[pi].flags_len = cpu_to_le32(len);
|
||||
VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", pi, addr, len);
|
||||
|
||||
pi++;
|
||||
sg_len -= len;
|
||||
addr += len;
|
||||
}
|
||||
prd[si].addr = cpu_to_le32(addr);
|
||||
prd[si].flags_len = cpu_to_le32(sg_len);
|
||||
VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", si, addr, sg_len);
|
||||
}
|
||||
|
||||
/* end-of-table flag */
|
||||
prd[pi - 1].addr |= cpu_to_le32(SATA_RCAR_DTEND);
|
||||
prd[si - 1].addr |= cpu_to_le32(SATA_RCAR_DTEND);
|
||||
}
|
||||
|
||||
static void sata_rcar_qc_prep(struct ata_queued_cmd *qc)
|
||||
@ -519,15 +513,16 @@ static void sata_rcar_bmdma_setup(struct ata_queued_cmd *qc)
|
||||
{
|
||||
struct ata_port *ap = qc->ap;
|
||||
unsigned int rw = qc->tf.flags & ATA_TFLAG_WRITE;
|
||||
u32 dmactl;
|
||||
struct sata_rcar_priv *priv = ap->host->private_data;
|
||||
void __iomem *base = priv->base;
|
||||
u32 dmactl;
|
||||
|
||||
/* load PRD table addr. */
|
||||
mb(); /* make sure PRD table writes are visible to controller */
|
||||
iowrite32(ap->bmdma_prd_dma, priv->base + ATAPI_DTB_ADR_REG);
|
||||
iowrite32(ap->bmdma_prd_dma, base + ATAPI_DTB_ADR_REG);
|
||||
|
||||
/* specify data direction, triple-check start bit is clear */
|
||||
dmactl = ioread32(priv->base + ATAPI_CONTROL1_REG);
|
||||
dmactl = ioread32(base + ATAPI_CONTROL1_REG);
|
||||
dmactl &= ~(ATAPI_CONTROL1_RW | ATAPI_CONTROL1_STOP);
|
||||
if (dmactl & ATAPI_CONTROL1_START) {
|
||||
dmactl &= ~ATAPI_CONTROL1_START;
|
||||
@ -535,7 +530,7 @@ static void sata_rcar_bmdma_setup(struct ata_queued_cmd *qc)
|
||||
}
|
||||
if (!rw)
|
||||
dmactl |= ATAPI_CONTROL1_RW;
|
||||
iowrite32(dmactl, priv->base + ATAPI_CONTROL1_REG);
|
||||
iowrite32(dmactl, base + ATAPI_CONTROL1_REG);
|
||||
|
||||
/* issue r/w command */
|
||||
ap->ops->sff_exec_command(ap, &qc->tf);
|
||||
@ -544,28 +539,30 @@ static void sata_rcar_bmdma_setup(struct ata_queued_cmd *qc)
|
||||
static void sata_rcar_bmdma_start(struct ata_queued_cmd *qc)
|
||||
{
|
||||
struct ata_port *ap = qc->ap;
|
||||
u32 dmactl;
|
||||
struct sata_rcar_priv *priv = ap->host->private_data;
|
||||
void __iomem *base = priv->base;
|
||||
u32 dmactl;
|
||||
|
||||
/* start host DMA transaction */
|
||||
dmactl = ioread32(priv->base + ATAPI_CONTROL1_REG);
|
||||
dmactl = ioread32(base + ATAPI_CONTROL1_REG);
|
||||
dmactl &= ~ATAPI_CONTROL1_STOP;
|
||||
dmactl |= ATAPI_CONTROL1_START;
|
||||
iowrite32(dmactl, priv->base + ATAPI_CONTROL1_REG);
|
||||
iowrite32(dmactl, base + ATAPI_CONTROL1_REG);
|
||||
}
|
||||
|
||||
static void sata_rcar_bmdma_stop(struct ata_queued_cmd *qc)
|
||||
{
|
||||
struct ata_port *ap = qc->ap;
|
||||
struct sata_rcar_priv *priv = ap->host->private_data;
|
||||
void __iomem *base = priv->base;
|
||||
u32 dmactl;
|
||||
|
||||
/* force termination of DMA transfer if active */
|
||||
dmactl = ioread32(priv->base + ATAPI_CONTROL1_REG);
|
||||
dmactl = ioread32(base + ATAPI_CONTROL1_REG);
|
||||
if (dmactl & ATAPI_CONTROL1_START) {
|
||||
dmactl &= ~ATAPI_CONTROL1_START;
|
||||
dmactl |= ATAPI_CONTROL1_STOP;
|
||||
iowrite32(dmactl, priv->base + ATAPI_CONTROL1_REG);
|
||||
iowrite32(dmactl, base + ATAPI_CONTROL1_REG);
|
||||
}
|
||||
|
||||
/* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */
|
||||
@ -575,8 +572,8 @@ static void sata_rcar_bmdma_stop(struct ata_queued_cmd *qc)
|
||||
static u8 sata_rcar_bmdma_status(struct ata_port *ap)
|
||||
{
|
||||
struct sata_rcar_priv *priv = ap->host->private_data;
|
||||
u32 status;
|
||||
u8 host_stat = 0;
|
||||
u32 status;
|
||||
|
||||
status = ioread32(priv->base + ATAPI_STATUS_REG);
|
||||
if (status & ATAPI_STATUS_DEVINT)
|
||||
@ -588,7 +585,14 @@ static u8 sata_rcar_bmdma_status(struct ata_port *ap)
|
||||
}
|
||||
|
||||
static struct scsi_host_template sata_rcar_sht = {
|
||||
ATA_BMDMA_SHT(DRV_NAME),
|
||||
ATA_BASE_SHT(DRV_NAME),
|
||||
/*
|
||||
* This controller allows transfer chunks up to 512MB which cross 64KB
|
||||
* boundaries, therefore the DMA limits are more relaxed than standard
|
||||
* ATA SFF.
|
||||
*/
|
||||
.sg_tablesize = ATA_MAX_PRD,
|
||||
.dma_boundary = SATA_RCAR_DMA_BOUNDARY,
|
||||
};
|
||||
|
||||
static struct ata_port_operations sata_rcar_port_ops = {
|
||||
@ -668,19 +672,20 @@ static irqreturn_t sata_rcar_interrupt(int irq, void *dev_instance)
|
||||
{
|
||||
struct ata_host *host = dev_instance;
|
||||
struct sata_rcar_priv *priv = host->private_data;
|
||||
struct ata_port *ap;
|
||||
void __iomem *base = priv->base;
|
||||
unsigned int handled = 0;
|
||||
struct ata_port *ap;
|
||||
u32 sataintstat;
|
||||
unsigned long flags;
|
||||
|
||||
spin_lock_irqsave(&host->lock, flags);
|
||||
|
||||
sataintstat = ioread32(priv->base + SATAINTSTAT_REG);
|
||||
sataintstat = ioread32(base + SATAINTSTAT_REG);
|
||||
sataintstat &= SATA_RCAR_INT_MASK;
|
||||
if (!sataintstat)
|
||||
goto done;
|
||||
/* ack */
|
||||
iowrite32(~sataintstat & 0x7ff, priv->base + SATAINTSTAT_REG);
|
||||
iowrite32(~sataintstat & 0x7ff, base + SATAINTSTAT_REG);
|
||||
|
||||
ap = host->ports[0];
|
||||
|
||||
@ -702,15 +707,16 @@ static void sata_rcar_setup_port(struct ata_host *host)
|
||||
struct ata_port *ap = host->ports[0];
|
||||
struct ata_ioports *ioaddr = &ap->ioaddr;
|
||||
struct sata_rcar_priv *priv = host->private_data;
|
||||
void __iomem *base = priv->base;
|
||||
|
||||
ap->ops = &sata_rcar_port_ops;
|
||||
ap->pio_mask = ATA_PIO4;
|
||||
ap->udma_mask = ATA_UDMA6;
|
||||
ap->flags |= ATA_FLAG_SATA;
|
||||
|
||||
ioaddr->cmd_addr = priv->base + SDATA_REG;
|
||||
ioaddr->ctl_addr = priv->base + SSDEVCON_REG;
|
||||
ioaddr->scr_addr = priv->base + SCRSSTS_REG;
|
||||
ioaddr->cmd_addr = base + SDATA_REG;
|
||||
ioaddr->ctl_addr = base + SSDEVCON_REG;
|
||||
ioaddr->scr_addr = base + SCRSSTS_REG;
|
||||
ioaddr->altstatus_addr = ioaddr->ctl_addr;
|
||||
|
||||
ioaddr->data_addr = ioaddr->cmd_addr + (ATA_REG_DATA << 2);
|
||||
@ -728,6 +734,7 @@ static void sata_rcar_setup_port(struct ata_host *host)
|
||||
static void sata_rcar_init_controller(struct ata_host *host)
|
||||
{
|
||||
struct sata_rcar_priv *priv = host->private_data;
|
||||
void __iomem *base = priv->base;
|
||||
u32 val;
|
||||
|
||||
/* reset and setup phy */
|
||||
@ -740,27 +747,27 @@ static void sata_rcar_init_controller(struct ata_host *host)
|
||||
sata_rcar_phy_write(priv, SATAPCTLR4_REG, 0x28E80000, 0);
|
||||
|
||||
/* SATA-IP reset state */
|
||||
val = ioread32(priv->base + ATAPI_CONTROL1_REG);
|
||||
val = ioread32(base + ATAPI_CONTROL1_REG);
|
||||
val |= ATAPI_CONTROL1_RESET;
|
||||
iowrite32(val, priv->base + ATAPI_CONTROL1_REG);
|
||||
iowrite32(val, base + ATAPI_CONTROL1_REG);
|
||||
|
||||
/* ISM mode, PRD mode, DTEND flag at bit 0 */
|
||||
val = ioread32(priv->base + ATAPI_CONTROL1_REG);
|
||||
val = ioread32(base + ATAPI_CONTROL1_REG);
|
||||
val |= ATAPI_CONTROL1_ISM;
|
||||
val |= ATAPI_CONTROL1_DESE;
|
||||
val |= ATAPI_CONTROL1_DTA32M;
|
||||
iowrite32(val, priv->base + ATAPI_CONTROL1_REG);
|
||||
iowrite32(val, base + ATAPI_CONTROL1_REG);
|
||||
|
||||
/* Release the SATA-IP from the reset state */
|
||||
val = ioread32(priv->base + ATAPI_CONTROL1_REG);
|
||||
val = ioread32(base + ATAPI_CONTROL1_REG);
|
||||
val &= ~ATAPI_CONTROL1_RESET;
|
||||
iowrite32(val, priv->base + ATAPI_CONTROL1_REG);
|
||||
iowrite32(val, base + ATAPI_CONTROL1_REG);
|
||||
|
||||
/* ack and mask */
|
||||
iowrite32(0, priv->base + SATAINTSTAT_REG);
|
||||
iowrite32(0x7ff, priv->base + SATAINTMASK_REG);
|
||||
iowrite32(0, base + SATAINTSTAT_REG);
|
||||
iowrite32(0x7ff, base + SATAINTMASK_REG);
|
||||
/* enable interrupts */
|
||||
iowrite32(ATAPI_INT_ENABLE_SATAINT, priv->base + ATAPI_INT_ENABLE_REG);
|
||||
iowrite32(ATAPI_INT_ENABLE_SATAINT, base + ATAPI_INT_ENABLE_REG);
|
||||
}
|
||||
|
||||
static int sata_rcar_probe(struct platform_device *pdev)
|
||||
@ -825,16 +832,17 @@ cleanup:
|
||||
|
||||
static int sata_rcar_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct ata_host *host = dev_get_drvdata(&pdev->dev);
|
||||
struct ata_host *host = platform_get_drvdata(pdev);
|
||||
struct sata_rcar_priv *priv = host->private_data;
|
||||
void __iomem *base = priv->base;
|
||||
|
||||
ata_host_detach(host);
|
||||
|
||||
/* disable interrupts */
|
||||
iowrite32(0, priv->base + ATAPI_INT_ENABLE_REG);
|
||||
iowrite32(0, base + ATAPI_INT_ENABLE_REG);
|
||||
/* ack and mask */
|
||||
iowrite32(0, priv->base + SATAINTSTAT_REG);
|
||||
iowrite32(0x7ff, priv->base + SATAINTMASK_REG);
|
||||
iowrite32(0, base + SATAINTSTAT_REG);
|
||||
iowrite32(0x7ff, base + SATAINTMASK_REG);
|
||||
|
||||
clk_disable(priv->clk);
|
||||
|
||||
@ -846,14 +854,15 @@ static int sata_rcar_suspend(struct device *dev)
|
||||
{
|
||||
struct ata_host *host = dev_get_drvdata(dev);
|
||||
struct sata_rcar_priv *priv = host->private_data;
|
||||
void __iomem *base = priv->base;
|
||||
int ret;
|
||||
|
||||
ret = ata_host_suspend(host, PMSG_SUSPEND);
|
||||
if (!ret) {
|
||||
/* disable interrupts */
|
||||
iowrite32(0, priv->base + ATAPI_INT_ENABLE_REG);
|
||||
iowrite32(0, base + ATAPI_INT_ENABLE_REG);
|
||||
/* mask */
|
||||
iowrite32(0x7ff, priv->base + SATAINTMASK_REG);
|
||||
iowrite32(0x7ff, base + SATAINTMASK_REG);
|
||||
|
||||
clk_disable(priv->clk);
|
||||
}
|
||||
@ -865,14 +874,15 @@ static int sata_rcar_resume(struct device *dev)
|
||||
{
|
||||
struct ata_host *host = dev_get_drvdata(dev);
|
||||
struct sata_rcar_priv *priv = host->private_data;
|
||||
void __iomem *base = priv->base;
|
||||
|
||||
clk_enable(priv->clk);
|
||||
|
||||
/* ack and mask */
|
||||
iowrite32(0, priv->base + SATAINTSTAT_REG);
|
||||
iowrite32(0x7ff, priv->base + SATAINTMASK_REG);
|
||||
iowrite32(0, base + SATAINTSTAT_REG);
|
||||
iowrite32(0x7ff, base + SATAINTMASK_REG);
|
||||
/* enable interrupts */
|
||||
iowrite32(ATAPI_INT_ENABLE_SATAINT, priv->base + ATAPI_INT_ENABLE_REG);
|
||||
iowrite32(ATAPI_INT_ENABLE_SATAINT, base + ATAPI_INT_ENABLE_REG);
|
||||
|
||||
ata_host_resume(host);
|
||||
|
||||
|
@ -805,7 +805,7 @@ static int sil_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
|
||||
#ifdef CONFIG_PM
|
||||
static int sil_pci_device_resume(struct pci_dev *pdev)
|
||||
{
|
||||
struct ata_host *host = dev_get_drvdata(&pdev->dev);
|
||||
struct ata_host *host = pci_get_drvdata(pdev);
|
||||
int rc;
|
||||
|
||||
rc = ata_pci_device_do_resume(pdev);
|
||||
|
@ -1353,7 +1353,7 @@ static int sil24_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
|
||||
#ifdef CONFIG_PM
|
||||
static int sil24_pci_device_resume(struct pci_dev *pdev)
|
||||
{
|
||||
struct ata_host *host = dev_get_drvdata(&pdev->dev);
|
||||
struct ata_host *host = pci_get_drvdata(pdev);
|
||||
void __iomem *host_base = host->iomap[SIL24_HOST_BAR];
|
||||
int rc;
|
||||
|
||||
|
@ -6662,7 +6662,6 @@ static bool ipr_qc_fill_rtf(struct ata_queued_cmd *qc)
|
||||
tf->hob_lbal = g->hob_lbal;
|
||||
tf->hob_lbam = g->hob_lbam;
|
||||
tf->hob_lbah = g->hob_lbah;
|
||||
tf->ctl = g->alt_status;
|
||||
|
||||
return true;
|
||||
}
|
||||
|
@ -399,6 +399,7 @@ enum {
|
||||
ATA_HORKAGE_BROKEN_FPDMA_AA = (1 << 15), /* skip AA */
|
||||
ATA_HORKAGE_DUMP_ID = (1 << 16), /* dump IDENTIFY data */
|
||||
ATA_HORKAGE_MAX_SEC_LBA48 = (1 << 17), /* Set max sects to 65535 */
|
||||
ATA_HORKAGE_ATAPI_DMADIR = (1 << 18), /* device requires dmadir */
|
||||
|
||||
/* DMA mask for user DMA control: User visible values; DO NOT
|
||||
renumber */
|
||||
@ -746,6 +747,7 @@ struct ata_port {
|
||||
/* Flags that change dynamically, protected by ap->lock */
|
||||
unsigned int pflags; /* ATA_PFLAG_xxx */
|
||||
unsigned int print_id; /* user visible unique port ID */
|
||||
unsigned int local_port_no; /* host local port num */
|
||||
unsigned int port_no; /* 0 based port no. inside the host */
|
||||
|
||||
#ifdef CONFIG_ATA_SFF
|
||||
@ -908,6 +910,9 @@ struct ata_port_operations {
|
||||
ssize_t (*sw_activity_show)(struct ata_device *dev, char *buf);
|
||||
ssize_t (*sw_activity_store)(struct ata_device *dev,
|
||||
enum sw_activity val);
|
||||
ssize_t (*transmit_led_message)(struct ata_port *ap, u32 state,
|
||||
ssize_t size);
|
||||
|
||||
/*
|
||||
* Obsolete
|
||||
*/
|
||||
|
Loading…
Reference in New Issue
Block a user