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pci-v6.2-fixes-1
-----BEGIN PGP SIGNATURE----- iQJIBAABCgAyFiEEgMe7l+5h9hnxdsnuWYigwDrT+vwFAmPBniAUHGJoZWxnYWFz QGdvb2dsZS5jb20ACgkQWYigwDrT+vwOjRAAhjyRAgyiZV2rWS4pyvpQpqcpZWD9 796ZSqnzLJjVYCymGvUTX23FEA48n59+bCM/WpfEGUPrBf8LZQxC9YOCm6ltuM8+ FoSBykW/tHPq5IWaLzgrWpHeDOgEnZu/WFGGvrV3tl1mLpM1SJT8bGDsjHXlo+FM qkTEiA3nUEKQs5x9r2TTLCeUWGPNTIHNd2VfuxOqM3qC/nVCOfTTxU8nm6Lk7Eix nboAugAIADJIjs/+ZGekLBuzZYPkLYuDTyMYJ5hdo1p7wWCLc9gArEqvXKwVgmD3 ptenZeOlQi9Ay45HmkfIgfgKeeQ7REJj3dx04vf67neAianyUrB0EZDqDjR7LmgM ozlNt0XjyoeEhu6AQS0s1LZtbDiED1R/00P6Gb+YEjUCVipW2lEYYwP0v9dsnNoh 6wblgnkQoxLFM+5CAXRmCmpaoQn0Uam7okfVeohtsz8/kNQF2St0hjzr4Dmws+O3 k9PUqnnUl4ByElzpEDesVGZMJ3pxFVH15ufu8VnRqN60pLTvNrsPyU4cVnG176Rc 3RSDN3zMtPxnHJVy4r3bTNEZsX/7RUrOb4xScOXMmRDBMUc8QdscF8Oj1ucKlj5j mp7vB/7+VjU96uRarRyqUxGeQc77DCTcvOa1IGh/cuYom8ZJ6vpSCpKy6f6SFGuf i8iTTUcQKCdqVW4= =Fv2v -----END PGP SIGNATURE----- Merge tag 'pci-v6.2-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci Pull pci fixes from Bjorn Helgaas: - Work around apparent firmware issue that made Linux reject MMCONFIG space, which broke PCI extended config space (Bjorn Helgaas) - Fix CONFIG_PCIE_BT1 dependency due to mid-air collision between a PCI_MSI_IRQ_DOMAIN -> PCI_MSI change and addition of PCIE_BT1 (Lukas Bulwahn) * tag 'pci-v6.2-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: x86/pci: Treat EfiMemoryMappedIO as reservation of ECAM space x86/pci: Simplify is_mmconf_reserved() messages PCI: dwc: Adjust to recent removal of PCI_MSI_IRQ_DOMAIN
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commit
9e058c2952
@ -12,6 +12,7 @@
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*/
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#include <linux/acpi.h>
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#include <linux/efi.h>
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#include <linux/pci.h>
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#include <linux/init.h>
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#include <linux/bitmap.h>
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@ -442,17 +443,42 @@ static bool is_acpi_reserved(u64 start, u64 end, enum e820_type not_used)
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return mcfg_res.flags;
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}
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static bool is_efi_mmio(u64 start, u64 end, enum e820_type not_used)
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{
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#ifdef CONFIG_EFI
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efi_memory_desc_t *md;
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u64 size, mmio_start, mmio_end;
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for_each_efi_memory_desc(md) {
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if (md->type == EFI_MEMORY_MAPPED_IO) {
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size = md->num_pages << EFI_PAGE_SHIFT;
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mmio_start = md->phys_addr;
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mmio_end = mmio_start + size;
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/*
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* N.B. Caller supplies (start, start + size),
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* so to match, mmio_end is the first address
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* *past* the EFI_MEMORY_MAPPED_IO area.
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*/
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if (mmio_start <= start && end <= mmio_end)
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return true;
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}
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}
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#endif
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return false;
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}
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typedef bool (*check_reserved_t)(u64 start, u64 end, enum e820_type type);
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static bool __ref is_mmconf_reserved(check_reserved_t is_reserved,
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struct pci_mmcfg_region *cfg,
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struct device *dev, int with_e820)
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struct device *dev, const char *method)
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{
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u64 addr = cfg->res.start;
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u64 size = resource_size(&cfg->res);
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u64 old_size = size;
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int num_buses;
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char *method = with_e820 ? "E820" : "ACPI motherboard resources";
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while (!is_reserved(addr, addr + size, E820_TYPE_RESERVED)) {
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size >>= 1;
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@ -464,10 +490,10 @@ static bool __ref is_mmconf_reserved(check_reserved_t is_reserved,
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return false;
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if (dev)
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dev_info(dev, "MMCONFIG at %pR reserved in %s\n",
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dev_info(dev, "MMCONFIG at %pR reserved as %s\n",
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&cfg->res, method);
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else
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pr_info(PREFIX "MMCONFIG at %pR reserved in %s\n",
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pr_info(PREFIX "MMCONFIG at %pR reserved as %s\n",
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&cfg->res, method);
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if (old_size != size) {
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@ -500,7 +526,8 @@ static bool __ref
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pci_mmcfg_check_reserved(struct device *dev, struct pci_mmcfg_region *cfg, int early)
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{
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if (!early && !acpi_disabled) {
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if (is_mmconf_reserved(is_acpi_reserved, cfg, dev, 0))
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if (is_mmconf_reserved(is_acpi_reserved, cfg, dev,
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"ACPI motherboard resource"))
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return true;
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if (dev)
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@ -513,6 +540,10 @@ pci_mmcfg_check_reserved(struct device *dev, struct pci_mmcfg_region *cfg, int e
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"MMCONFIG at %pR not reserved in "
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"ACPI motherboard resources\n",
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&cfg->res);
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if (is_mmconf_reserved(is_efi_mmio, cfg, dev,
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"EfiMemoryMappedIO"))
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return true;
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}
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/*
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@ -527,7 +558,8 @@ pci_mmcfg_check_reserved(struct device *dev, struct pci_mmcfg_region *cfg, int e
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/* Don't try to do this check unless configuration
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type 1 is available. how about type 2 ?*/
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if (raw_pci_ops)
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return is_mmconf_reserved(e820__mapped_all, cfg, dev, 1);
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return is_mmconf_reserved(e820__mapped_all, cfg, dev,
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"E820 entry");
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return false;
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}
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@ -225,7 +225,7 @@ config PCIE_ARTPEC6_EP
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config PCIE_BT1
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tristate "Baikal-T1 PCIe controller"
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depends on MIPS_BAIKAL_T1 || COMPILE_TEST
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depends on PCI_MSI_IRQ_DOMAIN
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depends on PCI_MSI
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select PCIE_DW_HOST
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help
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Enables support for the PCIe controller in the Baikal-T1 SoC to work
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