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ARM: dts: r8a7792: Add CMT0 and CMT1 to r8a7792
Add CMT0 and CMT1 to the R-Car Gen2 V2H (r8a7792) SoC. Signed-off-by: Magnus Damm <damm+renesas@opensource.se> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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commit
9dd6f7c484
@ -875,6 +875,40 @@
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compatible = "renesas,prr";
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reg = <0 0xff000044 0 4>;
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};
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cmt0: timer@ffca0000 {
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compatible = "renesas,r8a7792-cmt0",
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"renesas,rcar-gen2-cmt0";
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reg = <0 0xffca0000 0 0x1004>;
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interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 124>;
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clock-names = "fck";
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power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
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resets = <&cpg 124>;
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status = "disabled";
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};
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cmt1: timer@e6130000 {
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compatible = "renesas,r8a7792-cmt1",
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"renesas,rcar-gen2-cmt1";
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reg = <0 0xe6130000 0 0x1004>;
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interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 329>;
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clock-names = "fck";
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power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
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resets = <&cpg 329>;
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status = "disabled";
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};
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};
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timer {
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