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Merge branch 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull perf fixes from Thomas Gleixner: "A bunch of fixes for perf and kprobes: - revert a commit that caused a perf group regression - silence dmesg spam - fix kprobe probing errors on ia64 and ppc64 - filter kprobe faults from userspace - lockdep fix for perf exit path - prevent perf #GP in KVM guest - correct perf event and filters" * 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: kprobes: Fix "Failed to find blacklist" probing errors on ia64 and ppc64 kprobes/x86: Don't try to resolve kprobe faults from userspace perf/x86/intel: Avoid spamming kernel log for BTS buffer failure perf/x86/intel: Protect LBR and extra_regs against KVM lying perf: Fix lockdep warning on process exit perf/x86/intel/uncore: Fix SNB-EP/IVT Cbox filter mappings perf/x86/intel: Use proper dTLB-load-misses event on IvyBridge perf: Revert ("perf: Always destroy groups on exit")
This commit is contained in:
commit
9dae0a3fc4
@ -118,6 +118,9 @@ static int x86_pmu_extra_regs(u64 config, struct perf_event *event)
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continue;
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if (event->attr.config1 & ~er->valid_mask)
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return -EINVAL;
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/* Check if the extra msrs can be safely accessed*/
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if (!er->extra_msr_access)
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return -ENXIO;
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reg->idx = er->idx;
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reg->config = event->attr.config1;
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@ -295,14 +295,16 @@ struct extra_reg {
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u64 config_mask;
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u64 valid_mask;
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int idx; /* per_xxx->regs[] reg index */
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bool extra_msr_access;
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};
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#define EVENT_EXTRA_REG(e, ms, m, vm, i) { \
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.event = (e), \
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.msr = (ms), \
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.config_mask = (m), \
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.valid_mask = (vm), \
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.idx = EXTRA_REG_##i, \
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.event = (e), \
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.msr = (ms), \
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.config_mask = (m), \
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.valid_mask = (vm), \
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.idx = EXTRA_REG_##i, \
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.extra_msr_access = true, \
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}
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#define INTEL_EVENT_EXTRA_REG(event, msr, vm, idx) \
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@ -2182,6 +2182,41 @@ static void intel_snb_check_microcode(void)
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}
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}
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/*
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* Under certain circumstances, access certain MSR may cause #GP.
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* The function tests if the input MSR can be safely accessed.
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*/
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static bool check_msr(unsigned long msr, u64 mask)
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{
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u64 val_old, val_new, val_tmp;
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/*
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* Read the current value, change it and read it back to see if it
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* matches, this is needed to detect certain hardware emulators
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* (qemu/kvm) that don't trap on the MSR access and always return 0s.
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*/
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if (rdmsrl_safe(msr, &val_old))
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return false;
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/*
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* Only change the bits which can be updated by wrmsrl.
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*/
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val_tmp = val_old ^ mask;
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if (wrmsrl_safe(msr, val_tmp) ||
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rdmsrl_safe(msr, &val_new))
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return false;
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if (val_new != val_tmp)
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return false;
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/* Here it's sure that the MSR can be safely accessed.
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* Restore the old value and return.
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*/
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wrmsrl(msr, val_old);
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return true;
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}
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static __init void intel_sandybridge_quirk(void)
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{
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x86_pmu.check_microcode = intel_snb_check_microcode;
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@ -2271,7 +2306,8 @@ __init int intel_pmu_init(void)
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union cpuid10_ebx ebx;
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struct event_constraint *c;
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unsigned int unused;
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int version;
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struct extra_reg *er;
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int version, i;
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if (!cpu_has(&boot_cpu_data, X86_FEATURE_ARCH_PERFMON)) {
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switch (boot_cpu_data.x86) {
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@ -2474,6 +2510,9 @@ __init int intel_pmu_init(void)
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case 62: /* IvyBridge EP */
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memcpy(hw_cache_event_ids, snb_hw_cache_event_ids,
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sizeof(hw_cache_event_ids));
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/* dTLB-load-misses on IVB is different than SNB */
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hw_cache_event_ids[C(DTLB)][C(OP_READ)][C(RESULT_MISS)] = 0x8108; /* DTLB_LOAD_MISSES.DEMAND_LD_MISS_CAUSES_A_WALK */
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memcpy(hw_cache_extra_regs, snb_hw_cache_extra_regs,
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sizeof(hw_cache_extra_regs));
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@ -2574,6 +2613,34 @@ __init int intel_pmu_init(void)
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}
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}
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/*
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* Access LBR MSR may cause #GP under certain circumstances.
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* E.g. KVM doesn't support LBR MSR
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* Check all LBT MSR here.
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* Disable LBR access if any LBR MSRs can not be accessed.
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*/
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if (x86_pmu.lbr_nr && !check_msr(x86_pmu.lbr_tos, 0x3UL))
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x86_pmu.lbr_nr = 0;
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for (i = 0; i < x86_pmu.lbr_nr; i++) {
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if (!(check_msr(x86_pmu.lbr_from + i, 0xffffUL) &&
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check_msr(x86_pmu.lbr_to + i, 0xffffUL)))
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x86_pmu.lbr_nr = 0;
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}
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/*
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* Access extra MSR may cause #GP under certain circumstances.
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* E.g. KVM doesn't support offcore event
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* Check all extra_regs here.
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*/
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if (x86_pmu.extra_regs) {
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for (er = x86_pmu.extra_regs; er->msr; er++) {
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er->extra_msr_access = check_msr(er->msr, 0x1ffUL);
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/* Disable LBR select mapping */
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if ((er->idx == EXTRA_REG_LBR) && !er->extra_msr_access)
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x86_pmu.lbr_sel_map = NULL;
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}
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}
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/* Support full width counters using alternative MSR range */
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if (x86_pmu.intel_cap.full_width_write) {
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x86_pmu.max_period = x86_pmu.cntval_mask;
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@ -311,9 +311,11 @@ static int alloc_bts_buffer(int cpu)
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if (!x86_pmu.bts)
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return 0;
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buffer = kzalloc_node(BTS_BUFFER_SIZE, GFP_KERNEL, node);
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if (unlikely(!buffer))
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buffer = kzalloc_node(BTS_BUFFER_SIZE, GFP_KERNEL | __GFP_NOWARN, node);
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if (unlikely(!buffer)) {
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WARN_ONCE(1, "%s: BTS buffer allocation failure\n", __func__);
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return -ENOMEM;
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}
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max = BTS_BUFFER_SIZE / BTS_RECORD_SIZE;
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thresh = max / 16;
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@ -550,16 +550,16 @@ static struct extra_reg snbep_uncore_cbox_extra_regs[] = {
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SNBEP_CBO_EVENT_EXTRA_REG(0x4134, 0xffff, 0x6),
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SNBEP_CBO_EVENT_EXTRA_REG(0x0135, 0xffff, 0x8),
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SNBEP_CBO_EVENT_EXTRA_REG(0x0335, 0xffff, 0x8),
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SNBEP_CBO_EVENT_EXTRA_REG(0x4135, 0xffff, 0xc),
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SNBEP_CBO_EVENT_EXTRA_REG(0x4335, 0xffff, 0xc),
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SNBEP_CBO_EVENT_EXTRA_REG(0x4135, 0xffff, 0xa),
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SNBEP_CBO_EVENT_EXTRA_REG(0x4335, 0xffff, 0xa),
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SNBEP_CBO_EVENT_EXTRA_REG(0x4435, 0xffff, 0x2),
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SNBEP_CBO_EVENT_EXTRA_REG(0x4835, 0xffff, 0x2),
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SNBEP_CBO_EVENT_EXTRA_REG(0x4a35, 0xffff, 0x2),
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SNBEP_CBO_EVENT_EXTRA_REG(0x5035, 0xffff, 0x2),
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SNBEP_CBO_EVENT_EXTRA_REG(0x0136, 0xffff, 0x8),
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SNBEP_CBO_EVENT_EXTRA_REG(0x0336, 0xffff, 0x8),
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SNBEP_CBO_EVENT_EXTRA_REG(0x4136, 0xffff, 0xc),
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SNBEP_CBO_EVENT_EXTRA_REG(0x4336, 0xffff, 0xc),
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SNBEP_CBO_EVENT_EXTRA_REG(0x4136, 0xffff, 0xa),
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SNBEP_CBO_EVENT_EXTRA_REG(0x4336, 0xffff, 0xa),
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SNBEP_CBO_EVENT_EXTRA_REG(0x4436, 0xffff, 0x2),
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SNBEP_CBO_EVENT_EXTRA_REG(0x4836, 0xffff, 0x2),
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SNBEP_CBO_EVENT_EXTRA_REG(0x4a36, 0xffff, 0x2),
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@ -1222,6 +1222,7 @@ static struct extra_reg ivt_uncore_cbox_extra_regs[] = {
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SNBEP_CBO_EVENT_EXTRA_REG(SNBEP_CBO_PMON_CTL_TID_EN,
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SNBEP_CBO_PMON_CTL_TID_EN, 0x1),
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SNBEP_CBO_EVENT_EXTRA_REG(0x1031, 0x10ff, 0x2),
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SNBEP_CBO_EVENT_EXTRA_REG(0x1134, 0xffff, 0x4),
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SNBEP_CBO_EVENT_EXTRA_REG(0x4134, 0xffff, 0xc),
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SNBEP_CBO_EVENT_EXTRA_REG(0x5134, 0xffff, 0xc),
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@ -1245,7 +1246,7 @@ static struct extra_reg ivt_uncore_cbox_extra_regs[] = {
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SNBEP_CBO_EVENT_EXTRA_REG(0x8335, 0xffff, 0x10),
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SNBEP_CBO_EVENT_EXTRA_REG(0x0136, 0xffff, 0x10),
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SNBEP_CBO_EVENT_EXTRA_REG(0x0336, 0xffff, 0x10),
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SNBEP_CBO_EVENT_EXTRA_REG(0x2336, 0xffff, 0x10),
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SNBEP_CBO_EVENT_EXTRA_REG(0x2136, 0xffff, 0x10),
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SNBEP_CBO_EVENT_EXTRA_REG(0x2336, 0xffff, 0x10),
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SNBEP_CBO_EVENT_EXTRA_REG(0x4136, 0xffff, 0x18),
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SNBEP_CBO_EVENT_EXTRA_REG(0x4336, 0xffff, 0x18),
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@ -574,6 +574,9 @@ int kprobe_int3_handler(struct pt_regs *regs)
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struct kprobe *p;
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struct kprobe_ctlblk *kcb;
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if (user_mode_vm(regs))
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return 0;
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addr = (kprobe_opcode_t *)(regs->ip - sizeof(kprobe_opcode_t));
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/*
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* We don't want to be preempted for the entire
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@ -7458,7 +7458,19 @@ __perf_event_exit_task(struct perf_event *child_event,
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struct perf_event_context *child_ctx,
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struct task_struct *child)
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{
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perf_remove_from_context(child_event, true);
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/*
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* Do not destroy the 'original' grouping; because of the context
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* switch optimization the original events could've ended up in a
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* random child task.
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*
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* If we were to destroy the original group, all group related
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* operations would cease to function properly after this random
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* child dies.
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*
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* Do destroy all inherited groups, we don't care about those
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* and being thorough is better.
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*/
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perf_remove_from_context(child_event, !!child_event->parent);
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/*
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* It can happen that the parent exits first, and has events
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@ -7474,7 +7486,7 @@ __perf_event_exit_task(struct perf_event *child_event,
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static void perf_event_exit_task_context(struct task_struct *child, int ctxn)
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{
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struct perf_event *child_event, *next;
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struct perf_event_context *child_ctx;
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struct perf_event_context *child_ctx, *parent_ctx;
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unsigned long flags;
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if (likely(!child->perf_event_ctxp[ctxn])) {
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@ -7499,6 +7511,15 @@ static void perf_event_exit_task_context(struct task_struct *child, int ctxn)
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raw_spin_lock(&child_ctx->lock);
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task_ctx_sched_out(child_ctx);
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child->perf_event_ctxp[ctxn] = NULL;
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/*
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* In order to avoid freeing: child_ctx->parent_ctx->task
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* under perf_event_context::lock, grab another reference.
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*/
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parent_ctx = child_ctx->parent_ctx;
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if (parent_ctx)
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get_ctx(parent_ctx);
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/*
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* If this context is a clone; unclone it so it can't get
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* swapped to another process while we're removing all
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@ -7508,6 +7529,13 @@ static void perf_event_exit_task_context(struct task_struct *child, int ctxn)
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update_context_time(child_ctx);
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raw_spin_unlock_irqrestore(&child_ctx->lock, flags);
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/*
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* Now that we no longer hold perf_event_context::lock, drop
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* our extra child_ctx->parent_ctx reference.
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*/
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if (parent_ctx)
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put_ctx(parent_ctx);
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/*
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* Report the task dead after unscheduling the events so that we
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* won't get any samples after PERF_RECORD_EXIT. We can however still
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@ -2037,19 +2037,23 @@ static int __init populate_kprobe_blacklist(unsigned long *start,
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{
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unsigned long *iter;
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struct kprobe_blacklist_entry *ent;
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unsigned long offset = 0, size = 0;
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unsigned long entry, offset = 0, size = 0;
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for (iter = start; iter < end; iter++) {
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if (!kallsyms_lookup_size_offset(*iter, &size, &offset)) {
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pr_err("Failed to find blacklist %p\n", (void *)*iter);
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entry = arch_deref_entry_point((void *)*iter);
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if (!kernel_text_address(entry) ||
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!kallsyms_lookup_size_offset(entry, &size, &offset)) {
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pr_err("Failed to find blacklist at %p\n",
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(void *)entry);
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continue;
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}
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ent = kmalloc(sizeof(*ent), GFP_KERNEL);
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if (!ent)
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return -ENOMEM;
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ent->start_addr = *iter;
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ent->end_addr = *iter + size;
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ent->start_addr = entry;
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ent->end_addr = entry + size;
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INIT_LIST_HEAD(&ent->list);
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list_add_tail(&ent->list, &kprobe_blacklist);
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}
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