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arm64: dts: imx8mp: Add MEDIAMIX power domains
Add the power domains related to the MEDIAMIX to the GPC. Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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parent
2ae42e0c0b
commit
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@ -523,6 +523,11 @@
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#address-cells = <1>;
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#size-cells = <0>;
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pgc_mipi_phy1: power-domain@0 {
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#power-domain-cells = <0>;
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reg = <IMX8MP_POWER_DOMAIN_MIPI_PHY1>;
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};
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pgc_pcie_phy: power-domain@1 {
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#power-domain-cells = <0>;
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reg = <IMX8MP_POWER_DOMAIN_PCIE_PHY>;
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@ -565,6 +570,18 @@
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power-domains = <&pgc_gpumix>;
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};
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pgc_mediamix: power-domain@10 {
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#power-domain-cells = <0>;
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reg = <IMX8MP_POWER_DOMAIN_MEDIAMIX>;
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clocks = <&clk IMX8MP_CLK_MEDIA_AXI_ROOT>,
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<&clk IMX8MP_CLK_MEDIA_APB_ROOT>;
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};
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pgc_mipi_phy2: power-domain@16 {
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#power-domain-cells = <0>;
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reg = <IMX8MP_POWER_DOMAIN_MIPI_PHY2>;
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};
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pgc_hsiomix: power-domains@17 {
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#power-domain-cells = <0>;
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reg = <IMX8MP_POWER_DOMAIN_HSIOMIX>;
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@ -574,6 +591,12 @@
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assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_500M>;
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assigned-clock-rates = <500000000>;
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};
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pgc_ispdwp: power-domain@18 {
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#power-domain-cells = <0>;
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reg = <IMX8MP_POWER_DOMAIN_MEDIAMIX_ISPDWP>;
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clocks = <&clk IMX8MP_CLK_MEDIA_ISP_DIV>;
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};
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};
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};
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};
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