irq_remapping/vt-d: Init all MSI entries not just the first one

Commit b106ee63ab ("irq_remapping/vt-d: Enhance Intel IR driver to
support hierarchical irqdomains") caused a regression, which forgot
to initialize remapping data structures other than the first entry
when setting up remapping entries for multiple MSIs.

[ Jiang: Commit message ]

Fixes: b106ee63ab ("irq_remapping/vt-d: Enhance Intel IR driver to support hierarchical irqdomains")
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com>
Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Cc: David Cohen <david.a.cohen@linux.intel.com>
Cc: Sander Eikelenboom <linux@eikelenboom.it>
Cc: David Vrabel <david.vrabel@citrix.com>
Cc: Tony Luck <tony.luck@intel.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: iommu@lists.linux-foundation.org
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Rafael J. Wysocki <rjw@rjwysocki.net>
Cc: Randy Dunlap <rdunlap@infradead.org>
Cc: Yinghai Lu <yinghai@kernel.org>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Dimitri Sivanich <sivanich@sgi.com>
Cc: Joerg Roedel <joro@8bytes.org>
Link: http://lkml.kernel.org/r/1430707662-28598-2-git-send-email-jiang.liu@linux.intel.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
This commit is contained in:
Thomas Gleixner 2015-05-04 10:47:40 +08:00
parent f7fa7aeeec
commit 9d4c0313f2

View File

@ -1113,7 +1113,7 @@ static int intel_irq_remapping_alloc(struct irq_domain *domain,
{
struct intel_iommu *iommu = domain->host_data;
struct irq_alloc_info *info = arg;
struct intel_ir_data *data;
struct intel_ir_data *data, *ird;
struct irq_data *irq_data;
struct irq_cfg *irq_cfg;
int i, ret, index;
@ -1158,14 +1158,20 @@ static int intel_irq_remapping_alloc(struct irq_domain *domain,
}
if (i > 0) {
data = kzalloc(sizeof(*data), GFP_KERNEL);
if (!data)
ird = kzalloc(sizeof(*ird), GFP_KERNEL);
if (!ird)
goto out_free_data;
/* Initialize the common data */
ird->irq_2_iommu = data->irq_2_iommu;
ird->irq_2_iommu.sub_handle = i;
} else {
ird = data;
}
irq_data->hwirq = (index << 16) + i;
irq_data->chip_data = data;
irq_data->chip_data = ird;
irq_data->chip = &intel_ir_chip;
intel_irq_remapping_prepare_irte(data, irq_cfg, info, index, i);
intel_irq_remapping_prepare_irte(ird, irq_cfg, info, index, i);
irq_set_status_flags(virq + i, IRQ_MOVE_PCNTXT);
}
return 0;