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intel-iommu: VT-d page table to support snooping control bit
The user can request to enable snooping control through VT-d page table. Signed-off-by: Sheng Yang <sheng@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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@ -164,7 +164,8 @@ static inline void context_clear_entry(struct context_entry *context)
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* 1: writable
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* 2-6: reserved
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* 7: super page
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* 8-11: available
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* 8-10: available
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* 11: snoop behavior
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* 12-63: Host physcial address
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*/
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struct dma_pte {
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@ -186,6 +187,11 @@ static inline void dma_set_pte_writable(struct dma_pte *pte)
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pte->val |= DMA_PTE_WRITE;
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}
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static inline void dma_set_pte_snp(struct dma_pte *pte)
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{
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pte->val |= DMA_PTE_SNP;
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}
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static inline void dma_set_pte_prot(struct dma_pte *pte, unsigned long prot)
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{
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pte->val = (pte->val & ~3) | (prot & 3);
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@ -1685,6 +1691,8 @@ domain_page_mapping(struct dmar_domain *domain, dma_addr_t iova,
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BUG_ON(dma_pte_addr(pte));
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dma_set_pte_addr(pte, start_pfn << VTD_PAGE_SHIFT);
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dma_set_pte_prot(pte, prot);
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if (prot & DMA_PTE_SNP)
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dma_set_pte_snp(pte);
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domain_flush_cache(domain, pte, sizeof(*pte));
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start_pfn++;
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index++;
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@ -3105,6 +3113,8 @@ static int intel_iommu_map_range(struct iommu_domain *domain,
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prot |= DMA_PTE_READ;
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if (iommu_prot & IOMMU_WRITE)
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prot |= DMA_PTE_WRITE;
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if ((iommu_prot & IOMMU_CACHE) && dmar_domain->iommu_snooping)
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prot |= DMA_PTE_SNP;
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max_addr = (iova & VTD_PAGE_MASK) + VTD_PAGE_ALIGN(size);
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if (dmar_domain->max_addr < max_addr) {
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@ -11,6 +11,7 @@
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#define DMA_PTE_READ (1)
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#define DMA_PTE_WRITE (2)
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#define DMA_PTE_SNP (1 << 11)
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struct intel_iommu;
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struct dmar_domain;
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@ -21,6 +21,7 @@
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#define IOMMU_READ (1)
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#define IOMMU_WRITE (2)
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#define IOMMU_CACHE (4) /* DMA cache coherency */
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struct device;
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