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Merge branch 'acpica'
Merge ACPICA updates for 5.16-rc1: - Fix system-wide resume issue caused by evaluating control methods too early in the resume path (Rafael Wysocki). - Add support for Windows 2020 _OSI string (Mario Limonciello). - Add Generic Port Affinity type for SRAT (Alison Schofield). - Add disassembly support for the NHLT ACPI table (Bob Moore). * acpica: ACPICA: Update version to 20210930 ACPICA: iASL table disassembler: Added disassembly support for the NHLT ACPI table ACPICA: ACPI 6.4 SRAT: add Generic Port Affinity type ACPICA: Add support for Windows 2020 _OSI string ACPICA: Avoid evaluating methods too early during system resume
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commit
9cb31aa155
@ -226,6 +226,8 @@ extern struct acpi_bit_register_info
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acpi_gbl_bit_register_info[ACPI_NUM_BITREG];
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ACPI_GLOBAL(u8, acpi_gbl_sleep_type_a);
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ACPI_GLOBAL(u8, acpi_gbl_sleep_type_b);
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ACPI_GLOBAL(u8, acpi_gbl_sleep_type_a_s0);
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ACPI_GLOBAL(u8, acpi_gbl_sleep_type_b_s0);
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/*****************************************************************************
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*
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@ -147,17 +147,13 @@ acpi_status acpi_hw_extended_sleep(u8 sleep_state)
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acpi_status acpi_hw_extended_wake_prep(u8 sleep_state)
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{
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acpi_status status;
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u8 sleep_type_value;
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ACPI_FUNCTION_TRACE(hw_extended_wake_prep);
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status = acpi_get_sleep_type_data(ACPI_STATE_S0,
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&acpi_gbl_sleep_type_a,
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&acpi_gbl_sleep_type_b);
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if (ACPI_SUCCESS(status)) {
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if (acpi_gbl_sleep_type_a_s0 != ACPI_SLEEP_TYPE_INVALID) {
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sleep_type_value =
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((acpi_gbl_sleep_type_a << ACPI_X_SLEEP_TYPE_POSITION) &
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((acpi_gbl_sleep_type_a_s0 << ACPI_X_SLEEP_TYPE_POSITION) &
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ACPI_X_SLEEP_TYPE_MASK);
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(void)acpi_write((u64)(sleep_type_value | ACPI_X_SLEEP_ENABLE),
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@ -179,7 +179,7 @@ acpi_status acpi_hw_legacy_sleep(u8 sleep_state)
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acpi_status acpi_hw_legacy_wake_prep(u8 sleep_state)
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{
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acpi_status status;
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acpi_status status = AE_OK;
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struct acpi_bit_register_info *sleep_type_reg_info;
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struct acpi_bit_register_info *sleep_enable_reg_info;
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u32 pm1a_control;
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@ -192,10 +192,7 @@ acpi_status acpi_hw_legacy_wake_prep(u8 sleep_state)
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* This is unclear from the ACPI Spec, but it is required
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* by some machines.
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*/
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status = acpi_get_sleep_type_data(ACPI_STATE_S0,
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&acpi_gbl_sleep_type_a,
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&acpi_gbl_sleep_type_b);
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if (ACPI_SUCCESS(status)) {
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if (acpi_gbl_sleep_type_a_s0 != ACPI_SLEEP_TYPE_INVALID) {
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sleep_type_reg_info =
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acpi_hw_get_bit_register_info(ACPI_BITREG_SLEEP_TYPE);
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sleep_enable_reg_info =
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@ -216,9 +213,9 @@ acpi_status acpi_hw_legacy_wake_prep(u8 sleep_state)
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/* Insert the SLP_TYP bits */
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pm1a_control |= (acpi_gbl_sleep_type_a <<
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pm1a_control |= (acpi_gbl_sleep_type_a_s0 <<
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sleep_type_reg_info->bit_position);
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pm1b_control |= (acpi_gbl_sleep_type_b <<
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pm1b_control |= (acpi_gbl_sleep_type_b_s0 <<
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sleep_type_reg_info->bit_position);
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/* Write the control registers and ignore any errors */
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@ -217,6 +217,13 @@ acpi_status acpi_enter_sleep_state_prep(u8 sleep_state)
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return_ACPI_STATUS(status);
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}
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status = acpi_get_sleep_type_data(ACPI_STATE_S0,
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&acpi_gbl_sleep_type_a_s0,
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&acpi_gbl_sleep_type_b_s0);
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if (ACPI_FAILURE(status)) {
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acpi_gbl_sleep_type_a_s0 = ACPI_SLEEP_TYPE_INVALID;
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}
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/* Execute the _PTS method (Prepare To Sleep) */
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arg_list.count = 1;
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@ -73,6 +73,7 @@ static struct acpi_interface_info acpi_default_supported_interfaces[] = {
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{"Windows 2018", NULL, 0, ACPI_OSI_WIN_10_RS4}, /* Windows 10 version 1803 - Added 11/2018 */
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{"Windows 2018.2", NULL, 0, ACPI_OSI_WIN_10_RS5}, /* Windows 10 version 1809 - Added 11/2018 */
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{"Windows 2019", NULL, 0, ACPI_OSI_WIN_10_19H1}, /* Windows 10 version 1903 - Added 08/2019 */
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{"Windows 2020", NULL, 0, ACPI_OSI_WIN_10_20H1}, /* Windows 10 version 2004 - Added 08/2021 */
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/* Feature Group Strings */
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@ -12,7 +12,7 @@
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/* Current ACPICA subsystem version in YYYYMMDD format */
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#define ACPI_CA_VERSION 0x20210730
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#define ACPI_CA_VERSION 0x20210930
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#include <acpi/acconfig.h>
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#include <acpi/actypes.h>
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@ -35,6 +35,7 @@
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#define ACPI_SIG_MSCT "MSCT" /* Maximum System Characteristics Table */
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#define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */
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#define ACPI_SIG_NFIT "NFIT" /* NVDIMM Firmware Interface Table */
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#define ACPI_SIG_NHLT "NHLT" /* Non HD Audio Link Table */
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#define ACPI_SIG_PCCT "PCCT" /* Platform Communications Channel Table */
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#define ACPI_SIG_PDTT "PDTT" /* Platform Debug Trigger Table */
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#define ACPI_SIG_PHAT "PHAT" /* Platform Health Assessment Table */
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@ -46,7 +47,6 @@
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#define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */
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#define ACPI_SIG_SDEI "SDEI" /* Software Delegated Exception Interface Table */
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#define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */
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#define ACPI_SIG_NHLT "NHLT" /* Non-HDAudio Link Table */
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#define ACPI_SIG_SVKL "SVKL" /* Storage Volume Key Location Table */
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/*
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@ -1409,6 +1409,254 @@ struct nfit_device_handle {
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#define ACPI_NFIT_GET_NODE_ID(handle) \
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(((handle) & ACPI_NFIT_NODE_ID_MASK) >> ACPI_NFIT_NODE_ID_OFFSET)
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/*******************************************************************************
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*
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* NHLT - Non HD Audio Link Table
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*
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* Conforms to: Intel Smart Sound Technology NHLT Specification
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* Version 0.8.1, January 2020.
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*
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******************************************************************************/
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/* Main table */
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struct acpi_table_nhlt {
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struct acpi_table_header header; /* Common ACPI table header */
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u8 endpoint_count;
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};
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struct acpi_nhlt_endpoint {
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u32 descriptor_length;
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u8 link_type;
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u8 instance_id;
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u16 vendor_id;
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u16 device_id;
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u16 revision_id;
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u32 subsystem_id;
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u8 device_type;
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u8 direction;
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u8 virtual_bus_id;
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};
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/* Types for link_type field above */
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#define ACPI_NHLT_RESERVED_HD_AUDIO 0
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#define ACPI_NHLT_RESERVED_DSP 1
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#define ACPI_NHLT_PDM 2
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#define ACPI_NHLT_SSP 3
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#define ACPI_NHLT_RESERVED_SLIMBUS 4
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#define ACPI_NHLT_RESERVED_SOUNDWIRE 5
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#define ACPI_NHLT_TYPE_RESERVED 6 /* 6 and above are reserved */
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/* All other values above are reserved */
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/* Values for device_id field above */
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#define ACPI_NHLT_PDM_DMIC 0xAE20
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#define ACPI_NHLT_BT_SIDEBAND 0xAE30
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#define ACPI_NHLT_I2S_TDM_CODECS 0xAE23
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/* Values for device_type field above */
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/* SSP Link */
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#define ACPI_NHLT_LINK_BT_SIDEBAND 0
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#define ACPI_NHLT_LINK_FM 1
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#define ACPI_NHLT_LINK_MODEM 2
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/* 3 is reserved */
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#define ACPI_NHLT_LINK_SSP_ANALOG_CODEC 4
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/* PDM Link */
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#define ACPI_NHLT_PDM_ON_CAVS_1P8 0
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#define ACPI_NHLT_PDM_ON_CAVS_1P5 1
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/* Values for Direction field above */
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#define ACPI_NHLT_DIR_RENDER 0
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#define ACPI_NHLT_DIR_CAPTURE 1
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#define ACPI_NHLT_DIR_RENDER_LOOPBACK 2
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#define ACPI_NHLT_DIR_RENDER_FEEDBACK 3
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#define ACPI_NHLT_DIR_RESERVED 4 /* 4 and above are reserved */
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struct acpi_nhlt_device_specific_config {
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u32 capabilities_size;
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u8 virtual_slot;
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u8 config_type;
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};
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struct acpi_nhlt_device_specific_config_a {
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u32 capabilities_size;
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u8 virtual_slot;
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u8 config_type;
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u8 array_type;
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};
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/* Values for Config Type above */
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#define ACPI_NHLT_TYPE_MIC_ARRAY 0x01
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#define ACPI_NHLT_TYPE_GENERIC 0x00
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/* Mask for Extension field of array_type */
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#define ACPI_NHLT_ARRAY_TYPE_MASK 0x10
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struct acpi_nhlt_device_specific_config_b {
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u32 capabilities_size;
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};
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struct acpi_nhlt_device_specific_config_c {
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u32 capabilities_size;
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u8 virtual_slot;
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};
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struct acpi_nhlt_wave_extensible {
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u16 format_tag;
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u16 channel_count;
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u32 samples_per_sec;
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u32 avg_bytes_per_sec;
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u16 block_align;
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u16 bits_per_sample;
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u16 extra_format_size;
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u16 valid_bits_per_sample;
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u32 channel_mask;
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u8 sub_format_guid[16];
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};
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/* Values for channel_mask above */
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#define ACPI_NHLT_SPKR_FRONT_LEFT 0x1
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#define ACPI_NHLT_SPKR_FRONT_RIGHT 0x2
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#define ACPI_NHLT_SPKR_FRONT_CENTER 0x4
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#define ACPI_NHLT_SPKR_LOW_FREQ 0x8
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#define ACPI_NHLT_SPKR_BACK_LEFT 0x10
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#define ACPI_NHLT_SPKR_BACK_RIGHT 0x20
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#define ACPI_NHLT_SPKR_FRONT_LEFT_OF_CENTER 0x40
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#define ACPI_NHLT_SPKR_FRONT_RIGHT_OF_CENTER 0x80
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#define ACPI_NHLT_SPKR_BACK_CENTER 0x100
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#define ACPI_NHLT_SPKR_SIDE_LEFT 0x200
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#define ACPI_NHLT_SPKR_SIDE_RIGHT 0x400
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#define ACPI_NHLT_SPKR_TOP_CENTER 0x800
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#define ACPI_NHLT_SPKR_TOP_FRONT_LEFT 0x1000
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#define ACPI_NHLT_SPKR_TOP_FRONT_CENTER 0x2000
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#define ACPI_NHLT_SPKR_TOP_FRONT_RIGHT 0x4000
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#define ACPI_NHLT_SPKR_TOP_BACK_LEFT 0x8000
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#define ACPI_NHLT_SPKR_TOP_BACK_CENTER 0x10000
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#define ACPI_NHLT_SPKR_TOP_BACK_RIGHT 0x20000
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struct acpi_nhlt_format_config {
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struct acpi_nhlt_wave_extensible format;
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u32 capability_size;
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u8 capabilities[];
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};
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struct acpi_nhlt_formats_config {
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u8 formats_count;
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};
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struct acpi_nhlt_device_specific_hdr {
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u8 virtual_slot;
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u8 config_type;
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};
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/* Types for config_type above */
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#define ACPI_NHLT_GENERIC 0
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#define ACPI_NHLT_MIC 1
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#define ACPI_NHLT_RENDER 3
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struct acpi_nhlt_mic_device_specific_config {
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struct acpi_nhlt_device_specific_hdr device_config;
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u8 array_type_ext;
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};
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/* Values for array_type_ext above */
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#define SMALL_LINEAR_2ELEMENT 0x0A
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#define BIG_LINEAR_2ELEMENT 0x0B
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#define FIRST_GEOMETRY_LINEAR_4ELEMENT 0x0C
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#define PLANAR_LSHAPED_4ELEMENT 0x0D
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#define SECOND_GEOMETRY_LINEAR_4ELEMENT 0x0E
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#define VENDOR_DEFINED 0x0F
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#define ARRAY_TYPE_MASK 0x0F
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#define ARRAY_TYPE_EXT_MASK 0x10
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#define NO_EXTENSION 0x0
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#define MIC_SNR_SENSITIVITY_EXT 0x1
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struct acpi_nhlt_vendor_mic_config {
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u8 type;
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u8 panel;
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u16 speaker_position_distance; // mm
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u16 horizontal_offset; // mm
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u16 vertical_offset; // mm
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u8 frequency_low_band; // 5*hz
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u8 frequency_high_band; // 500*hz
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u16 direction_angle; // -180 - + 180
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u16 elevation_angle; // -180 - + 180
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u16 work_vertical_angle_begin; // -180 - + 180 with 2 deg step
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u16 work_vertical_angle_end; // -180 - + 180 with 2 deg step
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u16 work_horizontal_angle_begin; // -180 - + 180 with 2 deg step
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u16 work_horizontal_angle_end; // -180 - + 180 with 2 deg step
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};
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/* Values for Type field above */
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#define MIC_OMNIDIRECTIONAL 0
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#define MIC_SUBCARDIOID 1
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#define MIC_CARDIOID 2
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#define MIC_SUPER_CARDIOID 3
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#define MIC_HYPER_CARDIOID 4
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#define MIC_8_SHAPED 5
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#define MIC_VENDOR_DEFINED 7
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/* Values for Panel field above */
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#define MIC_TOP 0
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#define MIC_BOTTOM 1
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#define MIC_LEFT 2
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#define MIC_RIGHT 3
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#define MIC_FRONT 4
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#define MIC_REAR 5
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struct acpi_nhlt_vendor_mic_device_specific_config {
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struct acpi_nhlt_mic_device_specific_config mic_array_device_config;
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u8 number_of_microphones;
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struct acpi_nhlt_vendor_mic_config mic_config[]; // indexed by number_of_microphones
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};
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/* Microphone SNR and Sensitivity extension */
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struct acpi_nhlt_mic_snr_sensitivity_extension {
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u32 SNR;
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u32 sensitivity;
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};
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struct acpi_nhlt_render_feedback_device_specific_config {
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struct acpi_nhlt_device_specific_config device_config;
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u8 feedback_virtual_slot; // render slot in case of capture
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u16 feedback_channels; // informative only
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u16 feedback_valid_bits_per_sample;
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};
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/* Linux-specific structures */
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struct acpi_nhlt_linux_specific_count {
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u8 structure_count;
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};
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struct acpi_nhlt_linux_specific_data {
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u8 device_id[16];
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u8 device_instance_id;
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u8 device_port_id;
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u8 filler[18];
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};
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struct acpi_nhlt_table_terminator {
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u32 terminator_value;
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u32 terminator_signature;
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};
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/*******************************************************************************
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*
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* PCCT - Platform Communications Channel Table (ACPI 5.0)
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@ -191,7 +191,8 @@ enum acpi_srat_type {
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ACPI_SRAT_TYPE_GICC_AFFINITY = 3,
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ACPI_SRAT_TYPE_GIC_ITS_AFFINITY = 4, /* ACPI 6.2 */
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ACPI_SRAT_TYPE_GENERIC_AFFINITY = 5, /* ACPI 6.3 */
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ACPI_SRAT_TYPE_RESERVED = 6 /* 5 and greater are reserved */
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ACPI_SRAT_TYPE_GENERIC_PORT_AFFINITY = 6, /* ACPI 6.4 */
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ACPI_SRAT_TYPE_RESERVED = 7 /* 7 and greater are reserved */
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};
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/*
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@ -272,7 +273,11 @@ struct acpi_srat_gic_its_affinity {
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u32 its_id;
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};
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/* 5: Generic Initiator Affinity Structure (ACPI 6.3) */
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/*
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* Common structure for SRAT subtable types:
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* 5: ACPI_SRAT_TYPE_GENERIC_AFFINITY
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* 6: ACPI_SRAT_TYPE_GENERIC_PORT_AFFINITY
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*/
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struct acpi_srat_generic_affinity {
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struct acpi_subtable_header header;
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@ -1281,6 +1281,7 @@ typedef enum {
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#define ACPI_OSI_WIN_10_RS4 0x12
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#define ACPI_OSI_WIN_10_RS5 0x13
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#define ACPI_OSI_WIN_10_19H1 0x14
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#define ACPI_OSI_WIN_10_20H1 0x15
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/* Definitions of getopt */
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