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cache: ax45mp_cache: Align end size to cache boundary in ax45mp_dma_cache_wback()
Align the end size to cache boundary size in ax45mp_dma_cache_wback()
callback likewise done in ax45mp_dma_cache_inv() callback.
Additionally return early in case of start == end.
Fixes: d34599bcd2
("cache: Add L2 cache management for Andes AX45MP RISC-V core")
Reported-by: Pavel Machek <pavel@denx.de>
Link: https://lore.kernel.org/cip-dev/ZYsdKDiw7G+kxQ3m@duo.ucw.cz/
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
This commit is contained in:
parent
6613476e22
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9bd405c48b
4
drivers/cache/ax45mp_cache.c
vendored
4
drivers/cache/ax45mp_cache.c
vendored
@ -129,8 +129,12 @@ static void ax45mp_dma_cache_wback(phys_addr_t paddr, size_t size)
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unsigned long line_size;
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unsigned long flags;
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if (unlikely(start == end))
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return;
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line_size = ax45mp_priv.ax45mp_cache_line_size;
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start = start & (~(line_size - 1));
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end = ((end + line_size - 1) & (~(line_size - 1)));
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local_irq_save(flags);
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ax45mp_cpu_dcache_wb_range(start, end);
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local_irq_restore(flags);
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