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arm64: dts: renesas: rcar-gen3: Convert EtherAVB to explicit delay handling
Some EtherAVB variants support internal clock delay configuration, which can add larger delays than the delays that are typically supported by the PHY (using an "rgmii-*id" PHY mode, and/or "[rt]xc-skew-ps" properties). Historically, the EtherAVB driver configured these delays based on the "rgmii-*id" PHY mode. This was wrong, as these are meant solely for the PHY, not for the MAC. Hence properties were introduced for explicit configuration of these delays. Convert the R-Car Gen3 DTS files from the old to the new scheme: - Add default "rx-internal-delay-ps" and "tx-internal-delay-ps" properties to the SoC .dtsi files, to be overridden by board files where needed, - Convert board files from "rgmii-*id" PHY modes to "rgmii", adding the appropriate "rx-internal-delay-ps" and/or "tx-internal-delay-ps" overrides. Notes: - R-Car E3 and D3 do not support TX internal delay handling, - On R-Car D3, TX internal delay handling must always be enabled, hence this fixes a bug on Draak, - On R-Car V3H, RX internal delay handling must always be enabled. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20200819134344.27813-7-geert+renesas@glider.be
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@ -1250,6 +1250,8 @@
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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resets = <&cpg 812>;
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phy-mode = "rgmii";
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rx-internal-delay-ps = <0>;
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tx-internal-delay-ps = <0>;
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iommus = <&ipmmu_ds0 16>;
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#address-cells = <1>;
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#size-cells = <0>;
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@ -1126,6 +1126,8 @@
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power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
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resets = <&cpg 812>;
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phy-mode = "rgmii";
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rx-internal-delay-ps = <0>;
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tx-internal-delay-ps = <0>;
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iommus = <&ipmmu_ds0 16>;
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#address-cells = <1>;
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#size-cells = <0>;
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@ -1012,6 +1012,8 @@
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power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
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resets = <&cpg 812>;
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phy-mode = "rgmii";
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rx-internal-delay-ps = <0>;
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tx-internal-delay-ps = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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@ -988,6 +988,8 @@
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power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
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resets = <&cpg 812>;
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phy-mode = "rgmii";
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rx-internal-delay-ps = <0>;
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tx-internal-delay-ps = <0>;
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iommus = <&ipmmu_ds0 16>;
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#address-cells = <1>;
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#size-cells = <0>;
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@ -81,7 +81,8 @@
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renesas,no-ether-link;
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phy-handle = <&phy0>;
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phy-mode = "rgmii-id";
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rx-internal-delay-ps = <1800>;
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tx-internal-delay-ps = <2000>;
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status = "okay";
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phy0: ethernet-phy@0 {
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@ -102,7 +102,8 @@
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renesas,no-ether-link;
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phy-handle = <&phy0>;
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phy-mode = "rgmii-id";
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rx-internal-delay-ps = <1800>;
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tx-internal-delay-ps = <2000>;
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status = "okay";
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phy0: ethernet-phy@0 {
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@ -615,6 +615,8 @@
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power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
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resets = <&cpg 812>;
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phy-mode = "rgmii";
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rx-internal-delay-ps = <0>;
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tx-internal-delay-ps = <0>;
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iommus = <&ipmmu_rt 3>;
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#address-cells = <1>;
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#size-cells = <0>;
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@ -667,6 +667,8 @@
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power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
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resets = <&cpg 812>;
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phy-mode = "rgmii";
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rx-internal-delay-ps = <0>;
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tx-internal-delay-ps = <2000>;
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iommus = <&ipmmu_ds1 33>;
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#address-cells = <1>;
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#size-cells = <0>;
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@ -938,6 +938,7 @@
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power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
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resets = <&cpg 812>;
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phy-mode = "rgmii";
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rx-internal-delay-ps = <0>;
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iommus = <&ipmmu_ds0 16>;
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#address-cells = <1>;
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#size-cells = <0>;
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@ -628,6 +628,7 @@
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power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
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resets = <&cpg 812>;
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phy-mode = "rgmii";
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rx-internal-delay-ps = <1800>;
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iommus = <&ipmmu_ds0 16>;
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#address-cells = <1>;
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#size-cells = <0>;
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@ -324,7 +324,7 @@
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pinctrl-0 = <&avb_pins>;
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pinctrl-names = "default";
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phy-handle = <&phy0>;
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phy-mode = "rgmii-txid";
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tx-internal-delay-ps = <2000>;
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status = "okay";
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phy0: ethernet-phy@0 {
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@ -144,7 +144,7 @@
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pinctrl-0 = <&avb_pins>;
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pinctrl-names = "default";
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phy-handle = <&phy0>;
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phy-mode = "rgmii-txid";
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tx-internal-delay-ps = <2000>;
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status = "okay";
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phy0: ethernet-phy@0 {
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