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MIPS: mobileye: eyeq5: add OLB system-controller node
The OLB ("Other Logic Block") is a system-controller region hosting
clock, reset and pin controllers. It contains registers such as I2C
speed mode that need to be accessible by other nodes.
Remove fixed-clocks previously used; replace references.
Add parent crystal clock, fixed at 30MHz.
Add pin nodes for all functions.
Add mobileye,eyeq5-olb compatible node, hosting clk, reset and pinctrl.
Add reset and pinctrl references to UART nodes.
Signed-off-by: Théo Lebrun <theo.lebrun@bootlin.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
This commit is contained in:
Théo Lebrun
Thomas Bogendoerfer
parent
bde4b22dc5
commit
9b7e81a9bf
@ -3,42 +3,20 @@
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* Copyright 2023 Mobileye Vision Technologies Ltd.
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*/
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#include <dt-bindings/clock/mobileye,eyeq5-clk.h>
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/ {
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/* Fixed clock */
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pll_cpu: pll-cpu {
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xtal: xtal {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <1500000000>;
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};
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pll_vdi: pll-vdi {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <1280000000>;
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};
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pll_per: pll-per {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <2000000000>;
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};
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pll_ddr0: pll-ddr0 {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <1857210000>;
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};
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pll_ddr1: pll-ddr1 {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <1857210000>;
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clock-frequency = <30000000>;
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};
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/* PLL_CPU derivatives */
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occ_cpu: occ-cpu {
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compatible = "fixed-factor-clock";
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clocks = <&pll_cpu>;
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clocks = <&olb EQ5C_PLL_CPU>;
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#clock-cells = <0>;
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clock-div = <1>;
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clock-mult = <1>;
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@ -101,7 +79,7 @@
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};
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occ_isram: occ-isram {
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compatible = "fixed-factor-clock";
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clocks = <&pll_cpu>;
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clocks = <&olb EQ5C_PLL_CPU>;
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#clock-cells = <0>;
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clock-div = <2>;
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clock-mult = <1>;
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@ -115,7 +93,7 @@
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};
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occ_dbu: occ-dbu {
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compatible = "fixed-factor-clock";
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clocks = <&pll_cpu>;
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clocks = <&olb EQ5C_PLL_CPU>;
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#clock-cells = <0>;
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clock-div = <10>;
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clock-mult = <1>;
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@ -130,7 +108,7 @@
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/* PLL_VDI derivatives */
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occ_vdi: occ-vdi {
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compatible = "fixed-factor-clock";
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clocks = <&pll_vdi>;
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clocks = <&olb EQ5C_PLL_VDI>;
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#clock-cells = <0>;
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clock-div = <2>;
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clock-mult = <1>;
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@ -144,7 +122,7 @@
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};
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occ_can_ser: occ-can-ser {
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compatible = "fixed-factor-clock";
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clocks = <&pll_vdi>;
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clocks = <&olb EQ5C_PLL_VDI>;
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#clock-cells = <0>;
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clock-div = <16>;
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clock-mult = <1>;
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@ -158,7 +136,7 @@
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};
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i2c_ser_clk: i2c-ser-clk {
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compatible = "fixed-factor-clock";
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clocks = <&pll_vdi>;
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clocks = <&olb EQ5C_PLL_VDI>;
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#clock-cells = <0>;
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clock-div = <20>;
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clock-mult = <1>;
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@ -166,7 +144,7 @@
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/* PLL_PER derivatives */
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occ_periph: occ-periph {
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compatible = "fixed-factor-clock";
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clocks = <&pll_per>;
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clocks = <&olb EQ5C_PLL_PER>;
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#clock-cells = <0>;
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clock-div = <16>;
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clock-mult = <1>;
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@ -225,7 +203,7 @@
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};
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emmc_sys_clk: emmc-sys-clk {
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compatible = "fixed-factor-clock";
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clocks = <&pll_per>;
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clocks = <&olb EQ5C_PLL_PER>;
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#clock-cells = <0>;
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clock-div = <10>;
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clock-mult = <1>;
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@ -233,7 +211,7 @@
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};
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ccf_ctrl_clk: ccf-ctrl-clk {
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compatible = "fixed-factor-clock";
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clocks = <&pll_per>;
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clocks = <&olb EQ5C_PLL_PER>;
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#clock-cells = <0>;
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clock-div = <4>;
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clock-mult = <1>;
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@ -241,7 +219,7 @@
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};
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occ_mjpeg_core: occ-mjpeg-core {
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compatible = "fixed-factor-clock";
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clocks = <&pll_per>;
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clocks = <&olb EQ5C_PLL_PER>;
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#clock-cells = <0>;
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clock-div = <2>;
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clock-mult = <1>;
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@ -265,7 +243,7 @@
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};
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fcmu_a_clk: fcmu-a-clk {
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compatible = "fixed-factor-clock";
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clocks = <&pll_per>;
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clocks = <&olb EQ5C_PLL_PER>;
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#clock-cells = <0>;
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clock-div = <20>;
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clock-mult = <1>;
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@ -273,7 +251,7 @@
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};
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occ_pci_sys: occ-pci-sys {
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compatible = "fixed-factor-clock";
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clocks = <&pll_per>;
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clocks = <&olb EQ5C_PLL_PER>;
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#clock-cells = <0>;
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clock-div = <8>;
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clock-mult = <1>;
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125
arch/mips/boot/dts/mobileye/eyeq5-pins.dtsi
Normal file
125
arch/mips/boot/dts/mobileye/eyeq5-pins.dtsi
Normal file
@ -0,0 +1,125 @@
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// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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/*
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* Default pin configuration for Mobileye EyeQ5 boards. We mostly create one
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* pin configuration node per function.
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*/
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&olb {
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timer0_pins: timer0-pins {
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function = "timer0";
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pins = "PA0", "PA1";
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};
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timer1_pins: timer1-pins {
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function = "timer1";
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pins = "PA2", "PA3";
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};
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timer2_pins: timer2-pins {
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function = "timer2";
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pins = "PA4", "PA5";
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};
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pps0_pins: pps0-pin {
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function = "timer2";
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pins = "PA4";
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};
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pps1_pins: pps1-pin {
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function = "timer2";
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pins = "PA5";
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};
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timer5_ext_pins: timer5-ext-pins {
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function = "timer5";
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pins = "PA6", "PA7", "PA8", "PA9";
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};
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timer5_ext_input_pins: timer5-ext-input-pins {
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function = "timer5";
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pins = "PA6", "PA7";
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};
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timer5_ext_incap_a_pins: timer5-ext-incap-a-pin {
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function = "timer5";
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pins = "PA6";
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};
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timer5_ext_incap_b_pins: timer5-ext-incap-b-pin {
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function = "timer5";
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pins = "PA7";
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};
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can0_pins: can0-pins {
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function = "can0";
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pins = "PA14", "PA15";
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};
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can1_pins: can1-pins {
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function = "can1";
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pins = "PA16", "PA17";
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};
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uart0_pins: uart0-pins {
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function = "uart0";
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pins = "PA10", "PA11";
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};
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uart1_pins: uart1-pins {
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function = "uart1";
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pins = "PA12", "PA13";
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};
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spi0_pins: spi0-pins {
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function = "spi0";
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pins = "PA18", "PA19", "PA20", "PA21", "PA22";
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};
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spi1_pins: spi1-pins {
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function = "spi1";
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pins = "PA23", "PA24", "PA25", "PA26", "PA27";
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};
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spi1_slave_pins: spi1-slave-pins {
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function = "spi1";
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pins = "PA24", "PA25", "PA26";
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};
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refclk0_pins: refclk0-pin {
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function = "refclk0";
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pins = "PA28";
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};
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timer3_pins: timer3-pins {
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function = "timer3";
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pins = "PB0", "PB1";
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};
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timer4_pins: timer4-pins {
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function = "timer4";
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pins = "PB2", "PB3";
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};
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timer6_ext_pins: timer6-ext-pins {
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function = "timer6";
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pins = "PB4", "PB5", "PB6", "PB7";
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};
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timer6_ext_input_pins: timer6-ext-input-pins {
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function = "timer6";
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pins = "PB4", "PB5";
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};
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timer6_ext_incap_a_pins: timer6-ext-incap-a-pin {
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function = "timer6";
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pins = "PB4";
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};
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timer6_ext_incap_b_pins: timer6-ext-incap-b-pin {
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function = "timer6";
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pins = "PB5";
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};
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can2_pins: can2-pins {
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function = "can2";
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pins = "PB10", "PB11";
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};
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uart2_pins: uart2-pins {
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function = "uart2";
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pins = "PB8", "PB9";
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};
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spi2_pins: spi2-pins {
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function = "spi2";
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pins = "PB12", "PB13", "PB14", "PB15", "PB16";
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};
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spi3_pins: spi3-pins {
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function = "spi3";
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pins = "PB17", "PB18", "PB19", "PB20", "PB21";
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};
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spi3_slave_pins: spi3-slave-pins {
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function = "spi3";
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pins = "PB18", "PB19", "PB20";
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};
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mclk0_pins: mclk0-pin {
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function = "mclk0";
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pins = "PB22";
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};
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};
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@ -5,7 +5,7 @@
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#include <dt-bindings/interrupt-controller/mips-gic.h>
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#include "eyeq5-fixed-clocks.dtsi"
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#include "eyeq5-clocks.dtsi"
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/ {
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#address-cells = <2>;
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@ -78,6 +78,9 @@
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interrupts = <GIC_SHARED 6 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&uart_clk>, <&occ_periph>;
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clock-names = "uartclk", "apb_pclk";
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resets = <&olb 0 10>;
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pinctrl-names = "default";
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pinctrl-0 = <&uart0_pins>;
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};
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uart1: serial@900000 {
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@ -88,6 +91,9 @@
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interrupts = <GIC_SHARED 6 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&uart_clk>, <&occ_periph>;
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clock-names = "uartclk", "apb_pclk";
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resets = <&olb 0 11>;
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pinctrl-names = "default";
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pinctrl-0 = <&uart1_pins>;
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};
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uart2: serial@a00000 {
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@ -98,6 +104,18 @@
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interrupts = <GIC_SHARED 6 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&uart_clk>, <&occ_periph>;
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clock-names = "uartclk", "apb_pclk";
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resets = <&olb 0 12>;
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pinctrl-names = "default";
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pinctrl-0 = <&uart2_pins>;
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};
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olb: system-controller@e00000 {
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compatible = "mobileye,eyeq5-olb", "syscon";
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reg = <0 0xe00000 0x0 0x400>;
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#reset-cells = <2>;
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#clock-cells = <1>;
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clocks = <&xtal>;
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clock-names = "ref";
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};
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gic: interrupt-controller@140000 {
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@ -122,3 +140,5 @@
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};
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};
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};
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#include "eyeq5-pins.dtsi"
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