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MIPS: Add & use CP0_EntryHi ASID definitions

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Add definitions for the ASID field in CP0_EntryHi (along with the soon
to be used ASIDX field), and use them in a few previously hardcoded
cases.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Manuel Lauss <manuel.lauss@gmail.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Radim Krčmář <rkrcmar@redhat.com>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: kvm@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/13205/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
James Hogan 2016-05-06 14:36:19 +01:00 committed by Ralf Baechle
parent 5fb59fd2e7
commit 9b5c339958
4 changed files with 6 additions and 4 deletions
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2
arch/mips/include/asm/mipsregs.h
View File

@ -229,6 +229,8 @@
/* MIPS32/64 EntryHI bit definitions */
#define MIPS_ENTRYHI_EHINV (_ULCAST_(1) << 10)
#define MIPS_ENTRYHI_ASIDX (_ULCAST_(0x3) << 8)
#define MIPS_ENTRYHI_ASID (_ULCAST_(0xff) << 0)
/*
* R4x00 interrupt enable / cause bits

2
arch/mips/kernel/genex.S
View File

@ -455,7 +455,7 @@ NESTED(nmi_handler, PT_SIZE, sp)
.set noreorder
/* check if TLB contains a entry for EPC */
MFC0 k1, CP0_ENTRYHI
andi k1, 0xff /* ASID_MASK */
andi k1, MIPS_ENTRYHI_ASID
MFC0 k0, CP0_EPC
PTR_SRL k0, _PAGE_SHIFT + 1
PTR_SLL k0, _PAGE_SHIFT + 1

4
arch/mips/kvm/locore.S
View File

@ -164,7 +164,7 @@ FEXPORT(__kvm_mips_load_asid)
INT_SLL t2, t2, 2 /* x4 */
REG_ADDU t3, t1, t2
LONG_L k0, (t3)
andi k0, k0, 0xff
andi k0, k0, MIPS_ENTRYHI_ASID
mtc0 k0, CP0_ENTRYHI
ehb
@ -483,7 +483,7 @@ __kvm_mips_return_to_guest:
INT_SLL t2, t2, 2 /* x4 */
REG_ADDU t3, t1, t2
LONG_L k0, (t3)
andi k0, k0, 0xff
andi k0, k0, MIPS_ENTRYHI_ASID
mtc0 k0, CP0_ENTRYHI
ehb

2
arch/mips/pci/pci-alchemy.c
View File

@ -76,7 +76,7 @@ static void mod_wired_entry(int entry, unsigned long entrylo0,
unsigned long old_ctx;
/* Save old context and create impossible VPN2 value */
old_ctx = read_c0_entryhi() & 0xff;
old_ctx = read_c0_entryhi() & MIPS_ENTRYHI_ASID;
old_pagemask = read_c0_pagemask();
write_c0_index(entry);
write_c0_pagemask(pagemask);