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ARM: at91/dt: add RTT nodes to at91 dtsis
at91sam926x, at91sam9g45 and at91sam9rl SoCs all have at least one RTT block. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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9b5a067507
@ -956,6 +956,14 @@
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};
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};
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rtc@fffffd20 {
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compatible = "atmel,at91sam9260-rtt";
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reg = <0xfffffd20 0x10>;
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interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
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clocks = <&clk32k>;
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status = "disabled";
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};
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watchdog@fffffd40 {
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compatible = "atmel,at91sam9260-wdt";
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reg = <0xfffffd40 0x10>;
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@ -828,6 +828,14 @@
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clocks = <&mck>;
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};
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rtc@fffffd20 {
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compatible = "atmel,at91sam9260-rtt";
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reg = <0xfffffd20 0x10>;
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interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
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clocks = <&slow_xtal>;
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status = "disabled";
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};
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watchdog@fffffd40 {
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compatible = "atmel,at91sam9260-wdt";
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reg = <0xfffffd40 0x10>;
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@ -922,6 +922,21 @@
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pinctrl-0 = <&pinctrl_can_rx_tx>;
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clocks = <&can_clk>;
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clock-names = "can_clk";
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};
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rtc@fffffd20 {
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compatible = "atmel,at91sam9260-rtt";
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reg = <0xfffffd20 0x10>;
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interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
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clocks = <&slow_xtal>;
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status = "disabled";
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};
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rtc@fffffd50 {
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compatible = "atmel,at91sam9260-rtt";
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reg = <0xfffffd50 0x10>;
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interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
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clocks = <&slow_xtal>;
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status = "disabled";
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};
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};
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@ -1192,6 +1192,14 @@
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};
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};
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rtc@fffffd20 {
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compatible = "atmel,at91sam9260-rtt";
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reg = <0xfffffd20 0x10>;
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interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
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clocks = <&clk32k>;
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status = "disabled";
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};
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rtc@fffffdb0 {
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compatible = "atmel,at91rm9200-rtc";
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reg = <0xfffffdb0 0x30>;
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@ -1066,6 +1066,14 @@
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interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
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status = "disabled";
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};
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rtc@fffffd20 {
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compatible = "atmel,at91sam9260-rtt";
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reg = <0xfffffd20 0x10>;
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interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
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clocks = <&clk32k>;
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status = "disabled";
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};
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};
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};
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