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i.MX arm32 device tree changes for 5.15:

Browse Source 
- A series from Christoph Niedermaier to clean up i.MX6 DHCOM support.
 - New board support: DHCOM based PicoITX, DHSOM based DRC02, SolidRun
   SolidSense, SKOV i.MX6 boards.
 - Add WiFi support for i.MX7D base reMkarkable2 device.
 - Add FTM devices for i.MX7 to have Flex Timers support.
 - Configure ENET_REF clock to 125MHz for imx6qp-prtwd3 to support RGMII
   PHY mode.
 - Drop unneeded #address-cells and #size-cells from vf610-zii SPI EEPROM
   device node.
 - Add missing USB OTG OC pinmux and Crypto device for i.MX6QDL Gateworks
   boards.
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Merge tag 'imx-dt-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt

i.MX arm32 device tree changes for 5.15:

- A series from Christoph Niedermaier to clean up i.MX6 DHCOM support.
- New board support: DHCOM based PicoITX, DHSOM based DRC02, SolidRun
  SolidSense, SKOV i.MX6 boards.
- Add WiFi support for i.MX7D base reMkarkable2 device.
- Add FTM devices for i.MX7 to have Flex Timers support.
- Configure ENET_REF clock to 125MHz for imx6qp-prtwd3 to support RGMII
  PHY mode.
- Drop unneeded #address-cells and #size-cells from vf610-zii SPI EEPROM
  device node.
- Add missing USB OTG OC pinmux and Crypto device for i.MX6QDL Gateworks
  boards.

* tag 'imx-dt-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (23 commits)
  ARM: dts: imx6qp-prtwd3: configure ENET_REF clock to 125MHz
  ARM: dts: vf610-zii-dev-rev-b: Remove #address-cells and #size-cells property from at93c46d dt node
  ARM: dts: add SKOV imx6q and imx6dl based boards
  ARM: dts: imx7: add ftm nodes for Flex Timers
  ARM: dts: imx6qdl-dhcom: Add DHSOM based DRC02 board
  ARM: dts: imx6qdl-dhcom: Add DHCOM based PicoITX board
  ARM: dts: imx6qdl-dhcom: Split SoC-independent parts of DHCOM SOM and PDK2
  ARM: dts: imx6q-dhcom: Cleanup of the devicetrees
  ARM: dts: imx6q-dhcom: Rearrange of iomux
  ARM: dts: imx6q-dhcom: Rework of the DHCOM GPIO pinctrls
  ARM: dts: imx6q-dhcom: Use 1G ethernet on the PDK2 board
  ARM: dts: imx6q-dhcom: Set minimum memory size of all DHCOM i.MX6 variants
  ARM: dts: imx6q-dhcom: Remove ddc-i2c-bus property
  ARM: dts: imx6q-dhcom: Add keys and leds to the PDK2 board
  ARM: dts: imx6q-dhcom: Align stdout-path with other DHCOM SoMs
  ARM: dts: imx6q-dhcom: Adding Wake pin to the PCIe pinctrl
  ARM: dts: imx6q-dhcom: Fill GPIO line names on DHCOM SoM
  ARM: dts: imx6q-dhcom: Add interrupt and compatible to the ethernet PHY
  ARM: dts: imx6q-dhcom: Add the parallel system bus
  ARM: dts: imx7d-remarkable2: Add WiFi support
  ...

Link: https://lore.kernel.org/r/20210814133853.9981-2-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2021-08-16 23:17:16 +02:00
commit 9b35ab1e31
27 changed files with 2433 additions and 443 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

11
arch/arm/boot/dts/Makefile
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@ -443,6 +443,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
imx6dl-cubox-i-emmc-som-v15.dtb \
imx6dl-cubox-i-som-v15.dtb \
imx6dl-dfi-fs700-m60.dtb \
imx6dl-dhcom-picoitx.dtb \
imx6dl-eckelmann-ci4x10.dtb \
imx6dl-emcon-avari.dtb \
imx6dl-gw51xx.dtb \
@ -489,6 +490,9 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
imx6dl-sabrelite.dtb \
imx6dl-sabresd.dtb \
imx6dl-savageboard.dtb \
imx6dl-skov-revc-lt2.dtb \
imx6dl-skov-revc-lt6.dtb \
imx6dl-solidsense.dtb \
imx6dl-ts4900.dtb \
imx6dl-ts7970.dtb \
imx6dl-tx6dl-comtft.dtb \
@ -589,6 +593,10 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
imx6q-sabresd.dtb \
imx6q-savageboard.dtb \
imx6q-sbc6x.dtb \
imx6q-skov-revc-lt2.dtb \
imx6q-skov-revc-lt6.dtb \
imx6q-skov-reve-mi1010ait-1cp1.dtb \
imx6q-solidsense.dtb \
imx6q-tbs2910.dtb \
imx6q-ts4900.dtb \
imx6q-ts7970.dtb \
@ -621,7 +629,8 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
imx6qp-tx6qp-8137-mb7.dtb \
imx6qp-vicutp.dtb \
imx6qp-wandboard-revd1.dtb \
imx6qp-zii-rdu2.dtb
imx6qp-zii-rdu2.dtb \
imx6s-dhcom-drc02.dtb
dtb-$(CONFIG_SOC_IMX6SL) += \
imx6sl-evk.dtb \
imx6sl-tolino-shine2hd.dtb \

20
arch/arm/boot/dts/imx6dl-dhcom-picoitx.dts Normal file
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@ -0,0 +1,20 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2021 DH electronics GmbH
*
* DHCOM iMX6 variant:
* DHCM-iMX6DL-C0800-R102-F0819-E-SD-RTC-T-HS-I-01D2
* DHCOM PCB number: 493-300 or newer
* PicoITX PCB number: 487-600 or newer
*/
/dts-v1/;
#include "imx6dl.dtsi"
#include "imx6qdl-dhcom-som.dtsi"
#include "imx6qdl-dhcom-picoitx.dtsi"
/ {
model = "DH electronics i.MX6DL DHCOM on PicoITX";
compatible = "dh,imx6dl-dhcom-picoitx", "dh,imx6dl-dhcom-som",
"fsl,imx6dl";
};

13
arch/arm/boot/dts/imx6dl-skov-revc-lt2.dts Normal file
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@ -0,0 +1,13 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
//
// Copyright (C) 2020 Pengutronix, Ulrich Oelmann <kernel@pengutronix.de>
/dts-v1/;
#include "imx6dl.dtsi"
#include "imx6qdl-skov-cpu.dtsi"
#include "imx6qdl-skov-cpu-revc.dtsi"
/ {
model = "SKOV IMX6 CPU SoloCore";
compatible = "skov,imx6dl-skov-revc-lt2", "fsl,imx6dl";
};

106
arch/arm/boot/dts/imx6dl-skov-revc-lt6.dts Normal file
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@ -0,0 +1,106 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
//
// Copyright (C) 2020 Pengutronix, Ulrich Oelmann <kernel@pengutronix.de>
/dts-v1/;
#include "imx6dl.dtsi"
#include "imx6qdl-skov-cpu.dtsi"
#include "imx6qdl-skov-cpu-revc.dtsi"
/ {
model = "SKOV IMX6 CPU SoloCore";
compatible = "skov,imx6dl-skov-revc-lt6", "fsl,imx6dl";
backlight: backlight {
compatible = "pwm-backlight";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_backlight>;
enable-gpios = <&gpio6 23 GPIO_ACTIVE_LOW>;
pwms = <&pwm2 0 20000 0>;
brightness-levels = <0 255>;
num-interpolated-steps = <17>;
default-brightness-level = <8>;
power-supply = <&reg_24v0>;
};
display {
compatible = "fsl,imx-parallel-display";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ipu1>;
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
display0_in: endpoint {
remote-endpoint = <&ipu1_di0_disp0>;
};
};
port@1 {
reg = <1>;
display0_out: endpoint {
remote-endpoint = <&panel_in>;
};
};
};
panel {
compatible = "logictechno,lttd800480070-l6wh-rt";
backlight = <&backlight>;
power-supply = <&reg_3v3>;
port {
panel_in: endpoint {
remote-endpoint = <&display0_out>;
};
};
};
};
&ipu1_di0_disp0 {
remote-endpoint = <&display0_in>;
};
&iomuxc {
pinctrl_backlight: backlightgrp {
fsl,pins = <
MX6QDL_PAD_RGMII_TD3__GPIO6_IO23 0x58
>;
};
pinctrl_ipu1: ipu1grp {
fsl,pins = <
MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10
MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10
MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10
MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10
MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x10
MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x10
MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x10
MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x10
MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x10
MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x10
MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x10
MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x10
MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x10
MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x10
MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x10
MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x10
MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x10
MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x10
MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x10
MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x10
MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x10
>;
};
};

54
arch/arm/boot/dts/imx6dl-solidsense.dts Normal file
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@ -0,0 +1,54 @@
/*
* Copyright (C) 2015 Rabeeh Khoury <rabeeh@solid-run.com>
* Based on dt work by Russell King
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/dts-v1/;
#include "imx6dl.dtsi"
#include "imx6qdl-sr-som.dtsi"
#include "imx6qdl-sr-som-emmc.dtsi"
#include "imx6qdl-sr-som-ti.dtsi"
#include "imx6qdl-hummingboard2.dtsi"
#include "imx6qdl-solidsense.dtsi"
/ {
model = "SolidRun SolidSense Solo/DualLite (1.5som+emmc)";
compatible = "solidrun,solidsense/dl", "fsl,imx6dl";
};

270
arch/arm/boot/dts/imx6q-dhcom-pdk2.dts
View File

@ -1,269 +1,25 @@
// SPDX-License-Identifier: (GPL-2.0+)
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2015 DH electronics GmbH
* Copyright (C) 2015-2021 DH electronics GmbH
* Copyright (C) 2018 Marek Vasut <marex@denx.de>
*
* DHCOM iMX6 variant:
* DHCM-iMX6Q-C0800-R102-F0819-E-SD-RTC-T-HS-I-01D2
* DHCOM PCB number: 493-300 or newer
* PDK2 PCB number: 516-400 or newer
*/
/dts-v1/;
#include "imx6q-dhcom-som.dtsi"
#include "imx6q.dtsi"
#include "imx6qdl-dhcom-som.dtsi"
#include "imx6qdl-dhcom-pdk2.dtsi"
/ {
model = "Freescale i.MX6 Quad DHCOM Premium Developer Kit (2)";
compatible = "dh,imx6q-dhcom-pdk2", "dh,imx6q-dhcom-som", "fsl,imx6q";
chosen {
stdout-path = &uart1;
};
clk_ext_audio_codec: clock-codec {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24000000>;
};
display_bl: display-bl {
compatible = "pwm-backlight";
pwms = <&pwm1 0 50000 PWM_POLARITY_INVERTED>;
brightness-levels = <0 16 22 30 40 55 75 102 138 188 255>;
default-brightness-level = <8>;
enable-gpios = <&gpio3 27 GPIO_ACTIVE_HIGH>;
status = "okay";
};
lcd_display: disp0 {
compatible = "fsl,imx-parallel-display";
#address-cells = <1>;
#size-cells = <0>;
interface-pix-fmt = "rgb24";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ipu1_lcdif>;
status = "okay";
port@0 {
reg = <0>;
lcd_display_in: endpoint {
remote-endpoint = <&ipu1_di0_disp0>;
};
};
port@1 {
reg = <1>;
lcd_display_out: endpoint {
remote-endpoint = <&lcd_panel_in>;
};
};
};
panel {
compatible = "edt,etm0700g0edh6";
ddc-i2c-bus = <&i2c2>;
backlight = <&display_bl>;
port {
lcd_panel_in: endpoint {
remote-endpoint = <&lcd_display_out>;
};
};
};
sound {
compatible = "fsl,imx-audio-sgtl5000";
model = "imx-sgtl5000";
ssi-controller = <&ssi1>;
audio-codec = <&sgtl5000>;
audio-routing =
"MIC_IN", "Mic Jack",
"Mic Jack", "Mic Bias",
"LINE_IN", "Line In Jack",
"Headphone Jack", "HP_OUT";
mux-int-port = <1>;
mux-ext-port = <3>;
};
};
&audmux {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_audmux_ext>;
status = "okay";
};
&can1 {
status = "okay";
};
&can2 {
status = "disabled";
};
&hdmi {
ddc-i2c-bus = <&i2c2>;
status = "okay";
};
&i2c2 {
sgtl5000: codec@a {
compatible = "fsl,sgtl5000";
reg = <0x0a>;
#sound-dai-cells = <0>;
clocks = <&clk_ext_audio_codec>;
VDDA-supply = <&reg_3p3v>;
VDDIO-supply = <&sw2_reg>;
};
touchscreen@38 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_touchscreen>;
compatible = "edt,edt-ft5406";
reg = <0x38>;
interrupt-parent = <&gpio4>;
interrupts = <5 IRQ_TYPE_EDGE_FALLING>; /* GPIO E */
};
};
&iomuxc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hog_base &pinctrl_hog>;
pinctrl_hog: hog-grp {
fsl,pins = <
MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x400120b0
MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x400120b0
MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x400120b0
MX6QDL_PAD_CSI0_DAT17__GPIO6_IO03 0x400120b0
MX6QDL_PAD_DI0_PIN4__GPIO4_IO20 0x400120b0
MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x120b0
MX6QDL_PAD_KEY_COL1__GPIO4_IO08 0x400120b0
MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x400120b0
MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x400120b0
MX6QDL_PAD_KEY_ROW1__GPIO4_IO09 0x400120b0
MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x400120b0
MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x400120b0
MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21 0x400120b0
MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x400120b0
MX6QDL_PAD_SD1_CMD__GPIO1_IO18 0x400120b0
MX6QDL_PAD_SD1_DAT0__GPIO1_IO16 0x400120b0
MX6QDL_PAD_SD1_DAT1__GPIO1_IO17 0x400120b0
MX6QDL_PAD_SD1_DAT2__GPIO1_IO19 0x400120b0
MX6QDL_PAD_SD1_CLK__GPIO1_IO20 0x400120b0
MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18 0x400120b0
MX6QDL_PAD_CSI0_MCLK__GPIO5_IO19 0x400120b0
MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x400120b0
>;
};
pinctrl_audmux_ext: audmux-ext-grp {
fsl,pins = <
MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
>;
};
pinctrl_enet_1G: enet-1G-grp {
fsl,pins = <
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0
MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x100b0
MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x100b0
MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x100b0
MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x100b0
MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x100b0
MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x100b0
MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0
MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x000b0
MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x000b1
MX6QDL_PAD_EIM_D26__GPIO3_IO26 0x000b1
>;
};
pinctrl_ipu1_lcdif: ipu1-lcdif-grp {
fsl,pins = <
MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x38
MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x38
MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x38
MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x38
MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x38
MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x38
MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x38
MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x38
MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x38
MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x38
MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x38
MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x38
MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x38
MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x38
MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x38
MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x38
MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x38
MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x38
MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x38
MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x38
MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x38
MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x38
MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x38
MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x38
MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x38
MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x38
MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x38
MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x38
MX6QDL_PAD_EIM_D27__GPIO3_IO27 0x120b0
>;
};
pinctrl_pwm1: pwm1-grp {
fsl,pins = <
MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1
>;
};
pinctrl_touchscreen: touchscreen-grp {
fsl,pins = <
MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x1b0b1
>;
};
pinctrl_pcie: pcie-grp {
fsl,pins = <
MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20 0x1b0b1
>;
};
};
&ipu1_di0_disp0 {
remote-endpoint = <&lcd_display_in>;
};
&pcie {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pcie>;
reset-gpio = <&gpio6 14 GPIO_ACTIVE_LOW>;
status = "okay";
};
&pwm1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm1>;
status = "okay";
};
&ssi1 {
status = "okay";
model = "DH electronics i.MX6Q DHCOM on Premium Developer Kit (2)";
compatible = "dh,imx6q-dhcom-pdk2", "dh,imx6q-dhcom-som",
"fsl,imx6q";
};
&sata {
status = "okay";
};
&usdhc3 {
status = "okay";
};

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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
//
// Copyright (C) 2020 Pengutronix, Ulrich Oelmann <kernel@pengutronix.de>
/dts-v1/;
#include "imx6q.dtsi"
#include "imx6qdl-skov-cpu.dtsi"
#include "imx6qdl-skov-cpu-revc.dtsi"
/ {
model = "SKOV IMX6 CPU QuadCore";
compatible = "skov,imx6q-skov-revc-lt2", "fsl,imx6q";
};
&hdmi {
ddc-i2c-bus = <&i2c2>;
status = "okay";
};
&i2c2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2>;
clock-frequency = <100000>;
status = "okay";
};
&iomuxc {
pinctrl_i2c2: i2c2grp {
fsl,pins = <
/* internal 22 k pull up required */
MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001f878
/* internal 22 k pull up required */
MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001f878
>;
};
};

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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
//
// Copyright (C) 2020 Pengutronix, Ulrich Oelmann <kernel@pengutronix.de>
/dts-v1/;
#include "imx6q.dtsi"
#include "imx6qdl-skov-cpu.dtsi"
#include "imx6qdl-skov-cpu-revc.dtsi"
/ {
model = "SKOV IMX6 CPU QuadCore";
compatible = "skov,imx6q-skov-revc-lt6", "fsl,imx6q";
backlight: backlight {
compatible = "pwm-backlight";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_backlight>;
enable-gpios = <&gpio6 23 GPIO_ACTIVE_LOW>;
pwms = <&pwm2 0 20000 0>;
brightness-levels = <0 255>;
num-interpolated-steps = <17>;
default-brightness-level = <8>;
power-supply = <&reg_24v0>;
};
display {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,imx-parallel-display";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ipu1>;
port@0 {
reg = <0>;
display0_in: endpoint {
remote-endpoint = <&ipu1_di0_disp0>;
};
};
port@1 {
reg = <1>;
display0_out: endpoint {
remote-endpoint = <&panel_in>;
};
};
};
panel {
compatible = "logictechno,lttd800480070-l6wh-rt";
backlight = <&backlight>;
power-supply = <&reg_3v3>;
port {
panel_in: endpoint {
remote-endpoint = <&display0_out>;
};
};
};
};
&hdmi {
ddc-i2c-bus = <&i2c2>;
status = "okay";
};
&i2c2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2>;
clock-frequency = <100000>;
status = "okay";
};
&ipu1_di0_disp0 {
remote-endpoint = <&display0_in>;
};
&iomuxc {
pinctrl_backlight: backlightgrp {
fsl,pins = <
MX6QDL_PAD_RGMII_TD3__GPIO6_IO23 0x58
>;
};
pinctrl_i2c2: i2c2grp {
fsl,pins = <
/* internal 22 k pull up required */
MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001F878
/* internal 22 k pull up required */
MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001F878
>;
};
pinctrl_ipu1: ipu1grp {
fsl,pins = <
MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10
MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10
MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10
MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10
MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x10
MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x10
MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x10
MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x10
MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x10
MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x10
MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x10
MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x10
MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x10
MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x10
MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x10
MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x10
MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x10
MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x10
MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x10
MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x10
MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x10
>;
};
};

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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
//
// Copyright (C) 2020 Pengutronix, Ulrich Oelmann <kernel@pengutronix.de>
/dts-v1/;
#include "imx6q.dtsi"
#include "imx6qdl-skov-cpu.dtsi"
/ {
model = "SKOV IMX6 CPU QuadCore";
compatible = "skov,imx6q-skov-reve-mi1010ait-1cp1", "fsl,imx6q";
backlight: backlight {
compatible = "pwm-backlight";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_backlight>;
enable-gpios = <&gpio6 23 GPIO_ACTIVE_LOW>;
pwms = <&pwm2 0 20000 0>;
brightness-levels = <0 255>;
num-interpolated-steps = <17>;
default-brightness-level = <8>;
power-supply = <&reg_24v0>;
};
panel {
compatible = "multi-inno,mi1010ait-1cp";
backlight = <&backlight>;
power-supply = <&reg_3v3>;
port {
panel_in: endpoint {
remote-endpoint = <&lvds0_out>;
};
};
};
};
&clks {
assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
<&clks IMX6QDL_CLK_LDB_DI1_SEL>;
assigned-clock-parents = <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>,
<&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>;
};
&hdmi {
ddc-i2c-bus = <&i2c2>;
status = "okay";
};
&i2c1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c1>;
clock-frequency = <100000>;
status = "okay";
touchscreen@38 {
compatible = "edt,edt-ft5406";
reg = <0x38>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_touchscreen>;
interrupt-parent = <&gpio3>;
interrupts = <19 IRQ_TYPE_EDGE_FALLING>;
reset-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
touchscreen-size-x = <1280>;
touchscreen-size-y = <800>;
wakeup-source;
};
};
&i2c2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2>;
clock-frequency = <100000>;
status = "okay";
};
&ldb {
status = "okay";
lvds-channel@0 {
status = "okay";
port@4 {
reg = <4>;
lvds0_out: endpoint {
remote-endpoint = <&panel_in>;
};
};
};
};
&iomuxc {
pinctrl_backlight: backlightgrp {
fsl,pins = <
MX6QDL_PAD_RGMII_TD3__GPIO6_IO23 0x58
>;
};
pinctrl_i2c1: i2c1grp {
fsl,pins = <
/* external 1 k pull up */
MX6QDL_PAD_EIM_D21__I2C1_SCL 0x40010878
/* external 1 k pull up */
MX6QDL_PAD_EIM_D28__I2C1_SDA 0x40010878
>;
};
pinctrl_i2c2: i2c2grp {
fsl,pins = <
/* internal 22 k pull up required */
MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001F878
/* internal 22 k pull up required */
MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001F878
>;
};
pinctrl_touchscreen: touchscreengrp {
fsl,pins = <
/* external 10 k pull up */
/* CTP_INT */
MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x1b0b0
/* CTP_RST */
MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x1b0b0
>;
};
};

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/*
* Copyright (C) 2015 Rabeeh Khoury <rabeeh@solid-run.com>
* Based on dt work by Russell King
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/dts-v1/;
#include "imx6q.dtsi"
#include "imx6qdl-sr-som.dtsi"
#include "imx6qdl-sr-som-emmc.dtsi"
#include "imx6qdl-sr-som-ti.dtsi"
#include "imx6qdl-hummingboard2.dtsi"
#include "imx6qdl-solidsense.dtsi"
/ {
model = "SolidRun SolidSense Dual/Quad (1.5som+emmc)";
compatible = "solidrun,solidsense/q", "fsl,imx6q";
};

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// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2021 DH electronics GmbH
*/
/ {
chosen {
stdout-path = "serial0:115200n8";
};
};
/*
* Special SoM hardware required which uses the pins from micro SD card. The
* pins SD3_DAT0 and SD3_DAT1 are muxed as can2 Tx and Rx. The signals for can2
* Tx and Rx are routed to the DHCOM UART1 rts/cts pins. Therefore the micro SD
* card must be disabled and the uart1 rts/cts must be output on other DHCOM
* pins, see uart1 and usdhc3 node below.
*/
&can2 {
status = "okay";
};
&gpio1 {
/*
* NOTE: On DRC02, the RS485_RX_En is controlled by a separate
* GPIO line, however the i.MX6 UART driver assumes RX happens
* during TX anyway and that it only controls drive enable DE
* line. Hence, the RX is always enabled here.
*/
rs485-rx-en-hog {
gpio-hog;
gpios = <18 0>; /* GPIO Q */
line-name = "rs485-rx-en";
output-low;
};
};
&gpio3 {
gpio-line-names =
"", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "",
"", "", "", "DRC02-In1", "", "", "", "";
};
&gpio4 {
gpio-line-names =
"", "", "", "", "", "DHCOM-E", "DRC02-In2", "DHCOM-H",
"DHCOM-I", "DRC02-HW0", "", "", "", "", "", "",
"", "", "", "", "DRC02-Out1", "", "", "",
"", "", "", "", "", "", "", "";
};
&gpio6 {
gpio-line-names =
"", "", "", "DRC02-Out2", "", "", "SOM-HW1", "",
"", "", "", "", "", "", "DRC02-HW2", "DRC02-HW1",
"", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "";
};
&i2c1 {
eeprom@50 {
compatible = "atmel,24c04";
reg = <0x50>;
pagesize = <16>;
};
};
&uart1 {
/*
* Due to the use of can2 the signals for can2 Tx and Rx are routed to
* DHCOM UART1 rts/cts pins. Therefore this UART have to use DHCOM GPIOs
* for rts/cts. So configure DHCOM GPIO I as rts and GPIO M as cts.
*/
/delete-property/ uart-has-rtscts;
cts-gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>; /* GPIO M */
pinctrl-0 = <&pinctrl_uart1 &pinctrl_dhcom_i &pinctrl_dhcom_m>;
pinctrl-names = "default";
rts-gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>; /* GPIO I */
};
&uart5 {
/*
* On DRC02 this UART is used as RS485 interface and RS485_TX_En is
* controlled by DHCOM GPIO P. So remove rts/cts pins and the property
* uart-has-rtscts from this UART and add the DHCOM GPIO P pin via
* rts-gpios. The RS485_RX_En is controlled by DHCOM GPIO Q, see gpio1
* node above.
*/
/delete-property/ uart-has-rtscts;
linux,rs485-enabled-at-boot-time;
pinctrl-0 = <&pinctrl_uart5_core &pinctrl_dhcom_p &pinctrl_dhcom_q>;
pinctrl-names = "default";
rts-gpios = <&gpio7 13 GPIO_ACTIVE_HIGH>; /* GPIO P */
};
&usdhc2 { /* SD card */
status = "okay";
};
&usdhc3 {
/*
* Due to the use of can2 the micro SD card on module have to be
* disabled, because the pins SD3_DAT0 and SD3_DAT1 are muxed as
* can2 Tx and Rx.
*/
status = "disabled";
};
&iomuxc {
pinctrl-0 = <
/*
* The following DHCOM GPIOs are used on this board.
* Therefore, they have been removed from the list below.
* I: uart1 rts
* M: uart1 cts
* P: uart5 rs485-tx-en
* Q: uart5 rs485-rx-en
*/
&pinctrl_hog_base
&pinctrl_dhcom_a &pinctrl_dhcom_b &pinctrl_dhcom_c
&pinctrl_dhcom_d &pinctrl_dhcom_e &pinctrl_dhcom_f
&pinctrl_dhcom_g &pinctrl_dhcom_h
&pinctrl_dhcom_j &pinctrl_dhcom_k &pinctrl_dhcom_l
&pinctrl_dhcom_n &pinctrl_dhcom_o
&pinctrl_dhcom_r
&pinctrl_dhcom_s &pinctrl_dhcom_t &pinctrl_dhcom_u
&pinctrl_dhcom_v &pinctrl_dhcom_w &pinctrl_dhcom_int
>;
pinctrl-names = "default";
pinctrl_uart5_core: uart5-core-grp {
fsl,pins = <
MX6QDL_PAD_CSI0_DAT14__UART5_TX_DATA 0x1b0b1
MX6QDL_PAD_CSI0_DAT15__UART5_RX_DATA 0x1b0b1
>;
};
};

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// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2015-2021 DH electronics GmbH
* Copyright (C) 2018 Marek Vasut <marex@denx.de>
*/
#include <dt-bindings/leds/common.h>
/ {
chosen {
stdout-path = "serial0:115200n8";
};
clk_ext_audio_codec: clock-codec {
#clock-cells = <0>;
clock-frequency = <24000000>;
compatible = "fixed-clock";
};
display_bl: display-bl {
brightness-levels = <0 16 22 30 40 55 75 102 138 188 255>;
compatible = "pwm-backlight";
default-brightness-level = <8>;
enable-gpios = <&gpio3 27 GPIO_ACTIVE_HIGH>; /* GPIO G */
pwms = <&pwm1 0 50000 PWM_POLARITY_INVERTED>;
status = "okay";
};
lcd_display: disp0 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,imx-parallel-display";
interface-pix-fmt = "rgb24";
pinctrl-0 = <&pinctrl_ipu1_lcdif &pinctrl_dhcom_g>;
pinctrl-names = "default";
status = "okay";
port@0 {
reg = <0>;
lcd_display_in: endpoint {
remote-endpoint = <&ipu1_di0_disp0>;
};
};
port@1 {
reg = <1>;
lcd_display_out: endpoint {
remote-endpoint = <&lcd_panel_in>;
};
};
};
gpio-keys {
#size-cells = <0>;
compatible = "gpio-keys";
button-0 {
gpios = <&gpio1 2 GPIO_ACTIVE_LOW>; /* GPIO A */
label = "TA1-GPIO-A";
linux,code = <KEY_A>;
pinctrl-0 = <&pinctrl_dhcom_a>;
pinctrl-names = "default";
wakeup-source;
};
button-1 {
gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; /* GPIO B */
label = "TA2-GPIO-B";
linux,code = <KEY_B>;
pinctrl-0 = <&pinctrl_dhcom_b>;
pinctrl-names = "default";
wakeup-source;
};
button-2 {
gpios = <&gpio1 5 GPIO_ACTIVE_LOW>; /* GPIO C */
label = "TA3-GPIO-C";
linux,code = <KEY_C>;
pinctrl-0 = <&pinctrl_dhcom_c>;
pinctrl-names = "default";
wakeup-source;
};
button-3 {
gpios = <&gpio6 3 GPIO_ACTIVE_LOW>; /* GPIO D */
label = "TA4-GPIO-D";
linux,code = <KEY_D>;
pinctrl-0 = <&pinctrl_dhcom_d>;
pinctrl-names = "default";
wakeup-source;
};
};
led {
compatible = "gpio-leds";
/*
* Disable led-5, because GPIO E is
* already used as touch interrupt.
*/
led-5 {
color = <LED_COLOR_ID_GREEN>;
default-state = "off";
function = LED_FUNCTION_INDICATOR;
gpios = <&gpio4 5 GPIO_ACTIVE_HIGH>; /* GPIO E */
pinctrl-0 = <&pinctrl_dhcom_e>;
pinctrl-names = "default";
status = "disabled";
};
led-6 {
color = <LED_COLOR_ID_GREEN>;
default-state = "off";
function = LED_FUNCTION_INDICATOR;
gpios = <&gpio4 20 GPIO_ACTIVE_HIGH>; /* GPIO F */
pinctrl-0 = <&pinctrl_dhcom_f>;
pinctrl-names = "default";
};
led-7 {
color = <LED_COLOR_ID_GREEN>;
default-state = "off";
function = LED_FUNCTION_INDICATOR;
gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* GPIO H */
pinctrl-0 = <&pinctrl_dhcom_h>;
pinctrl-names = "default";
};
led-8 {
color = <LED_COLOR_ID_GREEN>;
default-state = "off";
function = LED_FUNCTION_INDICATOR;
gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>; /* GPIO I */
pinctrl-0 = <&pinctrl_dhcom_i>;
pinctrl-names = "default";
};
};
panel {
backlight = <&display_bl>;
compatible = "edt,etm0700g0edh6";
port {
lcd_panel_in: endpoint {
remote-endpoint = <&lcd_display_out>;
};
};
};
sound {
audio-codec = <&sgtl5000>;
audio-routing =
"MIC_IN", "Mic Jack",
"Mic Jack", "Mic Bias",
"LINE_IN", "Line In Jack",
"Headphone Jack", "HP_OUT";
compatible = "fsl,imx-audio-sgtl5000";
model = "imx-sgtl5000";
mux-ext-port = <3>;
mux-int-port = <1>;
ssi-controller = <&ssi1>;
};
};
&audmux {
pinctrl-0 = <&pinctrl_audmux_ext>;
pinctrl-names = "default";
status = "okay";
};
&can1 {
status = "okay";
};
&can2 {
status = "disabled";
};
/* 1G ethernet */
/delete-node/ &ethphy0;
&fec {
phy-mode = "rgmii";
phy-handle = <&ethphy7>;
pinctrl-0 = <&pinctrl_enet_1G>;
pinctrl-names = "default";
status = "okay";
mdio {
#address-cells = <1>;
#size-cells = <0>;
ethphy7: ethernet-phy@7 { /* KSZ 9021 */
compatible = "ethernet-phy-ieee802.3-c22";
interrupt-parent = <&gpio1>;
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
pinctrl-0 = <&pinctrl_ethphy7>;
pinctrl-names = "default";
reg = <7>;
reset-assert-us = <1000>;
reset-deassert-us = <1000>;
reset-gpios = <&gpio3 29 GPIO_ACTIVE_LOW>;
rxc-skew-ps = <3000>;
rxd0-skew-ps = <0>;
rxd1-skew-ps = <0>;
rxd2-skew-ps = <0>;
rxd3-skew-ps = <0>;
rxdv-skew-ps = <0>;
txc-skew-ps = <3000>;
txd0-skew-ps = <0>;
txd1-skew-ps = <0>;
txd2-skew-ps = <0>;
txd3-skew-ps = <0>;
txen-skew-ps = <0>;
};
};
};
&hdmi {
ddc-i2c-bus = <&i2c2>;
status = "okay";
};
&i2c2 {
sgtl5000: codec@a {
#sound-dai-cells = <0>;
clocks = <&clk_ext_audio_codec>;
compatible = "fsl,sgtl5000";
reg = <0x0a>;
VDDA-supply = <&reg_3p3v>;
VDDIO-supply = <&sw2_reg>;
};
touchscreen@38 {
compatible = "edt,edt-ft5406";
interrupt-parent = <&gpio4>;
interrupts = <5 IRQ_TYPE_EDGE_FALLING>; /* GPIO E */
pinctrl-0 = <&pinctrl_dhcom_e>;
pinctrl-names = "default";
reg = <0x38>;
};
};
&ipu1_di0_disp0 {
remote-endpoint = <&lcd_display_in>;
};
&pcie {
pinctrl-0 = <&pinctrl_pcie &pinctrl_dhcom_j>;
reset-gpio = <&gpio6 14 GPIO_ACTIVE_LOW>; /* GPIO J */
status = "okay";
};
&pwm1 {
status = "okay";
};
&ssi1 {
status = "okay";
};
&usdhc2 { /* SD card */
status = "okay";
};
&iomuxc {
pinctrl-0 = <
/*
* The following DHCOM GPIOs are used on this board.
* Therefore, they have been removed from the list below.
* A: key TA1
* B: key TA2
* C: key TA3
* D: key TA4
* E: touchscreen
* F: led6
* G: backlight enable
* H: led7
* I: led8
* J: PCIe reset
*/
&pinctrl_hog_base
&pinctrl_dhcom_k &pinctrl_dhcom_l
&pinctrl_dhcom_m &pinctrl_dhcom_n &pinctrl_dhcom_o
&pinctrl_dhcom_p &pinctrl_dhcom_q &pinctrl_dhcom_r
&pinctrl_dhcom_s &pinctrl_dhcom_t &pinctrl_dhcom_u
&pinctrl_dhcom_v &pinctrl_dhcom_w &pinctrl_dhcom_int
>;
pinctrl-names = "default";
pinctrl_audmux_ext: audmux-ext-grp {
fsl,pins = <
MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
>;
};
pinctrl_enet_1G: enet-1G-grp {
fsl,pins = <
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0
MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0
MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x100b0
MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x100b0
MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x100b0
MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x100b0
MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x100b0
MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x100b0
>;
};
pinctrl_ethphy7: ethphy7-grp {
fsl,pins = <
MX6QDL_PAD_EIM_D26__GPIO3_IO26 0xb1 /* WOL */
MX6QDL_PAD_EIM_D29__GPIO3_IO29 0xb0 /* Reset */
MX6QDL_PAD_GPIO_0__GPIO1_IO00 0xb1 /* Int */
>;
};
pinctrl_ipu1_lcdif: ipu1-lcdif-grp {
fsl,pins = <
MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x38
MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x38
MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x38
MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x38
MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x38
MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x38
MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x38
MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x38
MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x38
MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x38
MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x38
MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x38
MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x38
MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x38
MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x38
MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x38
MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x38
MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x38
MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x38
MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x38
MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x38
MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x38
MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x38
MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x38
MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x38
MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x38
MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x38
MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x38
>;
};
};

69
arch/arm/boot/dts/imx6qdl-dhcom-picoitx.dtsi Normal file
View File

@ -0,0 +1,69 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2021 DH electronics GmbH
*/
#include <dt-bindings/leds/common.h>
/ {
chosen {
stdout-path = "serial0:115200n8";
};
led {
compatible = "gpio-leds";
led-0 {
color = <LED_COLOR_ID_YELLOW>;
default-state = "off";
function = LED_FUNCTION_INDICATOR;
gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>; /* GPIO I */
pinctrl-0 = <&pinctrl_dhcom_i>;
pinctrl-names = "default";
};
};
};
&gpio1 {
gpio-line-names =
"", "", "DHCOM-A", "", "DHCOM-B", "PicoITX-In2", "", "",
"", "", "", "", "", "", "", "",
"DHCOM-R", "DHCOM-S", "DHCOM-Q", "DHCOM-T", "DHCOM-U", "", "", "",
"", "", "", "", "", "", "", "";
};
&gpio4 {
gpio-line-names =
"", "", "", "", "", "PicoITX-In1", "DHCOM-INT", "DHCOM-H",
"DHCOM-I", "PicoITX-HW2", "", "", "", "", "", "",
"", "", "", "", "PicoITX-Out1", "", "", "",
"", "", "", "", "", "", "", "";
};
&gpio6 {
gpio-line-names =
"", "", "", "PicoITX-Out2", "", "", "SOM-HW1", "",
"", "", "", "", "", "", "PicoITX-HW0", "PicoITX-HW1",
"", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "";
};
&iomuxc {
pinctrl-0 = <
/*
* The following DHCOM GPIOs are used on this board.
* Therefore, they have been removed from the list below.
* I: yellow led
*/
&pinctrl_hog_base
&pinctrl_dhcom_a &pinctrl_dhcom_b &pinctrl_dhcom_c
&pinctrl_dhcom_d &pinctrl_dhcom_e &pinctrl_dhcom_f
&pinctrl_dhcom_g &pinctrl_dhcom_h
&pinctrl_dhcom_j &pinctrl_dhcom_k &pinctrl_dhcom_l
&pinctrl_dhcom_m &pinctrl_dhcom_n &pinctrl_dhcom_o
&pinctrl_dhcom_p &pinctrl_dhcom_q &pinctrl_dhcom_r
&pinctrl_dhcom_s &pinctrl_dhcom_t &pinctrl_dhcom_u
&pinctrl_dhcom_v &pinctrl_dhcom_w &pinctrl_dhcom_int
>;
pinctrl-names = "default";
};

635
arch/arm/boot/dts/imx6q-dhcom-som.dtsi → arch/arm/boot/dts/imx6qdl-dhcom-som.dtsi
View File

@ -1,10 +1,9 @@
// SPDX-License-Identifier: (GPL-2.0+)
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2015 DH electronics GmbH
* Copyright (C) 2015-2021 DH electronics GmbH
* Copyright (C) 2018 Marek Vasut <marex@denx.de>
*/
#include "imx6q.dtsi"
#include <dt-bindings/pwm/pwm.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/clock/imx6qdl-clock.h>
@ -28,14 +27,22 @@
serial4 = &uart3;
};
memory@10000000 {
memory@10000000 { /* Appropriate memory size will be filled by U-Boot */
device_type = "memory";
reg = <0x10000000 0x40000000>;
reg = <0x10000000 0x20000000>;
};
reg_3p3v: regulator-3P3V {
compatible = "regulator-fixed";
regulator-always-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "3P3V";
};
reg_eth_vio: regulator-eth-vio {
compatible = "regulator-fixed";
gpio = <&gpio1 7 GPIO_ACTIVE_LOW>;
gpio = <&gpio1 7 0>;
pinctrl-0 = <&pinctrl_enet_vio>;
pinctrl-names = "default";
regulator-always-on;
@ -46,225 +53,521 @@
vin-supply = <&sw2_reg>;
};
reg_usb_otg_vbus: regulator-usb-otg-vbus {
/* OE pin of the latch is low active */
reg_latch_oe_on: regulator-latch-oe-on {
compatible = "regulator-fixed";
regulator-name = "usb_otg_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio3 22 0>;
regulator-always-on;
regulator-name = "latch_oe_on";
};
reg_usb_h1_vbus: regulator-usb-h1-vbus {
compatible = "regulator-fixed";
regulator-name = "usb_h1_vbus";
enable-active-high;
gpio = <&gpio3 31 0>;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio3 31 GPIO_ACTIVE_HIGH>;
enable-active-high;
regulator-name = "usb_h1_vbus";
};
reg_3p3v: regulator-3P3V {
reg_usb_otg_vbus: regulator-usb-otg-vbus {
compatible = "regulator-fixed";
regulator-name = "3P3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-name = "usb_otg_vbus";
};
};
&can1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flexcan1>;
pinctrl-names = "default";
status = "okay";
};
/*
* Special SoM hardware required which uses the pins from micro SD card. The
* pins SD3_DAT0 and SD3_DAT1 are muxed as can2 Tx and Rx. The signals for can2
* Tx and Rx are routed to the DHCOM UART1 rts/cts pins. So to enable can2 on
* the board device tree file, the micro SD card must be disabled and the uart1
* rts/cts must be disabled or output on other DHCOM pins.
*/
&can2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flexcan2>;
pinctrl-names = "default";
status = "disabled";
};
&ecspi1 {
cs-gpios = <&gpio2 30 GPIO_ACTIVE_LOW>, <&gpio4 11 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi1>;
pinctrl-names = "default";
status = "okay";
flash@0 { /* S25FL116K */
flash@0 { /* S25FL116K */
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
spi-max-frequency = <50000000>;
reg = <0>;
m25p,fast-read;
reg = <0>;
spi-max-frequency = <50000000>;
};
};
&ecspi2 {
cs-gpios = <&gpio5 29 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi2>;
status = "okay";
pinctrl-names = "default";
status = "disabled";
};
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet_100M>;
phy-mode = "rmii";
phy-handle = <&ethphy0>;
pinctrl-0 = <&pinctrl_enet_100M>;
pinctrl-names = "default";
status = "okay";
mdio {
#address-cells = <1>;
#size-cells = <0>;
ethphy0: ethernet-phy@0 { /* SMSC LAN8710Ai */
ethphy0: ethernet-phy@0 { /* SMSC LAN8710Ai */
compatible = "ethernet-phy-ieee802.3-c22";
interrupt-parent = <&gpio4>;
interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
pinctrl-0 = <&pinctrl_ethphy0>;
pinctrl-names = "default";
reg = <0>;
max-speed = <100>;
reset-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
reset-assert-us = <1000>;
reset-deassert-us = <1000>;
reset-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
smsc,disable-energy-detect; /* Make plugin detection reliable */
};
};
};
&gpio1 {
gpio-line-names =
"", "", "DHCOM-A", "", "DHCOM-B", "DHCOM-C", "", "",
"", "", "", "", "", "", "", "",
"DHCOM-R", "DHCOM-S", "DHCOM-Q", "DHCOM-T", "DHCOM-U", "", "", "",
"", "", "", "", "", "", "", "";
};
&gpio2 {
gpio-line-names =
"", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "",
"SOM-HW2", "", "", "SOM-HW0", "", "SOM-MEM1", "SOM-MEM0", "",
"", "", "", "", "", "", "", "";
};
&gpio3 {
gpio-line-names =
"", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "",
"", "", "", "DHCOM-G", "", "", "", "";
};
&gpio4 {
gpio-line-names =
"", "", "", "", "", "DHCOM-E", "DHCOM-INT", "DHCOM-H",
"DHCOM-I", "DHCOM-L", "", "", "", "", "", "",
"", "", "", "", "DHCOM-F", "", "", "",
"", "", "", "", "", "", "", "";
};
&gpio5 {
gpio-line-names =
"", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "",
"", "", "DHCOM-V", "DHCOM-W", "", "DHCOM-O", "", "",
"", "", "", "", "", "", "", "";
};
&gpio6 {
gpio-line-names =
"", "", "", "DHCOM-D", "", "", "SOM-HW1", "",
"", "", "", "", "", "", "DHCOM-J", "DHCOM-K",
"", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "";
};
&gpio7 {
gpio-line-names =
"DHCOM-M", "DHCOM-N", "", "", "", "", "", "",
"", "", "", "", "", "DHCOM-P", "", "",
"", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "";
};
&i2c1 {
/*
* Info: According to erratum ERR007805 clock frequency limit is 375000.
* The erratum for i.MX6S/DL is here [1] and for i.MX6Q/D is here [2].
* [1] https://www.nxp.com/docs/en/errata/IMX6SDLCE.pdf
* [2] https://www.nxp.com/docs/en/errata/IMX6DQCE.pdf
*/
clock-frequency = <100000>;
pinctrl-names = "default", "gpio";
pinctrl-0 = <&pinctrl_i2c1>;
pinctrl-1 = <&pinctrl_i2c1_gpio>;
pinctrl-names = "default", "gpio";
scl-gpios = <&gpio3 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
sda-gpios = <&gpio3 28 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
status = "okay";
};
&i2c2 {
/* Info: Clock frequency limit is 375000 (for details see i2c1) */
clock-frequency = <100000>;
pinctrl-names = "default", "gpio";
pinctrl-0 = <&pinctrl_i2c2>;
pinctrl-1 = <&pinctrl_i2c2_gpio>;
pinctrl-names = "default", "gpio";
scl-gpios = <&gpio4 12 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
sda-gpios = <&gpio4 13 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
status = "okay";
};
&i2c3 {
/* Info: Clock frequency limit is 375000 (for details see i2c1) */
clock-frequency = <100000>;
pinctrl-names = "default", "gpio";
pinctrl-0 = <&pinctrl_i2c3>;
pinctrl-1 = <&pinctrl_i2c3_gpio>;
pinctrl-names = "default", "gpio";
scl-gpios = <&gpio1 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
sda-gpios = <&gpio1 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
status = "okay";
ltc3676: pmic@3c {
compatible = "lltc,ltc3676";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pmic_hw300>;
reg = <0x3c>;
interrupt-parent = <&gpio5>;
interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
pinctrl-0 = <&pinctrl_pmic>;
pinctrl-names = "default";
reg = <0x3c>;
regulators {
sw1_reg: sw1 {
regulator-min-microvolt = <787500>;
regulator-max-microvolt = <1527272>;
lltc,fb-voltage-divider = <100000 110000>;
regulator-suspend-mem-microvolt = <1040000>;
regulator-ramp-delay = <7000>;
regulator-boot-on;
regulator-always-on;
regulator-boot-on;
regulator-max-microvolt = <1527272>;
regulator-min-microvolt = <787500>;
regulator-ramp-delay = <7000>;
regulator-suspend-mem-microvolt = <1040000>;
};
sw2_reg: sw2 {
regulator-min-microvolt = <1885714>;
regulator-max-microvolt = <3657142>;
lltc,fb-voltage-divider = <100000 28000>;
regulator-ramp-delay = <7000>;
regulator-boot-on;
regulator-always-on;
regulator-boot-on;
regulator-max-microvolt = <3657142>;
regulator-min-microvolt = <1885714>;
regulator-ramp-delay = <7000>;
};
sw3_reg: sw3 {
regulator-min-microvolt = <787500>;
regulator-max-microvolt = <1527272>;
lltc,fb-voltage-divider = <100000 110000>;
regulator-suspend-mem-microvolt = <980000>;
regulator-ramp-delay = <7000>;
regulator-boot-on;
regulator-always-on;
regulator-boot-on;
regulator-max-microvolt = <1527272>;
regulator-min-microvolt = <787500>;
regulator-ramp-delay = <7000>;
regulator-suspend-mem-microvolt = <980000>;
};
sw4_reg: sw4 {
regulator-min-microvolt = <855571>;
regulator-max-microvolt = <1659291>;
lltc,fb-voltage-divider = <100000 93100>;
regulator-ramp-delay = <7000>;
regulator-boot-on;
regulator-always-on;
regulator-boot-on;
regulator-max-microvolt = <1659291>;
regulator-min-microvolt = <855571>;
regulator-ramp-delay = <7000>;
};
ldo1_reg: ldo1 {
regulator-min-microvolt = <3240306>;
regulator-max-microvolt = <3240306>;
lltc,fb-voltage-divider = <102000 29400>;
regulator-boot-on;
regulator-always-on;
regulator-boot-on;
regulator-max-microvolt = <3240306>;
regulator-min-microvolt = <3240306>;
};
ldo2_reg: ldo2 {
regulator-min-microvolt = <2484708>;
regulator-max-microvolt = <2484708>;
lltc,fb-voltage-divider = <100000 41200>;
regulator-boot-on;
regulator-always-on;
regulator-boot-on;
regulator-max-microvolt = <2484708>;
regulator-min-microvolt = <2484708>;
};
};
};
touchscreen@49 { /* TSC2004 */
touchscreen@49 { /* TSC2004 */
compatible = "ti,tsc2004";
interrupts-extended = <&gpio4 14 IRQ_TYPE_EDGE_FALLING>;
pinctrl-0 = <&pinctrl_tsc2004>;
pinctrl-names = "default";
reg = <0x49>;
vio-supply = <&reg_3p3v>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_tsc2004_hw300>;
interrupts-extended = <&gpio4 14 IRQ_TYPE_EDGE_FALLING>;
status = "disabled";
};
eeprom@50 {
compatible = "atmel,24c02";
reg = <0x50>;
pagesize = <16>;
reg = <0x50>;
};
rtc_i2c: rtc@56 {
compatible = "microcrystal,rv3029";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rtc_hw300>;
reg = <0x56>;
interrupt-parent = <&gpio7>;
interrupts = <12 2>;
interrupts = <12 IRQ_TYPE_EDGE_FALLING>;
pinctrl-0 = <&pinctrl_rtc>;
pinctrl-names = "default";
reg = <0x56>;
};
};
&iomuxc {
&pcie {
pinctrl-0 = <&pinctrl_pcie>;
pinctrl-names = "default";
};
&pwm1 {
pinctrl-0 = <&pinctrl_pwm1>;
pinctrl-names = "default";
};
&reg_arm {
vin-supply = <&sw3_reg>;
};
&reg_pu {
vin-supply = <&sw1_reg>;
};
&reg_soc {
vin-supply = <&sw1_reg>;
};
&reg_vdd1p1 {
vin-supply = <&sw2_reg>;
};
&reg_vdd2p5 {
vin-supply = <&sw2_reg>;
};
&uart1 { /* DHCOM UART1 */
dcd-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
dsr-gpios = <&gpio3 25 GPIO_ACTIVE_LOW>;
dtr-gpios = <&gpio3 24 GPIO_ACTIVE_LOW>;
rng-gpios = <&gpio2 31 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&pinctrl_uart1>;
pinctrl-names = "default";
uart-has-rtscts;
status = "okay";
};
&uart4 { /* DHCOM UART3 */
pinctrl-0 = <&pinctrl_uart4>;
pinctrl-names = "default";
status = "okay";
};
&uart5 { /* DHCOM UART2 */
pinctrl-0 = <&pinctrl_uart5>;
pinctrl-names = "default";
uart-has-rtscts;
status = "okay";
};
&usbh1 {
dr_mode = "host";
pinctrl-0 = <&pinctrl_usbh1>;
pinctrl-names = "default";
vbus-supply = <&reg_usb_h1_vbus>;
status = "okay";
};
&usbotg {
disable-over-current;
dr_mode = "otg";
pinctrl-0 = <&pinctrl_usbotg>;
pinctrl-names = "default";
vbus-supply = <&reg_usb_otg_vbus>;
status = "okay";
};
&usdhc2 { /* External SD card via DHCOM */
cd-gpios = <&gpio6 16 GPIO_ACTIVE_HIGH>;
keep-power-in-suspend;
pinctrl-0 = <&pinctrl_usdhc2>;
pinctrl-names = "default";
status = "disabled";
};
&usdhc3 { /* Micro SD card on module */
cd-gpios = <&gpio7 8 GPIO_ACTIVE_LOW>;
fsl,wp-controller;
keep-power-in-suspend;
pinctrl-0 = <&pinctrl_usdhc3>;
pinctrl-names = "default";
status = "okay";
};
&usdhc4 { /* eMMC on module */
bus-width = <8>;
keep-power-in-suspend;
no-1-8-v;
non-removable;
pinctrl-0 = <&pinctrl_usdhc4>;
pinctrl-names = "default";
status = "okay";
};
&weim {
#address-cells = <2>;
#size-cells = <1>;
fsl,weim-cs-gpr = <&gpr>;
pinctrl-0 = <&pinctrl_weim &pinctrl_weim_cs0 &pinctrl_weim_cs1>;
pinctrl-names = "default";
/* It is necessary to setup 2x 64MB otherwise setting gpr fails */
ranges = <0 0 0x08000000 0x04000000>, /* CS0 */
<1 0 0x0c000000 0x04000000>; /* CS1 */
status = "disabled";
};
&iomuxc {
pinctrl-0 = <
&pinctrl_hog_base
&pinctrl_dhcom_a &pinctrl_dhcom_b &pinctrl_dhcom_c
&pinctrl_dhcom_d &pinctrl_dhcom_e &pinctrl_dhcom_f
&pinctrl_dhcom_g &pinctrl_dhcom_h &pinctrl_dhcom_i
&pinctrl_dhcom_j &pinctrl_dhcom_k &pinctrl_dhcom_l
&pinctrl_dhcom_m &pinctrl_dhcom_n &pinctrl_dhcom_o
&pinctrl_dhcom_p &pinctrl_dhcom_q &pinctrl_dhcom_r
&pinctrl_dhcom_s &pinctrl_dhcom_t &pinctrl_dhcom_u
&pinctrl_dhcom_v &pinctrl_dhcom_w &pinctrl_dhcom_int
>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hog_base>;
pinctrl_hog_base: hog-base-grp {
fsl,pins = <
MX6QDL_PAD_EIM_A19__GPIO2_IO19 0x120b0
MX6QDL_PAD_EIM_A23__GPIO6_IO06 0x120b0
MX6QDL_PAD_EIM_A22__GPIO2_IO16 0x120b0
/* GPIOs for memory coding */
MX6QDL_PAD_EIM_A16__GPIO2_IO22 0x120b0
MX6QDL_PAD_EIM_A17__GPIO2_IO21 0x120b0
/* GPIOs for hardware coding */
MX6QDL_PAD_EIM_A19__GPIO2_IO19 0x120b0
MX6QDL_PAD_EIM_A22__GPIO2_IO16 0x120b0
MX6QDL_PAD_EIM_A23__GPIO6_IO06 0x120b0
>;
};
/* DHCOM GPIOs */
pinctrl_dhcom_a: dhcom-a-grp {
fsl,pins = <MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x400120b0>;
};
pinctrl_dhcom_b: dhcom-b-grp {
fsl,pins = <MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x400120b0>;
};
pinctrl_dhcom_c: dhcom-c-grp {
fsl,pins = <MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x400120b0>;
};
pinctrl_dhcom_d: dhcom-d-grp {
fsl,pins = <MX6QDL_PAD_CSI0_DAT17__GPIO6_IO03 0x400120b0>;
};
pinctrl_dhcom_e: dhcom-e-grp {
fsl,pins = <MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x400120b0>;
};
pinctrl_dhcom_f: dhcom-f-grp {
fsl,pins = <MX6QDL_PAD_DI0_PIN4__GPIO4_IO20 0x400120b0>;
};
pinctrl_dhcom_g: dhcom-g-grp {
fsl,pins = <MX6QDL_PAD_EIM_D27__GPIO3_IO27 0x400120b0>;
};
pinctrl_dhcom_h: dhcom-h-grp {
fsl,pins = <MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x400120b0>;
};
pinctrl_dhcom_i: dhcom-i-grp {
fsl,pins = <MX6QDL_PAD_KEY_COL1__GPIO4_IO08 0x400120b0>;
};
pinctrl_dhcom_j: dhcom-j-grp {
fsl,pins = <MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x400120b0>;
};
pinctrl_dhcom_k: dhcom-k-grp {
fsl,pins = <MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x400120b0>;
};
pinctrl_dhcom_l: dhcom-l-grp {
fsl,pins = <MX6QDL_PAD_KEY_ROW1__GPIO4_IO09 0x400120b0>;
};
pinctrl_dhcom_m: dhcom-m-grp {
fsl,pins = <MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x400120b0>;
};
pinctrl_dhcom_n: dhcom-n-grp {
fsl,pins = <MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x400120b0>;
};
pinctrl_dhcom_o: dhcom-o-grp {
fsl,pins = <MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21 0x400120b0>;
};
pinctrl_dhcom_p: dhcom-p-grp {
fsl,pins = <MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x400120b0>;
};
pinctrl_dhcom_q: dhcom-q-grp {
fsl,pins = <MX6QDL_PAD_SD1_CMD__GPIO1_IO18 0x400120b0>;
};
pinctrl_dhcom_r: dhcom-r-grp {
fsl,pins = <MX6QDL_PAD_SD1_DAT0__GPIO1_IO16 0x400120b0>;
};
pinctrl_dhcom_s: dhcom-s-grp {
fsl,pins = <MX6QDL_PAD_SD1_DAT1__GPIO1_IO17 0x400120b0>;
};
pinctrl_dhcom_t: dhcom-t-grp {
fsl,pins = <MX6QDL_PAD_SD1_DAT2__GPIO1_IO19 0x400120b0>;
};
pinctrl_dhcom_u: dhcom-u-grp {
fsl,pins = <MX6QDL_PAD_SD1_CLK__GPIO1_IO20 0x400120b0>;
};
pinctrl_dhcom_v: dhcom-v-grp {
fsl,pins = <MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18 0x400120b0>;
};
pinctrl_dhcom_w: dhcom-w-grp {
fsl,pins = <MX6QDL_PAD_CSI0_MCLK__GPIO5_IO19 0x400120b0>;
};
pinctrl_dhcom_int: dhcom-int-grp {
fsl,pins = <MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x400120b0>;
};
pinctrl_ecspi1: ecspi1-grp {
fsl,pins = <
MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b0
MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x1b0b0
>;
@ -272,18 +575,18 @@
pinctrl_ecspi2: ecspi2-grp {
fsl,pins = <
MX6QDL_PAD_CSI0_DAT10__ECSPI2_MISO 0x100b1
MX6QDL_PAD_CSI0_DAT9__ECSPI2_MOSI 0x100b1
MX6QDL_PAD_CSI0_DAT8__ECSPI2_SCLK 0x100b1
MX6QDL_PAD_CSI0_DAT9__ECSPI2_MOSI 0x100b1
MX6QDL_PAD_CSI0_DAT10__ECSPI2_MISO 0x100b1
MX6QDL_PAD_CSI0_DAT11__GPIO5_IO29 0x1b0b0
>;
};
pinctrl_enet_100M: enet-100M-grp {
fsl,pins = <
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x1b0b0
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER 0x1b0b0
MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1b0b0
MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x1b0b0
@ -291,8 +594,6 @@
MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x1b0b0
MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x1b0b0
MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
MX6QDL_PAD_EIM_WAIT__GPIO5_IO00 0x000b0
MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x000b1
>;
};
@ -302,10 +603,17 @@
>;
};
pinctrl_ethphy0: ethphy0-grp {
fsl,pins = <
MX6QDL_PAD_EIM_WAIT__GPIO5_IO00 0xb0 /* Reset */
MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0xb1 /* Int */
>;
};
pinctrl_flexcan1: flexcan1-grp {
fsl,pins = <
MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b0
MX6QDL_PAD_GPIO_8__FLEXCAN1_RX 0x1b0b0
MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b0
>;
};
@ -358,34 +666,46 @@
>;
};
pinctrl_pmic_hw300: pmic-hw300-grp {
pinctrl_pcie: pcie-grp {
fsl,pins = <
MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x1B0B0
MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20 0x1b0b1 /* Wake */
>;
};
pinctrl_rtc_hw300: rtc-hw300-grp {
pinctrl_pmic: pmic-grp {
fsl,pins = <
MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x120B0
MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x1b0b0
>;
};
pinctrl_tsc2004_hw300: tsc2004-hw300-grp {
pinctrl_pwm1: pwm1-grp {
fsl,pins = <
MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x120B0
MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1
>;
};
pinctrl_rtc: rtc-grp {
fsl,pins = <
MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x120b0
>;
};
pinctrl_tsc2004: tsc2004-grp {
fsl,pins = <
MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x120b0
>;
};
pinctrl_uart1: uart1-grp {
fsl,pins = <
MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
MX6QDL_PAD_EIM_D20__UART1_RTS_B 0x1b0b1
MX6QDL_PAD_EIM_D19__UART1_CTS_B 0x4001b0b1
MX6QDL_PAD_EIM_D20__UART1_RTS_B 0x1b0b1
MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x4001b0b1
MX6QDL_PAD_EIM_D24__GPIO3_IO24 0x4001b0b1
MX6QDL_PAD_EIM_D25__GPIO3_IO25 0x4001b0b1
MX6QDL_PAD_EIM_EB3__GPIO2_IO31 0x4001b0b1
MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
>;
};
@ -407,7 +727,7 @@
pinctrl_usbh1: usbh1-grp {
fsl,pins = <
MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x120B0
MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x120b0
>;
};
@ -419,32 +739,32 @@
pinctrl_usdhc2: usdhc2-grp {
fsl,pins = <
MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x120b0
MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x120B0
>;
};
pinctrl_usdhc3: usdhc3-grp {
fsl,pins = <
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x120B0
MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x120b0
>;
};
pinctrl_usdhc4: usdhc4-grp {
fsl,pins = <
MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059
MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
@ -455,92 +775,41 @@
MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059
>;
};
};
&reg_arm {
vin-supply = <&sw3_reg>;
};
pinctrl_weim: weim-grp {
fsl,pins = <
MX6QDL_PAD_EIM_DA0__EIM_AD00 0xb0a6
MX6QDL_PAD_EIM_DA1__EIM_AD01 0xb0a6
MX6QDL_PAD_EIM_DA2__EIM_AD02 0xb0a6
MX6QDL_PAD_EIM_DA3__EIM_AD03 0xb0a6
MX6QDL_PAD_EIM_DA4__EIM_AD04 0xb0a6
MX6QDL_PAD_EIM_DA5__EIM_AD05 0xb0a6
MX6QDL_PAD_EIM_DA6__EIM_AD06 0xb0a6
MX6QDL_PAD_EIM_DA7__EIM_AD07 0xb0a6
MX6QDL_PAD_EIM_DA8__EIM_AD08 0xb0a6
MX6QDL_PAD_EIM_DA9__EIM_AD09 0xb0a6
MX6QDL_PAD_EIM_DA10__EIM_AD10 0xb0a6
MX6QDL_PAD_EIM_DA11__EIM_AD11 0xb0a6
MX6QDL_PAD_EIM_DA12__EIM_AD12 0xb0a6
MX6QDL_PAD_EIM_DA13__EIM_AD13 0xb0a6
MX6QDL_PAD_EIM_DA14__EIM_AD14 0xb0a6
MX6QDL_PAD_EIM_DA15__EIM_AD15 0xb0a6
MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x130b0
MX6QDL_PAD_EIM_LBA__EIM_LBA_B 0xb060 /* LE */
MX6QDL_PAD_EIM_OE__EIM_OE_B 0xb0a6
MX6QDL_PAD_EIM_RW__EIM_RW 0xb0a6 /* WE */
>;
};
&reg_soc {
vin-supply = <&sw1_reg>;
};
pinctrl_weim_cs0: weim-cs0-grp {
fsl,pins = <
MX6QDL_PAD_EIM_CS0__EIM_CS0_B 0xb0b1
>;
};
&reg_pu {
vin-supply = <&sw1_reg>;
};
&reg_vdd1p1 {
vin-supply = <&sw2_reg>;
};
&reg_vdd2p5 {
vin-supply = <&sw2_reg>;
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
uart-has-rtscts;
dtr-gpios = <&gpio3 24 GPIO_ACTIVE_LOW>;
dsr-gpios = <&gpio3 25 GPIO_ACTIVE_LOW>;
dcd-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
rng-gpios = <&gpio2 31 GPIO_ACTIVE_LOW>;
status = "okay";
};
&uart4 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart4>;
status = "okay";
};
&uart5 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart5>;
uart-has-rtscts;
status = "okay";
};
&usbh1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbh1>;
vbus-supply = <&reg_usb_h1_vbus>;
dr_mode = "host";
status = "okay";
};
&usbotg {
vbus-supply = <&reg_usb_otg_vbus>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbotg>;
disable-over-current;
dr_mode = "otg";
status = "okay";
};
&usdhc2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc2>;
cd-gpios = <&gpio6 16 GPIO_ACTIVE_HIGH>;
keep-power-in-suspend;
status = "okay";
};
&usdhc3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc3>;
cd-gpios = <&gpio7 8 GPIO_ACTIVE_LOW>;
fsl,wp-controller;
keep-power-in-suspend;
status = "disabled";
};
&usdhc4 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc4>;
non-removable;
bus-width = <8>;
no-1-8-v;
keep-power-in-suspend;
status = "okay";
pinctrl_weim_cs1: weim-cs1-grp {
fsl,pins = <
MX6QDL_PAD_EIM_CS1__EIM_CS1_B 0xb0b1
>;
};
};

1
arch/arm/boot/dts/imx6qdl-gw51xx.dtsi
View File

@ -626,6 +626,7 @@
fsl,pins = <
MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 /* OTG_PWR_EN */
MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x17059
>;
};

1
arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
View File

@ -728,6 +728,7 @@
fsl,pins = <
MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 /* OTG_PWR_EN */
MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x17059
>;
};

1
arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
View File

@ -812,6 +812,7 @@
fsl,pins = <
MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 /* PWR_EN */
MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x17059
>;
};

1
arch/arm/boot/dts/imx6qdl-gw553x.dtsi
View File

@ -687,6 +687,7 @@
fsl,pins = <
MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 /* OTG_PWR_EN */
MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x17059
>;
};

5
arch/arm/boot/dts/imx6qdl-gw5904.dtsi
View File

@ -467,6 +467,11 @@
};
};
crypto@60 {
compatible = "atmel,atecc508a";
reg = <0x60>;
};
imu@6a {
compatible = "st,lsm9ds1-imu";
reg = <0x6a>;

54
arch/arm/boot/dts/imx6qdl-skov-cpu-revc.dtsi Normal file
View File

@ -0,0 +1,54 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
//
// Copyright (C) 2020 Pengutronix, Ulrich Oelmann <kernel@pengutronix.de>
&ecspi4 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi4>;
cs-gpios = <&gpio3 20 GPIO_ACTIVE_LOW>;
status = "okay";
touchscreen@0 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_touch>;
compatible = "ti,tsc2046";
reg = <0>;
spi-max-frequency = <1000000>;
interrupts-extended = <&gpio3 19 IRQ_TYPE_LEVEL_LOW>;
vcc-supply = <&reg_3v3>;
pendown-gpio = <&gpio3 19 GPIO_ACTIVE_LOW>;
ti,x-plate-ohms = /bits/ 16 <850>;
ti,y-plate-ohms = /bits/ 16 <295>;
ti,pressure-min = /bits/ 16 <2>;
ti,pressure-max = /bits/ 16 <1500>;
ti,vref-mv = /bits/ 16 <3300>;
ti,settle-delay-usec = /bits/ 16 <15>;
ti,vref-delay-usecs = /bits/ 16 <0>;
ti,penirq-recheck-delay-usecs = /bits/ 16 <100>;
ti,debounce-max = /bits/ 16 <100>;
ti,debounce-tol = /bits/ 16 <(~0)>;
ti,debounce-rep = /bits/ 16 <4>;
touchscreen-swapped-x-y;
touchscreen-inverted-y;
wakeup-source;
};
};
&iomuxc {
pinctrl_ecspi4: ecspi4grp {
fsl,pins = <
MX6QDL_PAD_EIM_D28__ECSPI4_MOSI 0x100b1
MX6QDL_PAD_EIM_D22__ECSPI4_MISO 0x000b1
MX6QDL_PAD_EIM_D21__ECSPI4_SCLK 0x000b1
/* *no* external pull up */
MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x40000058
>;
};
pinctrl_touch: touchgrp {
fsl,pins = <
/* external pull up */
MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x10040
>;
};
};

477
arch/arm/boot/dts/imx6qdl-skov-cpu.dtsi Normal file
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@ -0,0 +1,477 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
//
// Copyright (C) 2020 Pengutronix, Ulrich Oelmann <kernel@pengutronix.de>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/leds/common.h>
/ {
chosen {
stdout-path = &uart2;
};
aliases {
can0 = &can1;
can1 = &can2;
mdio-gpio0 = &mdio;
nand = &gpmi;
rtc0 = &i2c_rtc;
rtc1 = &snvs;
usb0 = &usbh1;
usb1 = &usbotg;
};
iio-hwmon {
compatible = "iio-hwmon";
io-channels = <&adc 0>, /* 24V */
<&adc 1>; /* temperature */
};
leds {
compatible = "gpio-leds";
led-0 {
label = "D1";
gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
function = LED_FUNCTION_STATUS;
default-state = "on";
linux,default-trigger = "heartbeat";
};
led-1 {
label = "D2";
gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
led-2 {
label = "D3";
gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
default-state = "on";
};
};
mdio: mdio {
compatible = "microchip,mdio-smi0";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mdio>;
#address-cells = <1>;
#size-cells = <0>;
gpios = <&gpio1 31 GPIO_ACTIVE_HIGH>,
<&gpio1 22 GPIO_ACTIVE_HIGH>;
switch@0 {
compatible = "microchip,ksz8873";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_switch>;
interrupt-parent = <&gpio3>;
interrupt = <30 IRQ_TYPE_LEVEL_HIGH>;
reset-gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
reg = <0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
ports@0 {
reg = <0>;
phy-mode = "internal";
label = "lan1";
};
ports@1 {
reg = <1>;
phy-mode = "internal";
label = "lan2";
};
ports@2 {
reg = <2>;
label = "cpu";
ethernet = <&fec>;
phy-mode = "rmii";
fixed-link {
speed = <100>;
full-duplex;
};
};
};
};
};
clk50m_phy: phy-clock {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <50000000>;
};
reg_3v3: regulator-3v3 {
compatible = "regulator-fixed";
vin-supply = <&reg_5v0>;
regulator-name = "3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
reg_5v0: regulator-5v0 {
compatible = "regulator-fixed";
regulator-name = "5v0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};
reg_24v0: regulator-24v0 {
compatible = "regulator-fixed";
regulator-name = "24v0";
regulator-min-microvolt = <24000000>;
regulator-max-microvolt = <24000000>;
};
reg_can1_stby: regulator-can1-stby {
compatible = "regulator-fixed";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_can1_stby>;
regulator-name = "can1-3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio3 31 GPIO_ACTIVE_LOW>;
};
reg_can2_stby: regulator-can2-stby {
compatible = "regulator-fixed";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_can2_stby>;
regulator-name = "can2-3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio4 11 GPIO_ACTIVE_LOW>;
};
reg_vcc_mmc: regulator-vcc-mmc {
compatible = "regulator-fixed";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_vcc_mmc>;
vin-supply = <&reg_3v3>;
regulator-name = "mmc_vcc_supply";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
gpio = <&gpio7 8 GPIO_ACTIVE_HIGH>;
enable-active-high;
startup-delay-us = <100>;
};
reg_vcc_mmc_io: regulator-vcc-mmc-io {
compatible = "regulator-gpio";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_vcc_mmc_io>;
vin-supply = <&reg_5v0>;
regulator-name = "mmc_io_supply";
regulator-type = "voltage";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
gpios = <&gpio7 13 GPIO_ACTIVE_HIGH>;
enable-active-high;
states = <1800000 0x1>, <3300000 0x0>;
startup-delay-us = <100>;
};
};
&can1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_can1>;
xceiver-supply = <&reg_can1_stby>;
status = "okay";
};
&can2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_can2>;
xceiver-supply = <&reg_can2_stby>;
status = "okay";
};
&ecspi1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi1>;
cs-gpios = <&gpio3 24 GPIO_ACTIVE_LOW>;
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
spi-max-frequency = <54000000>;
reg = <0>;
};
};
&ecspi2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi2>;
cs-gpios = <&gpio2 26 GPIO_ACTIVE_LOW>;
status = "okay";
adc: adc@0 {
compatible = "microchip,mcp3002";
reg = <0>;
vref-supply = <&reg_3v3>;
spi-max-frequency = <1000000>;
#io-channel-cells = <1>;
};
};
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>;
clocks = <&clks IMX6QDL_CLK_ENET>,
<&clks IMX6QDL_CLK_ENET>,
<&clk50m_phy>;
clock-names = "ipg", "ahb", "ptp";
phy-mode = "rmii";
phy-supply = <&reg_3v3>;
status = "okay";
fixed-link {
speed = <100>;
full-duplex;
};
};
&gpmi {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpmi_nand>;
nand-on-flash-bbt;
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
};
&i2c3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c3>;
clock-frequency = <400000>;
status = "okay";
i2c_rtc: rtc@51 {
compatible = "nxp,pcf85063";
reg = <0x51>;
quartz-load-femtofarads = <12500>;
};
};
&pwm2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm2>;
#pwm-cells = <2>;
status = "okay";
};
&pwm3 {
/* used for LCD contrast control */
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm3>;
status = "okay";
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2>;
status = "okay";
};
&usbh1 {
vbus-supply = <&reg_5v0>;
disable-over-current;
status = "okay";
};
/* no usbh2 */
&usbphynop1 {
status = "disabled";
};
/* no usbh3 */
&usbphynop2 {
status = "disabled";
};
&usbotg {
vbus-supply = <&reg_5v0>;
disable-over-current;
status = "okay";
};
&usdhc3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc3>;
wp-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
cap-power-off-card;
full-pwr-cycle;
bus-width = <4>;
max-frequency = <50000000>;
cap-sd-highspeed;
sd-uhs-sdr12;
sd-uhs-sdr25;
sd-uhs-sdr50;
sd-uhs-ddr50;
mmc-ddr-1_8v;
vmmc-supply = <&reg_vcc_mmc>;
vqmmc-supply = <&reg_vcc_mmc_io>;
status = "okay";
};
&iomuxc {
pinctrl_can1: can1grp {
fsl,pins = <
MX6QDL_PAD_GPIO_7__FLEXCAN1_TX 0x3008
MX6QDL_PAD_GPIO_8__FLEXCAN1_RX 0x1b000
>;
};
pinctrl_can1_stby: can1stbygrp {
fsl,pins = <
MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x13008
>;
};
pinctrl_can2: can2grp {
fsl,pins = <
MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x3008
MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x1b000
>;
};
pinctrl_can2_stby: can2stbygrp {
fsl,pins = <
MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x13008
>;
};
pinctrl_ecspi1: ecspi1grp {
fsl,pins = <
MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0xb1
MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0xb1
/* *no* external pull up */
MX6QDL_PAD_EIM_D24__GPIO3_IO24 0x58
>;
};
pinctrl_ecspi2: ecspi2grp {
fsl,pins = <
MX6QDL_PAD_EIM_OE__ECSPI2_MISO 0x100b1
MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI 0xb1
MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0xb1
/* external pull up */
MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x58
>;
};
pinctrl_enet: enetgrp {
fsl,pins = <
/* RMII 50 MHz */
MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x100f5
MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x100f5
MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x100c0
MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x100c0
MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x100f5
MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x100f5
MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x1b0b0
MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x58
/* GPIO for "link active" */
MX6QDL_PAD_ENET_RX_ER__GPIO1_IO24 0x3038
>;
};
pinctrl_gpmi_nand: gpminandgrp {
fsl,pins = <
MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1
MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
>;
};
pinctrl_i2c3: i2c3grp {
fsl,pins = <
/* external 10 k pull up */
MX6QDL_PAD_GPIO_3__I2C3_SCL 0x40010878
/* external 10 k pull up */
MX6QDL_PAD_GPIO_6__I2C3_SDA 0x40010878
>;
};
pinctrl_mdio: mdiogrp {
fsl,pins = <
MX6QDL_PAD_ENET_MDIO__GPIO1_IO22 0x100b1
MX6QDL_PAD_ENET_MDC__GPIO1_IO31 0xb1
>;
};
pinctrl_pwm2: pwm2grp {
fsl,pins = <
MX6QDL_PAD_GPIO_1__PWM2_OUT 0x58
>;
};
pinctrl_pwm3: pwm3grp {
fsl,pins = <
MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x58
>;
};
pinctrl_switch: switchgrp {
fsl,pins = <
MX6QDL_PAD_EIM_D30__GPIO3_IO30 0xb0
>;
};
pinctrl_uart2: uart2grp {
fsl,pins = <
MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1
MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
>;
};
pinctrl_usdhc3: usdhc3grp {
fsl,pins = <
/* SoC internal pull up required */
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
/* SoC internal pull up required */
MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1b040
/* SoC internal pull up required */
MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b040
>;
};
pinctrl_vcc_mmc: vccmmcgrp {
fsl,pins = <
MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x58
>;
};
pinctrl_vcc_mmc_io: vccmmciogrp {
fsl,pins = <
MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x58
>;
};
};

160
arch/arm/boot/dts/imx6qdl-solidsense.dtsi Normal file
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@ -0,0 +1,160 @@
/*
* Copyright (C) 2021 Russell King <rmk@armlinux.org.uk>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
#include <dt-bindings/leds/common.h>
/ {
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_solidsense_leds>;
/* Red/Green LED1 - next to WiFi SMA */
led-11 {
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_INDICATOR;
function-enumerator = <0>;
gpios = <&gpio2 26 GPIO_ACTIVE_LOW>;
};
led-12 {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_INDICATOR;
function-enumerator = <0>;
gpios = <&gpio2 23 GPIO_ACTIVE_LOW>;
};
/* Red/Green LED2 - next to GPS SMA */
led-21 {
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_INDICATOR;
function-enumerator = <1>;
gpios = <&gpio2 25 GPIO_ACTIVE_LOW>;
};
led-22 {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_INDICATOR;
function-enumerator = <1>;
gpios = <&gpio2 24 GPIO_ACTIVE_LOW>;
};
};
};
&audio {
status = "disabled";
};
&ecspi2 {
status = "disabled";
};
&i2c3 {
status = "disabled";
};
&iomuxc {
pinctrl-0 = <&pinctrl_hog>, <&pinctrl_solidsense_hog>;
solidsense {
pinctrl_solidsense_hog: solidsense-hog {
fsl,pins = <
/* Nordic RESET_N */
MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x400130b1
/* Nordic Chip 1 SWDIO - GPIO 125 */
MX6QDL_PAD_DISP0_DAT8__GPIO4_IO29 0x400130b1
/* Nordic Chip 1 SWDCLK - GPIO 59 */
/* already claimed in the HB2 hogs */
/* MX6QDL_PAD_EIM_LBA__GPIO2_IO27 0x400130b1 */
/* Nordic Chip 2 SWDIO - GPIO 81 */
MX6QDL_PAD_EIM_D17__GPIO3_IO17 0x400130b1
/* Nordic Chip 2 SWCLK - GPIO 82 */
MX6QDL_PAD_EIM_D18__GPIO3_IO18 0x400130b1
>;
};
pinctrl_solidsense_leds: solidsense-leds {
fsl,pins = <
/* Red LED 1 - GPIO 58 */
MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x400130b1
/* Green LED 1 - GPIO 55 */
MX6QDL_PAD_EIM_CS0__GPIO2_IO23 0x400130b1
/* Red LED 2 - GPIO 57 */
MX6QDL_PAD_EIM_OE__GPIO2_IO25 0x400130b1
/* Green LED 2 - GPIO 56 */
MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x400130b1
>;
};
pinctrl_solidsense_uart2: solidsense-uart2 {
fsl,pins = <
MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
>;
};
pinctrl_solidsense_uart3: solidsense-uart3 {
fsl,pins = <
MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
>;
};
};
};
&pwm1 {
status = "disabled";
};
&sgtl5000 {
status = "disabled";
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_solidsense_uart2>;
status = "okay";
};
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_solidsense_uart3>;
status = "okay";
};

2
arch/arm/boot/dts/imx6qp-prtwd3.dts
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@ -208,6 +208,8 @@
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>;
assigned-clocks = <&clks IMX6QDL_CLK_ENET_REF>;
assigned-clock-rates = <125000000>;
status = "okay";
phy-mode = "rgmii";

30
arch/arm/boot/dts/imx6s-dhcom-drc02.dts Normal file
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@ -0,0 +1,30 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2021 DH electronics GmbH
*
* DHCOM iMX6 variant:
* DHCM-iMX6S-C0800-R102-F0409-E-CAN2-RTC-I-01D2
* DHCOM PCB number: 493-400 or newer
* DRC02 PCB number: 568-100 or newer
*/
/dts-v1/;
/*
* The kernel only distinguishes between i.MX6 Quad and DualLite,
* but the Solo is actually a DualLite with only one CPU. So use
* DualLite for the Solo and disable one CPU node.
*/
#include "imx6dl.dtsi"
#include "imx6qdl-dhcom-som.dtsi"
#include "imx6qdl-dhcom-drc02.dtsi"
/ {
model = "DH electronics i.MX6S DHCOM on DRC02";
compatible = "dh,imx6s-dhcom-drc02", "dh,imx6s-dhcom-som",
"fsl,imx6dl";
cpus {
/delete-node/ cpu@1;
};
};

91
arch/arm/boot/dts/imx7d-remarkable2.dts
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@ -21,6 +21,27 @@
device_type = "memory";
reg = <0x80000000 0x40000000>;
};
reg_brcm: regulator-brcm {
compatible = "regulator-fixed";
regulator-name = "brcm_reg";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_brcm_reg>;
gpio = <&gpio6 13 GPIO_ACTIVE_HIGH>;
enable-active-high;
startup-delay-us = <150>;
};
wifi_pwrseq: wifi_pwrseq {
compatible = "mmc-pwrseq-simple";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_wifi>;
reset-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
clocks = <&clks IMX7D_CLKO2_ROOT_DIV>;
clock-names = "ext_clock";
};
};
&clks {
@ -56,6 +77,27 @@
status = "okay";
};
&usdhc2 {
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
pinctrl-0 = <&pinctrl_usdhc2>;
pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
mmc-pwrseq = <&wifi_pwrseq>;
vmmc-supply = <&reg_brcm>;
bus-width = <4>;
non-removable;
keep-power-in-suspend;
cap-power-off-card;
status = "okay";
brcmf: bcrmf@1 {
reg = <1>;
compatible = "brcm,bcm4329-fmac";
};
};
&usdhc3 {
pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
pinctrl-0 = <&pinctrl_usdhc3>;
@ -76,6 +118,13 @@
};
&iomuxc {
pinctrl_brcm_reg: brcmreggrp {
fsl,pins = <
/* WIFI_PWR_EN */
MX7D_PAD_SAI1_TX_BCLK__GPIO6_IO13 0x14
>;
};
pinctrl_uart1: uart1grp {
fsl,pins = <
MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX 0x79
@ -90,6 +139,39 @@
>;
};
pinctrl_usdhc2: usdhc2grp {
fsl,pins = <
MX7D_PAD_SD2_CMD__SD2_CMD 0x59
MX7D_PAD_SD2_CLK__SD2_CLK 0x19
MX7D_PAD_SD2_DATA0__SD2_DATA0 0x59
MX7D_PAD_SD2_DATA1__SD2_DATA1 0x59
MX7D_PAD_SD2_DATA2__SD2_DATA2 0x59
MX7D_PAD_SD2_DATA3__SD2_DATA3 0x59
>;
};
pinctrl_usdhc2_100mhz: usdhc2grp_100mhz {
fsl,pins = <
MX7D_PAD_SD2_CMD__SD2_CMD 0x5a
MX7D_PAD_SD2_CLK__SD2_CLK 0x1a
MX7D_PAD_SD2_DATA0__SD2_DATA0 0x5a
MX7D_PAD_SD2_DATA1__SD2_DATA1 0x5a
MX7D_PAD_SD2_DATA2__SD2_DATA2 0x5a
MX7D_PAD_SD2_DATA3__SD2_DATA3 0x5a
>;
};
pinctrl_usdhc2_200mhz: usdhc2grp_200mhz {
fsl,pins = <
MX7D_PAD_SD2_CMD__SD2_CMD 0x5b
MX7D_PAD_SD2_CLK__SD2_CLK 0x1b
MX7D_PAD_SD2_DATA0__SD2_DATA0 0x5b
MX7D_PAD_SD2_DATA1__SD2_DATA1 0x5b
MX7D_PAD_SD2_DATA2__SD2_DATA2 0x5b
MX7D_PAD_SD2_DATA3__SD2_DATA3 0x5b
>;
};
pinctrl_usdhc3: usdhc3grp {
fsl,pins = <
MX7D_PAD_SD3_CMD__SD3_CMD 0x59
@ -143,4 +225,13 @@
MX7D_PAD_ENET1_COL__WDOG1_WDOG_ANY 0x74
>;
};
pinctrl_wifi: wifigrp {
fsl,pins = <
/* WiFi Reg On */
MX7D_PAD_SD2_CD_B__GPIO5_IO9 0x00000014
/* WiFi Sleep 32k */
MX7D_PAD_SD1_WP__CCM_CLKO2 0x00000014
>;
};
};

28
arch/arm/boot/dts/imx7s.dtsi
View File

@ -707,6 +707,34 @@
status = "disabled";
};
ftm1: pwm@30640000 {
compatible = "fsl,vf610-ftm-pwm";
reg = <0x30640000 0x10000>;
#pwm-cells = <3>;
interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "ftm_sys", "ftm_ext",
"ftm_fix", "ftm_cnt_clk_en";
clocks = <&clks IMX7D_FLEXTIMER1_ROOT_CLK>,
<&clks IMX7D_FLEXTIMER1_ROOT_CLK>,
<&clks IMX7D_FLEXTIMER1_ROOT_CLK>,
<&clks IMX7D_FLEXTIMER1_ROOT_CLK>;
status = "disabled";
};
ftm2: pwm@30650000 {
compatible = "fsl,vf610-ftm-pwm";
reg = <0x30650000 0x10000>;
#pwm-cells = <3>;
interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "ftm_sys", "ftm_ext",
"ftm_fix", "ftm_cnt_clk_en";
clocks = <&clks IMX7D_FLEXTIMER2_ROOT_CLK>,
<&clks IMX7D_FLEXTIMER2_ROOT_CLK>,
<&clks IMX7D_FLEXTIMER2_ROOT_CLK>,
<&clks IMX7D_FLEXTIMER2_ROOT_CLK>;
status = "disabled";
};
pwm1: pwm@30660000 {
compatible = "fsl,imx7d-pwm", "fsl,imx27-pwm";
reg = <0x30660000 0x10000>;

2
arch/arm/boot/dts/vf610-zii-dev-rev-b.dts
View File

@ -311,8 +311,6 @@
compatible = "atmel,at93c46d";
pinctrl-0 = <&pinctrl_gpio_e6185_eeprom_sel>;
pinctrl-names = "default";
#address-cells = <0>;
#size-cells = <0>;
reg = <1>;
spi-max-frequency = <500000>;
spi-cs-high;