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ARM: dts: exynos: Add soc node to exynos4210
Soc nodes are used in other exynos DTS. Exynos4210 boards should use them as well. Signed-off-by: Maciej Purski <m.purski@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
This commit is contained in:
Maciej Purski
Krzysztof Kozlowski
parent
73a901d09a
commit
9a8665ab92
@ -60,96 +60,298 @@
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};
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};
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sysram: sysram@2020000 {
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compatible = "mmio-sram";
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reg = <0x02020000 0x20000>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 0x02020000 0x20000>;
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soc: soc {
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sysram: sysram@2020000 {
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compatible = "mmio-sram";
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reg = <0x02020000 0x20000>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 0x02020000 0x20000>;
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smp-sysram@0 {
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compatible = "samsung,exynos4210-sysram";
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reg = <0x0 0x1000>;
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smp-sysram@0 {
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compatible = "samsung,exynos4210-sysram";
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reg = <0x0 0x1000>;
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};
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smp-sysram@1f000 {
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compatible = "samsung,exynos4210-sysram-ns";
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reg = <0x1f000 0x1000>;
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};
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};
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smp-sysram@1f000 {
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compatible = "samsung,exynos4210-sysram-ns";
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reg = <0x1f000 0x1000>;
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pd_lcd1: lcd1-power-domain@10023ca0 {
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compatible = "samsung,exynos4210-pd";
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reg = <0x10023CA0 0x20>;
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#power-domain-cells = <0>;
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label = "LCD1";
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};
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};
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pd_lcd1: lcd1-power-domain@10023ca0 {
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compatible = "samsung,exynos4210-pd";
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reg = <0x10023CA0 0x20>;
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#power-domain-cells = <0>;
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label = "LCD1";
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};
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l2c: l2-cache-controller@10502000 {
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compatible = "arm,pl310-cache";
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reg = <0x10502000 0x1000>;
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cache-unified;
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cache-level = <2>;
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arm,tag-latency = <2 2 1>;
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arm,data-latency = <2 2 1>;
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};
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l2c: l2-cache-controller@10502000 {
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compatible = "arm,pl310-cache";
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reg = <0x10502000 0x1000>;
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cache-unified;
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cache-level = <2>;
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arm,tag-latency = <2 2 1>;
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arm,data-latency = <2 2 1>;
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};
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mct: mct@10050000 {
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compatible = "samsung,exynos4210-mct";
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reg = <0x10050000 0x800>;
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interrupt-parent = <&mct_map>;
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interrupts = <0>, <1>, <2>, <3>, <4>, <5>;
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clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
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clock-names = "fin_pll", "mct";
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mct: mct@10050000 {
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compatible = "samsung,exynos4210-mct";
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reg = <0x10050000 0x800>;
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interrupt-parent = <&mct_map>;
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interrupts = <0>, <1>, <2>, <3>, <4>, <5>;
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clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
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clock-names = "fin_pll", "mct";
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mct_map: mct-map {
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#interrupt-cells = <1>;
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#address-cells = <0>;
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#size-cells = <0>;
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interrupt-map = <0 &gic 0 57 IRQ_TYPE_LEVEL_HIGH>,
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mct_map: mct-map {
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#interrupt-cells = <1>;
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#address-cells = <0>;
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#size-cells = <0>;
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interrupt-map =
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<0 &gic 0 57 IRQ_TYPE_LEVEL_HIGH>,
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<1 &gic 0 69 IRQ_TYPE_LEVEL_HIGH>,
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<2 &combiner 12 6>,
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<3 &combiner 12 7>,
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<4 &gic 0 42 IRQ_TYPE_LEVEL_HIGH>,
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<5 &gic 0 48 IRQ_TYPE_LEVEL_HIGH>;
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};
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};
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};
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watchdog: watchdog@10060000 {
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compatible = "samsung,s3c6410-wdt";
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reg = <0x10060000 0x100>;
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interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clock CLK_WDT>;
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clock-names = "watchdog";
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};
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clock: clock-controller@10030000 {
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compatible = "samsung,exynos4210-clock";
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reg = <0x10030000 0x20000>;
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#clock-cells = <1>;
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};
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pinctrl_0: pinctrl@11400000 {
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compatible = "samsung,exynos4210-pinctrl";
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reg = <0x11400000 0x1000>;
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interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
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};
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pinctrl_1: pinctrl@11000000 {
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compatible = "samsung,exynos4210-pinctrl";
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reg = <0x11000000 0x1000>;
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interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
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wakup_eint: wakeup-interrupt-controller {
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compatible = "samsung,exynos4210-wakeup-eint";
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interrupt-parent = <&gic>;
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interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
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watchdog: watchdog@10060000 {
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compatible = "samsung,s3c6410-wdt";
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reg = <0x10060000 0x100>;
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interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clock CLK_WDT>;
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clock-names = "watchdog";
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};
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};
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pinctrl_2: pinctrl@3860000 {
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compatible = "samsung,exynos4210-pinctrl";
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reg = <0x03860000 0x1000>;
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clock: clock-controller@10030000 {
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compatible = "samsung,exynos4210-clock";
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reg = <0x10030000 0x20000>;
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#clock-cells = <1>;
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};
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pinctrl_0: pinctrl@11400000 {
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compatible = "samsung,exynos4210-pinctrl";
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reg = <0x11400000 0x1000>;
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interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
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};
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pinctrl_1: pinctrl@11000000 {
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compatible = "samsung,exynos4210-pinctrl";
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reg = <0x11000000 0x1000>;
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interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
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wakup_eint: wakeup-interrupt-controller {
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compatible = "samsung,exynos4210-wakeup-eint";
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interrupt-parent = <&gic>;
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interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
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};
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};
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pinctrl_2: pinctrl@3860000 {
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compatible = "samsung,exynos4210-pinctrl";
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reg = <0x03860000 0x1000>;
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};
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g2d: g2d@12800000 {
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compatible = "samsung,s5pv210-g2d";
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reg = <0x12800000 0x1000>;
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interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clock CLK_SCLK_FIMG2D>, <&clock CLK_G2D>;
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clock-names = "sclk_fimg2d", "fimg2d";
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power-domains = <&pd_lcd0>;
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iommus = <&sysmmu_g2d>;
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};
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ppmu_lcd1: ppmu_lcd1@12240000 {
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compatible = "samsung,exynos-ppmu";
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reg = <0x12240000 0x2000>;
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clocks = <&clock CLK_PPMULCD1>;
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clock-names = "ppmu";
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status = "disabled";
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};
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sysmmu_g2d: sysmmu@12a20000 {
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compatible = "samsung,exynos-sysmmu";
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reg = <0x12A20000 0x1000>;
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interrupt-parent = <&combiner>;
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interrupts = <4 7>;
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clock-names = "sysmmu", "master";
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clocks = <&clock CLK_SMMU_G2D>, <&clock CLK_G2D>;
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power-domains = <&pd_lcd0>;
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#iommu-cells = <0>;
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};
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sysmmu_fimd1: sysmmu@12220000 {
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compatible = "samsung,exynos-sysmmu";
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interrupt-parent = <&combiner>;
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reg = <0x12220000 0x1000>;
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interrupts = <5 3>;
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clock-names = "sysmmu", "master";
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clocks = <&clock CLK_SMMU_FIMD1>, <&clock CLK_FIMD1>;
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power-domains = <&pd_lcd1>;
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#iommu-cells = <0>;
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};
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bus_dmc: bus_dmc {
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compatible = "samsung,exynos-bus";
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clocks = <&clock CLK_DIV_DMC>;
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clock-names = "bus";
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operating-points-v2 = <&bus_dmc_opp_table>;
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status = "disabled";
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};
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bus_acp: bus_acp {
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compatible = "samsung,exynos-bus";
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clocks = <&clock CLK_DIV_ACP>;
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clock-names = "bus";
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operating-points-v2 = <&bus_acp_opp_table>;
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status = "disabled";
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};
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bus_peri: bus_peri {
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compatible = "samsung,exynos-bus";
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clocks = <&clock CLK_ACLK100>;
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clock-names = "bus";
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operating-points-v2 = <&bus_peri_opp_table>;
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status = "disabled";
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};
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bus_fsys: bus_fsys {
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compatible = "samsung,exynos-bus";
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clocks = <&clock CLK_ACLK133>;
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clock-names = "bus";
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operating-points-v2 = <&bus_fsys_opp_table>;
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status = "disabled";
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};
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bus_display: bus_display {
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compatible = "samsung,exynos-bus";
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clocks = <&clock CLK_ACLK160>;
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clock-names = "bus";
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operating-points-v2 = <&bus_display_opp_table>;
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status = "disabled";
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};
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bus_lcd0: bus_lcd0 {
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compatible = "samsung,exynos-bus";
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clocks = <&clock CLK_ACLK200>;
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clock-names = "bus";
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operating-points-v2 = <&bus_leftbus_opp_table>;
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status = "disabled";
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};
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bus_leftbus: bus_leftbus {
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compatible = "samsung,exynos-bus";
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clocks = <&clock CLK_DIV_GDL>;
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clock-names = "bus";
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operating-points-v2 = <&bus_leftbus_opp_table>;
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status = "disabled";
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};
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bus_rightbus: bus_rightbus {
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compatible = "samsung,exynos-bus";
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clocks = <&clock CLK_DIV_GDR>;
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clock-names = "bus";
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operating-points-v2 = <&bus_leftbus_opp_table>;
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status = "disabled";
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};
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bus_mfc: bus_mfc {
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compatible = "samsung,exynos-bus";
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clocks = <&clock CLK_SCLK_MFC>;
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clock-names = "bus";
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operating-points-v2 = <&bus_leftbus_opp_table>;
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status = "disabled";
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};
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bus_dmc_opp_table: opp_table1 {
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compatible = "operating-points-v2";
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opp-shared;
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opp-134000000 {
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opp-hz = /bits/ 64 <134000000>;
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opp-microvolt = <1025000>;
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};
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opp-267000000 {
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opp-hz = /bits/ 64 <267000000>;
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opp-microvolt = <1050000>;
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};
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opp-400000000 {
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opp-hz = /bits/ 64 <400000000>;
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opp-microvolt = <1150000>;
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};
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};
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bus_acp_opp_table: opp_table2 {
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compatible = "operating-points-v2";
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opp-shared;
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opp-134000000 {
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opp-hz = /bits/ 64 <134000000>;
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};
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opp-160000000 {
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opp-hz = /bits/ 64 <160000000>;
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};
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opp-200000000 {
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opp-hz = /bits/ 64 <200000000>;
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};
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};
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bus_peri_opp_table: opp_table3 {
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compatible = "operating-points-v2";
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opp-shared;
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opp-5000000 {
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opp-hz = /bits/ 64 <5000000>;
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};
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opp-100000000 {
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opp-hz = /bits/ 64 <100000000>;
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};
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};
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bus_fsys_opp_table: opp_table4 {
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compatible = "operating-points-v2";
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opp-shared;
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opp-10000000 {
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opp-hz = /bits/ 64 <10000000>;
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};
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opp-134000000 {
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opp-hz = /bits/ 64 <134000000>;
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};
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};
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bus_display_opp_table: opp_table5 {
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compatible = "operating-points-v2";
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opp-shared;
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opp-100000000 {
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opp-hz = /bits/ 64 <100000000>;
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};
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opp-134000000 {
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opp-hz = /bits/ 64 <134000000>;
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};
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opp-160000000 {
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opp-hz = /bits/ 64 <160000000>;
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};
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};
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bus_leftbus_opp_table: opp_table6 {
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compatible = "operating-points-v2";
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opp-shared;
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opp-100000000 {
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opp-hz = /bits/ 64 <100000000>;
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};
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opp-160000000 {
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opp-hz = /bits/ 64 <160000000>;
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};
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opp-200000000 {
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opp-hz = /bits/ 64 <200000000>;
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};
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};
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};
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thermal-zones {
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@ -159,217 +361,18 @@
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thermal-sensors = <&tmu 0>;
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trips {
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cpu_alert0: cpu-alert-0 {
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temperature = <85000>; /* millicelsius */
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};
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cpu_alert1: cpu-alert-1 {
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temperature = <100000>; /* millicelsius */
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};
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cpu_alert2: cpu-alert-2 {
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temperature = <110000>; /* millicelsius */
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};
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cpu_alert0: cpu-alert-0 {
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temperature = <85000>; /* millicelsius */
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};
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cpu_alert1: cpu-alert-1 {
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temperature = <100000>; /* millicelsius */
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};
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cpu_alert2: cpu-alert-2 {
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temperature = <110000>; /* millicelsius */
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};
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};
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};
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};
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g2d: g2d@12800000 {
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compatible = "samsung,s5pv210-g2d";
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reg = <0x12800000 0x1000>;
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interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clock CLK_SCLK_FIMG2D>, <&clock CLK_G2D>;
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clock-names = "sclk_fimg2d", "fimg2d";
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power-domains = <&pd_lcd0>;
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iommus = <&sysmmu_g2d>;
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};
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ppmu_lcd1: ppmu_lcd1@12240000 {
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compatible = "samsung,exynos-ppmu";
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reg = <0x12240000 0x2000>;
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clocks = <&clock CLK_PPMULCD1>;
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clock-names = "ppmu";
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status = "disabled";
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};
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sysmmu_g2d: sysmmu@12a20000 {
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compatible = "samsung,exynos-sysmmu";
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reg = <0x12A20000 0x1000>;
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interrupt-parent = <&combiner>;
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interrupts = <4 7>;
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clock-names = "sysmmu", "master";
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clocks = <&clock CLK_SMMU_G2D>, <&clock CLK_G2D>;
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power-domains = <&pd_lcd0>;
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#iommu-cells = <0>;
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};
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sysmmu_fimd1: sysmmu@12220000 {
|
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compatible = "samsung,exynos-sysmmu";
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interrupt-parent = <&combiner>;
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reg = <0x12220000 0x1000>;
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interrupts = <5 3>;
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clock-names = "sysmmu", "master";
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clocks = <&clock CLK_SMMU_FIMD1>, <&clock CLK_FIMD1>;
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power-domains = <&pd_lcd1>;
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#iommu-cells = <0>;
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};
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bus_dmc: bus_dmc {
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compatible = "samsung,exynos-bus";
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clocks = <&clock CLK_DIV_DMC>;
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clock-names = "bus";
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operating-points-v2 = <&bus_dmc_opp_table>;
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status = "disabled";
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};
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bus_acp: bus_acp {
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compatible = "samsung,exynos-bus";
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clocks = <&clock CLK_DIV_ACP>;
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clock-names = "bus";
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operating-points-v2 = <&bus_acp_opp_table>;
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status = "disabled";
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};
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bus_peri: bus_peri {
|
||||
compatible = "samsung,exynos-bus";
|
||||
clocks = <&clock CLK_ACLK100>;
|
||||
clock-names = "bus";
|
||||
operating-points-v2 = <&bus_peri_opp_table>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bus_fsys: bus_fsys {
|
||||
compatible = "samsung,exynos-bus";
|
||||
clocks = <&clock CLK_ACLK133>;
|
||||
clock-names = "bus";
|
||||
operating-points-v2 = <&bus_fsys_opp_table>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bus_display: bus_display {
|
||||
compatible = "samsung,exynos-bus";
|
||||
clocks = <&clock CLK_ACLK160>;
|
||||
clock-names = "bus";
|
||||
operating-points-v2 = <&bus_display_opp_table>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bus_lcd0: bus_lcd0 {
|
||||
compatible = "samsung,exynos-bus";
|
||||
clocks = <&clock CLK_ACLK200>;
|
||||
clock-names = "bus";
|
||||
operating-points-v2 = <&bus_leftbus_opp_table>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bus_leftbus: bus_leftbus {
|
||||
compatible = "samsung,exynos-bus";
|
||||
clocks = <&clock CLK_DIV_GDL>;
|
||||
clock-names = "bus";
|
||||
operating-points-v2 = <&bus_leftbus_opp_table>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bus_rightbus: bus_rightbus {
|
||||
compatible = "samsung,exynos-bus";
|
||||
clocks = <&clock CLK_DIV_GDR>;
|
||||
clock-names = "bus";
|
||||
operating-points-v2 = <&bus_leftbus_opp_table>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bus_mfc: bus_mfc {
|
||||
compatible = "samsung,exynos-bus";
|
||||
clocks = <&clock CLK_SCLK_MFC>;
|
||||
clock-names = "bus";
|
||||
operating-points-v2 = <&bus_leftbus_opp_table>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bus_dmc_opp_table: opp_table1 {
|
||||
compatible = "operating-points-v2";
|
||||
opp-shared;
|
||||
|
||||
opp-134000000 {
|
||||
opp-hz = /bits/ 64 <134000000>;
|
||||
opp-microvolt = <1025000>;
|
||||
};
|
||||
opp-267000000 {
|
||||
opp-hz = /bits/ 64 <267000000>;
|
||||
opp-microvolt = <1050000>;
|
||||
};
|
||||
opp-400000000 {
|
||||
opp-hz = /bits/ 64 <400000000>;
|
||||
opp-microvolt = <1150000>;
|
||||
};
|
||||
};
|
||||
|
||||
bus_acp_opp_table: opp_table2 {
|
||||
compatible = "operating-points-v2";
|
||||
opp-shared;
|
||||
|
||||
opp-134000000 {
|
||||
opp-hz = /bits/ 64 <134000000>;
|
||||
};
|
||||
opp-160000000 {
|
||||
opp-hz = /bits/ 64 <160000000>;
|
||||
};
|
||||
opp-200000000 {
|
||||
opp-hz = /bits/ 64 <200000000>;
|
||||
};
|
||||
};
|
||||
|
||||
bus_peri_opp_table: opp_table3 {
|
||||
compatible = "operating-points-v2";
|
||||
opp-shared;
|
||||
|
||||
opp-5000000 {
|
||||
opp-hz = /bits/ 64 <5000000>;
|
||||
};
|
||||
opp-100000000 {
|
||||
opp-hz = /bits/ 64 <100000000>;
|
||||
};
|
||||
};
|
||||
|
||||
bus_fsys_opp_table: opp_table4 {
|
||||
compatible = "operating-points-v2";
|
||||
opp-shared;
|
||||
|
||||
opp-10000000 {
|
||||
opp-hz = /bits/ 64 <10000000>;
|
||||
};
|
||||
opp-134000000 {
|
||||
opp-hz = /bits/ 64 <134000000>;
|
||||
};
|
||||
};
|
||||
|
||||
bus_display_opp_table: opp_table5 {
|
||||
compatible = "operating-points-v2";
|
||||
opp-shared;
|
||||
|
||||
opp-100000000 {
|
||||
opp-hz = /bits/ 64 <100000000>;
|
||||
};
|
||||
opp-134000000 {
|
||||
opp-hz = /bits/ 64 <134000000>;
|
||||
};
|
||||
opp-160000000 {
|
||||
opp-hz = /bits/ 64 <160000000>;
|
||||
};
|
||||
};
|
||||
|
||||
bus_leftbus_opp_table: opp_table6 {
|
||||
compatible = "operating-points-v2";
|
||||
opp-shared;
|
||||
|
||||
opp-100000000 {
|
||||
opp-hz = /bits/ 64 <100000000>;
|
||||
};
|
||||
opp-160000000 {
|
||||
opp-hz = /bits/ 64 <160000000>;
|
||||
};
|
||||
opp-200000000 {
|
||||
opp-hz = /bits/ 64 <200000000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&gic {
|
||||
|
||||
Loading…
Reference in New Issue
Block a user