korg/linux
0
0
Fork 0
mirror of https://mirrors.bfsu.edu.cn/git/linux.git synced 2024-11-18 01:34:14 +08:00
Code Issues Packages Projects Releases Wiki Activity

[media] cobalt: fix 64-bit division link error

Browse Source 
[linuxtv-media:master 1023/1029] ERROR: "__aeabi_uldivmod" [drivers/media/pci/cobalt/cobalt.ko] undefined!

Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Reported-by: kbuild test robot <fengguang.wu@intel.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
This commit is contained in:
Hans Verkuil 2015-05-21 09:37:40 -03:00 committed by Mauro Carvalho Chehab
parent 86bad00a2f
commit 99cabb1871
1 changed files with 4 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

7
drivers/media/pci/cobalt/cobalt-v4l2.c
View File

@ -22,6 +22,7 @@
#include <linux/dma-mapping.h> #include <linux/dma-mapping.h>
#include <linux/delay.h> #include <linux/delay.h>
#include <linux/math64.h>
#include <linux/pci.h> #include <linux/pci.h>
#include <linux/v4l2-dv-timings.h> #include <linux/v4l2-dv-timings.h>
@ -314,8 +315,8 @@ static int cobalt_start_streaming(struct vb2_queue *q, unsigned int count)
cvi->frame_height = bt->height; cvi->frame_height = bt->height;
tot_size = V4L2_DV_BT_FRAME_WIDTH(bt) * V4L2_DV_BT_FRAME_HEIGHT(bt); tot_size = V4L2_DV_BT_FRAME_WIDTH(bt) * V4L2_DV_BT_FRAME_HEIGHT(bt);
vmr->hsync_timeout_val = vmr->hsync_timeout_val =
((u64)V4L2_DV_BT_FRAME_WIDTH(bt) * COBALT_CLK * 4) / div_u64((u64)V4L2_DV_BT_FRAME_WIDTH(bt) * COBALT_CLK * 4,
bt->pixelclock; bt->pixelclock);
vmr->control = M00233_CONTROL_BITMAP_ENABLE_MEASURE_MSK; vmr->control = M00233_CONTROL_BITMAP_ENABLE_MEASURE_MSK;
clkloss->ref_clk_cnt_val = fw->clk_freq / 1000000; clkloss->ref_clk_cnt_val = fw->clk_freq / 1000000;
/* The lower bound for the clock frequency is 0.5% lower as is /* The lower bound for the clock frequency is 0.5% lower as is
@ -324,7 +325,7 @@ static int cobalt_start_streaming(struct vb2_queue *q, unsigned int count)
(((u64)bt->pixelclock * 995) / 1000) / 1000000; (((u64)bt->pixelclock * 995) / 1000) / 1000000;
/* will be enabled after the first frame has been received */ /* will be enabled after the first frame has been received */
fw->active_length = bt->width * bt->height; fw->active_length = bt->width * bt->height;
fw->total_length = ((u64)fw->clk_freq * tot_size) / bt->pixelclock; fw->total_length = div_u64((u64)fw->clk_freq * tot_size, bt->pixelclock);
vmr->irq_triggers = M00233_IRQ_TRIGGERS_BITMAP_VACTIVE_AREA_MSK | vmr->irq_triggers = M00233_IRQ_TRIGGERS_BITMAP_VACTIVE_AREA_MSK |
M00233_IRQ_TRIGGERS_BITMAP_HACTIVE_AREA_MSK; M00233_IRQ_TRIGGERS_BITMAP_HACTIVE_AREA_MSK;
cvi->control = 0; cvi->control = 0;