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pinctrl: intel: fix offset calculation issue of register PAD_OWN
The calculation equation of PAD_OWN register offset is not correct for Broxton, verified this fix will get right offset for Broxton. Signed-off-by: Qi Zheng <qi.zheng@intel.com> Signed-off-by: Qipeng Zha <qipeng.zha@intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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@ -34,6 +34,7 @@
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#define PADOWN_BITS 4
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#define PADOWN_SHIFT(p) ((p) % 8 * PADOWN_BITS)
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#define PADOWN_MASK(p) (0xf << PADOWN_SHIFT(p))
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#define PADOWN_GPP(p) ((p) / 8)
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/* Offset from pad_regs */
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#define PADCFG0 0x000
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@ -139,7 +140,7 @@ static void __iomem *intel_get_padcfg(struct intel_pinctrl *pctrl, unsigned pin,
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static bool intel_pad_owned_by_host(struct intel_pinctrl *pctrl, unsigned pin)
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{
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const struct intel_community *community;
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unsigned padno, gpp, gpp_offset, offset;
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unsigned padno, gpp, offset, group;
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void __iomem *padown;
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community = intel_get_community(pctrl, pin);
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@ -149,9 +150,9 @@ static bool intel_pad_owned_by_host(struct intel_pinctrl *pctrl, unsigned pin)
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return true;
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padno = pin_to_padno(community, pin);
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gpp = padno / NPADS_IN_GPP;
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gpp_offset = padno % NPADS_IN_GPP;
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offset = community->padown_offset + gpp * 16 + (gpp_offset / 8) * 4;
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group = padno / community->gpp_size;
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gpp = PADOWN_GPP(padno % community->gpp_size);
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offset = community->padown_offset + 0x10 * group + gpp * 4;
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padown = community->regs + offset;
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return !(readl(padown) & PADOWN_MASK(padno));
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