mirror of
https://mirrors.bfsu.edu.cn/git/linux.git
synced 2024-11-17 01:04:19 +08:00
omap iommu: update irq mask to be specific about twl and tlb
Revise the IRQ mask definitions to handle the MMU faults related to TWL fault as well as TLB miss fault. Signed-off-by: Hari Kanigeri <h-kanigeri2@ti.com> Signed-off-by: Hiroshi Doyu <Hiroshi.DOYU@nokia.com>
This commit is contained in:
parent
124933599a
commit
993dd17e32
@ -44,9 +44,13 @@
|
||||
#define MMU_IRQ_EMUMISS (1 << 2)
|
||||
#define MMU_IRQ_TRANSLATIONFAULT (1 << 1)
|
||||
#define MMU_IRQ_TLBMISS (1 << 0)
|
||||
#define MMU_IRQ_MASK \
|
||||
(MMU_IRQ_MULTIHITFAULT | MMU_IRQ_TABLEWALKFAULT | MMU_IRQ_EMUMISS | \
|
||||
MMU_IRQ_TRANSLATIONFAULT)
|
||||
|
||||
#define __MMU_IRQ_FAULT \
|
||||
(MMU_IRQ_MULTIHITFAULT | MMU_IRQ_EMUMISS | MMU_IRQ_TRANSLATIONFAULT)
|
||||
#define MMU_IRQ_MASK \
|
||||
(__MMU_IRQ_FAULT | MMU_IRQ_TABLEWALKFAULT | MMU_IRQ_TLBMISS)
|
||||
#define MMU_IRQ_TWL_MASK (__MMU_IRQ_FAULT | MMU_IRQ_TABLEWALKFAULT)
|
||||
#define MMU_IRQ_TLB_MISS_MASK (__MMU_IRQ_FAULT | MMU_IRQ_TLBMISS)
|
||||
|
||||
/* MMU_CNTL */
|
||||
#define MMU_CNTL_SHIFT 1
|
||||
@ -96,7 +100,7 @@ static int omap2_iommu_enable(struct iommu *obj)
|
||||
l |= (MMU_SYS_IDLE_SMART | MMU_SYS_AUTOIDLE);
|
||||
iommu_write_reg(obj, l, MMU_SYSCONFIG);
|
||||
|
||||
iommu_write_reg(obj, MMU_IRQ_MASK, MMU_IRQENABLE);
|
||||
iommu_write_reg(obj, MMU_IRQ_TWL_MASK, MMU_IRQENABLE);
|
||||
iommu_write_reg(obj, pa, MMU_TTB);
|
||||
|
||||
l = iommu_read_reg(obj, MMU_CNTL);
|
||||
|
Loading…
Reference in New Issue
Block a user