mirror of
https://mirrors.bfsu.edu.cn/git/linux.git
synced 2024-11-27 22:24:11 +08:00
scsi: ufs: mcq: Fix missing argument 'hba' in MCQ_OPR_OFFSET_n
[ Upstream commit2fc3984895
] The MCQ_OPR_OFFSET_n macro takes 'hba' in the caller context without receiving 'hba' instance as an argument. To prevent potential bugs in future use cases, add an argument 'hba'. Fixes:2468da61ea
("scsi: ufs: core: mcq: Configure operation and runtime interface") Cc: Asutosh Das <quic_asutoshd@quicinc.com> Signed-off-by: Minwoo Im <minwoo.im@samsung.com> Link: https://lore.kernel.org/r/20240519221457.772346-2-minwoo.im@samsung.com Reviewed-by: Bart Van Assche <bvanassche@acm.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com> Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
parent
526a877c62
commit
993cace4f3
@ -230,8 +230,6 @@ int ufshcd_mcq_memory_alloc(struct ufs_hba *hba)
|
||||
|
||||
/* Operation and runtime registers configuration */
|
||||
#define MCQ_CFG_n(r, i) ((r) + MCQ_QCFG_SIZE * (i))
|
||||
#define MCQ_OPR_OFFSET_n(p, i) \
|
||||
(hba->mcq_opr[(p)].offset + hba->mcq_opr[(p)].stride * (i))
|
||||
|
||||
static void __iomem *mcq_opr_base(struct ufs_hba *hba,
|
||||
enum ufshcd_mcq_opr n, int i)
|
||||
@ -344,10 +342,10 @@ void ufshcd_mcq_make_queues_operational(struct ufs_hba *hba)
|
||||
ufsmcq_writelx(hba, upper_32_bits(hwq->sqe_dma_addr),
|
||||
MCQ_CFG_n(REG_SQUBA, i));
|
||||
/* Submission Queue Doorbell Address Offset */
|
||||
ufsmcq_writelx(hba, MCQ_OPR_OFFSET_n(OPR_SQD, i),
|
||||
ufsmcq_writelx(hba, ufshcd_mcq_opr_offset(hba, OPR_SQD, i),
|
||||
MCQ_CFG_n(REG_SQDAO, i));
|
||||
/* Submission Queue Interrupt Status Address Offset */
|
||||
ufsmcq_writelx(hba, MCQ_OPR_OFFSET_n(OPR_SQIS, i),
|
||||
ufsmcq_writelx(hba, ufshcd_mcq_opr_offset(hba, OPR_SQIS, i),
|
||||
MCQ_CFG_n(REG_SQISAO, i));
|
||||
|
||||
/* Completion Queue Lower Base Address */
|
||||
@ -357,10 +355,10 @@ void ufshcd_mcq_make_queues_operational(struct ufs_hba *hba)
|
||||
ufsmcq_writelx(hba, upper_32_bits(hwq->cqe_dma_addr),
|
||||
MCQ_CFG_n(REG_CQUBA, i));
|
||||
/* Completion Queue Doorbell Address Offset */
|
||||
ufsmcq_writelx(hba, MCQ_OPR_OFFSET_n(OPR_CQD, i),
|
||||
ufsmcq_writelx(hba, ufshcd_mcq_opr_offset(hba, OPR_CQD, i),
|
||||
MCQ_CFG_n(REG_CQDAO, i));
|
||||
/* Completion Queue Interrupt Status Address Offset */
|
||||
ufsmcq_writelx(hba, MCQ_OPR_OFFSET_n(OPR_CQIS, i),
|
||||
ufsmcq_writelx(hba, ufshcd_mcq_opr_offset(hba, OPR_CQIS, i),
|
||||
MCQ_CFG_n(REG_CQISAO, i));
|
||||
|
||||
/* Save the base addresses for quicker access */
|
||||
|
@ -1117,6 +1117,12 @@ static inline bool is_mcq_enabled(struct ufs_hba *hba)
|
||||
return hba->mcq_enabled;
|
||||
}
|
||||
|
||||
static inline unsigned int ufshcd_mcq_opr_offset(struct ufs_hba *hba,
|
||||
enum ufshcd_mcq_opr opr, int idx)
|
||||
{
|
||||
return hba->mcq_opr[opr].offset + hba->mcq_opr[opr].stride * idx;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_SCSI_UFS_VARIABLE_SG_ENTRY_SIZE
|
||||
static inline size_t ufshcd_sg_entry_size(const struct ufs_hba *hba)
|
||||
{
|
||||
|
Loading…
Reference in New Issue
Block a user