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selftests/powerpc/64: Test all paths through copy routines
The hand-coded assembler 64-bit copy routines include feature sections that select one code path or another depending on which CPU we are executing on. The self-tests for these copy routines end up testing just one path. This adds a mechanism for selecting any desired code path at compile time, and makes 2 or 3 versions of each test, each using a different code path, so as to cover all the possible paths. Signed-off-by: Paul Mackerras <paulus@ozlabs.org> [mpe: Add -mcpu=power4 to CFLAGS for older compilers] Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
This commit is contained in:
Paul Mackerras
Michael Ellerman
parent
a7c81ce398
commit
98c45f51f7
@ -12,6 +12,11 @@
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#include <asm/asm-compat.h>
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#include <asm/feature-fixups.h>
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#ifndef SELFTEST_CASE
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/* 0 == most CPUs, 1 == POWER6, 2 == Cell */
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#define SELFTEST_CASE 0
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#endif
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#ifdef __BIG_ENDIAN__
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#define sLd sld /* Shift towards low-numbered address. */
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#define sHd srd /* Shift towards high-numbered address. */
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@ -73,6 +78,7 @@ _GLOBAL(__copy_tofrom_user_base)
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* At the time of writing the only CPU that has this combination of bits
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* set is Power6.
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*/
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test_feature = (SELFTEST_CASE == 1)
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BEGIN_FTR_SECTION
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nop
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FTR_SECTION_ELSE
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@ -82,6 +88,7 @@ ALT_FTR_SECTION_END(CPU_FTR_UNALIGNED_LD_STD | CPU_FTR_CP_USE_DCBTZ, \
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.Ldst_aligned:
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addi r3,r3,-16
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r3_offset = 16
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test_feature = (SELFTEST_CASE == 0)
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BEGIN_FTR_SECTION
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andi. r0,r4,7
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bne .Lsrc_unaligned
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@ -19,6 +19,11 @@
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*/
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#include <asm/ppc_asm.h>
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#ifndef SELFTEST_CASE
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/* 0 == don't use VMX, 1 == use VMX */
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#define SELFTEST_CASE 0
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#endif
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#ifdef __BIG_ENDIAN__
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#define LVS(VRT,RA,RB) lvsl VRT,RA,RB
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#define VPERM(VRT,VRA,VRB,VRC) vperm VRT,VRA,VRB,VRC
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@ -80,7 +85,6 @@
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_GLOBAL(__copy_tofrom_user_power7)
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#ifdef CONFIG_ALTIVEC
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cmpldi r5,16
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cmpldi cr1,r5,3328
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@ -89,15 +93,12 @@ _GLOBAL(__copy_tofrom_user_power7)
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std r5,-STACKFRAMESIZE+STK_REG(R29)(r1)
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blt .Lshort_copy
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bge cr1,.Lvmx_copy
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#else
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cmpldi r5,16
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std r3,-STACKFRAMESIZE+STK_REG(R31)(r1)
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std r4,-STACKFRAMESIZE+STK_REG(R30)(r1)
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std r5,-STACKFRAMESIZE+STK_REG(R29)(r1)
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blt .Lshort_copy
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#ifdef CONFIG_ALTIVEC
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test_feature = SELFTEST_CASE
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BEGIN_FTR_SECTION
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bgt cr1,.Lvmx_copy
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END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
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#endif
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.Lnonvmx_copy:
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@ -278,8 +279,8 @@ err1; stb r0,0(r3)
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addi r1,r1,STACKFRAMESIZE
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b .Lnonvmx_copy
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#ifdef CONFIG_ALTIVEC
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.Lvmx_copy:
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#ifdef CONFIG_ALTIVEC
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mflr r0
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std r0,16(r1)
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stdu r1,-STACKFRAMESIZE(r1)
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@ -12,6 +12,11 @@
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#include <asm/asm-compat.h>
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#include <asm/feature-fixups.h>
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#ifndef SELFTEST_CASE
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/* For big-endian, 0 == most CPUs, 1 == POWER6, 2 == Cell */
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#define SELFTEST_CASE 0
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#endif
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.align 7
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_GLOBAL_TOC(memcpy)
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BEGIN_FTR_SECTION
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@ -22,10 +27,8 @@ BEGIN_FTR_SECTION
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#endif
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FTR_SECTION_ELSE
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#ifdef CONFIG_PPC_BOOK3S_64
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#ifndef SELFTEST
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b memcpy_power7
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#endif
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#endif
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ALT_FTR_SECTION_END_IFCLR(CPU_FTR_VMX_COPY)
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#ifdef __LITTLE_ENDIAN__
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/* dumb little-endian memcpy that will get replaced at runtime */
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@ -49,6 +52,7 @@ ALT_FTR_SECTION_END_IFCLR(CPU_FTR_VMX_COPY)
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cleared.
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At the time of writing the only CPU that has this combination of bits
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set is Power6. */
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test_feature = (SELFTEST_CASE == 1)
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BEGIN_FTR_SECTION
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nop
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FTR_SECTION_ELSE
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@ -57,6 +61,7 @@ ALT_FTR_SECTION_END(CPU_FTR_UNALIGNED_LD_STD | CPU_FTR_CP_USE_DCBTZ, \
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CPU_FTR_UNALIGNED_LD_STD)
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.Ldst_aligned:
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addi r3,r3,-16
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test_feature = (SELFTEST_CASE == 0)
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BEGIN_FTR_SECTION
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andi. r0,r4,7
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bne .Lsrc_unaligned
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@ -19,7 +19,10 @@
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*/
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#include <asm/ppc_asm.h>
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_GLOBAL(memcpy_power7)
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#ifndef SELFTEST_CASE
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/* 0 == don't use VMX, 1 == use VMX */
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#define SELFTEST_CASE 0
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#endif
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#ifdef __BIG_ENDIAN__
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#define LVS(VRT,RA,RB) lvsl VRT,RA,RB
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@ -29,20 +32,17 @@ _GLOBAL(memcpy_power7)
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#define VPERM(VRT,VRA,VRB,VRC) vperm VRT,VRB,VRA,VRC
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#endif
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#ifdef CONFIG_ALTIVEC
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_GLOBAL(memcpy_power7)
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cmpldi r5,16
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cmpldi cr1,r5,4096
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std r3,-STACKFRAMESIZE+STK_REG(R31)(r1)
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blt .Lshort_copy
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bgt cr1,.Lvmx_copy
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#else
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cmpldi r5,16
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std r3,-STACKFRAMESIZE+STK_REG(R31)(r1)
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blt .Lshort_copy
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#ifdef CONFIG_ALTIVEC
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test_feature = SELFTEST_CASE
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BEGIN_FTR_SECTION
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bgt cr1, .Lvmx_copy
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END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
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#endif
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.Lnonvmx_copy:
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@ -223,8 +223,8 @@ _GLOBAL(memcpy_power7)
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addi r1,r1,STACKFRAMESIZE
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b .Lnonvmx_copy
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#ifdef CONFIG_ALTIVEC
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.Lvmx_copy:
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#ifdef CONFIG_ALTIVEC
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mflr r0
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std r4,-STACKFRAMESIZE+STK_REG(R30)(r1)
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std r5,-STACKFRAMESIZE+STK_REG(R29)(r1)
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@ -1,4 +1,10 @@
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copyuser_64
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copyuser_power7
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memcpy_64
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memcpy_power7
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copyuser_64_t0
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copyuser_64_t1
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copyuser_64_t2
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copyuser_power7_t0
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copyuser_power7_t1
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memcpy_64_t0
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memcpy_64_t1
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memcpy_64_t2
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memcpy_power7_t0
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memcpy_power7_t1
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@ -4,18 +4,41 @@ CFLAGS += -m64
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CFLAGS += -I$(CURDIR)
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CFLAGS += -D SELFTEST
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CFLAGS += -maltivec
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CFLAGS += -mcpu=power4
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# Use our CFLAGS for the implicit .S rule & set the asm machine type
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ASFLAGS = $(CFLAGS) -Wa,-mpower4
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TEST_GEN_PROGS := copyuser_64 copyuser_power7 memcpy_64 memcpy_power7
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TEST_GEN_PROGS := copyuser_64_t0 copyuser_64_t1 copyuser_64_t2 \
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copyuser_p7_t0 copyuser_p7_t1 \
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memcpy_64_t0 memcpy_64_t1 memcpy_64_t2 \
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memcpy_p7_t0 memcpy_p7_t1
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EXTRA_SOURCES := validate.c ../harness.c
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include ../../lib.mk
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$(OUTPUT)/copyuser_64: CPPFLAGS += -D COPY_LOOP=test___copy_tofrom_user_base
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$(OUTPUT)/copyuser_power7: CPPFLAGS += -D COPY_LOOP=test___copy_tofrom_user_power7
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$(OUTPUT)/memcpy_64: CPPFLAGS += -D COPY_LOOP=test_memcpy
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$(OUTPUT)/memcpy_power7: CPPFLAGS += -D COPY_LOOP=test_memcpy_power7
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$(OUTPUT)/copyuser_64_t%: copyuser_64.S $(EXTRA_SOURCES)
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$(CC) $(CPPFLAGS) $(CFLAGS) \
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-D COPY_LOOP=test___copy_tofrom_user_base \
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-D SELFTEST_CASE=$(subst copyuser_64_t,,$(notdir $@)) \
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-o $@ $^
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$(TEST_GEN_PROGS): $(EXTRA_SOURCES)
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$(OUTPUT)/copyuser_p7_t%: copyuser_power7.S $(EXTRA_SOURCES)
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$(CC) $(CPPFLAGS) $(CFLAGS) \
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-D COPY_LOOP=test___copy_tofrom_user_power7 \
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-D SELFTEST_CASE=$(subst copyuser_p7_t,,$(notdir $@)) \
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-o $@ $^
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# Strictly speaking, we only need the memcpy_64 test cases for big-endian
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$(OUTPUT)/memcpy_64_t%: memcpy_64.S $(EXTRA_SOURCES)
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$(CC) $(CPPFLAGS) $(CFLAGS) \
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-D COPY_LOOP=test_memcpy \
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-D SELFTEST_CASE=$(subst memcpy_64_t,,$(notdir $@)) \
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-o $@ $^
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$(OUTPUT)/memcpy_p7_t%: memcpy_power7.S $(EXTRA_SOURCES)
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$(CC) $(CPPFLAGS) $(CFLAGS) \
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-D COPY_LOOP=test_memcpy_power7 \
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-D SELFTEST_CASE=$(subst memcpy_p7_t,,$(notdir $@)) \
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-o $@ $^
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@ -43,17 +43,16 @@ FUNC_START(enter_vmx_ops)
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FUNC_START(exit_vmx_ops)
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blr
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FUNC_START(memcpy_power7)
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blr
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FUNC_START(__copy_tofrom_user_power7)
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blr
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FUNC_START(__copy_tofrom_user_base)
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blr
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#define BEGIN_FTR_SECTION
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#define FTR_SECTION_ELSE
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#define ALT_FTR_SECTION_END_IFCLR(x)
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#define ALT_FTR_SECTION_END(x, y)
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#define END_FTR_SECTION_IFCLR(x)
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#define BEGIN_FTR_SECTION .if test_feature
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#define FTR_SECTION_ELSE .else
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#define ALT_FTR_SECTION_END_IFCLR(x) .endif
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#define ALT_FTR_SECTION_END_IFSET(x) .endif
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#define ALT_FTR_SECTION_END(x, y) .endif
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#define END_FTR_SECTION_IFCLR(x) .endif
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#define END_FTR_SECTION_IFSET(x) .endif
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/* Default to taking the first of any alternative feature sections */
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test_feature = 1
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