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net/mlx4_en: Align tx path structures to cache lines
Reorganize struct mlx4_en_tx_ring to have: - One cache line containing last_nr_txbb & cons & wake_queue, used by tx completion. - One cache line containing fields dirtied by mlx4_en_xmit() - Following part is read mostly and shared by cpus. Align struct mlx4_en_tx_info to a cache line Signed-off-by: Eric Dumazet <edumazet@google.com> Signed-off-by: Amir Vadai <amirv@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -216,13 +216,13 @@ enum cq_type {
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struct mlx4_en_tx_info {
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struct sk_buff *skb;
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u32 nr_txbb;
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u32 nr_bytes;
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u8 linear;
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u8 data_offset;
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u8 inl;
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u8 ts_requested;
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};
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u32 nr_txbb;
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u32 nr_bytes;
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u8 linear;
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u8 data_offset;
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u8 inl;
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u8 ts_requested;
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} ____cacheline_aligned_in_smp;
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#define MLX4_EN_BIT_DESC_OWN 0x80000000
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@ -253,40 +253,46 @@ struct mlx4_en_rx_alloc {
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};
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struct mlx4_en_tx_ring {
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/* cache line used and dirtied in tx completion
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* (mlx4_en_free_tx_buf())
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*/
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u32 last_nr_txbb;
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u32 cons;
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unsigned long wake_queue;
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/* cache line used and dirtied in mlx4_en_xmit() */
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u32 prod ____cacheline_aligned_in_smp;
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unsigned long bytes;
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unsigned long packets;
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unsigned long tx_csum;
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unsigned long tso_packets;
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unsigned long xmit_more;
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struct mlx4_bf bf;
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unsigned long queue_stopped;
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/* Following part should be mostly read */
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cpumask_t affinity_mask;
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struct mlx4_qp qp;
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struct mlx4_hwq_resources wqres;
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u32 size ; /* number of TXBBs */
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u32 size_mask;
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u16 stride;
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u16 cqn; /* index of port CQ associated with this ring */
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u32 prod;
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u32 cons;
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u32 buf_size;
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u32 doorbell_qpn;
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void *buf;
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struct mlx4_en_tx_info *tx_info;
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u8 *bounce_buf;
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u8 queue_index;
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cpumask_t affinity_mask;
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u32 last_nr_txbb;
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struct mlx4_qp qp;
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struct mlx4_qp_context context;
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int qpn;
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enum mlx4_qp_state qp_state;
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struct mlx4_srq dummy;
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unsigned long bytes;
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unsigned long packets;
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unsigned long tx_csum;
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unsigned long queue_stopped;
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unsigned long wake_queue;
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unsigned long tso_packets;
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unsigned long xmit_more;
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struct mlx4_bf bf;
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bool bf_enabled;
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bool bf_alloced;
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struct netdev_queue *tx_queue;
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int hwtstamp_tx_type;
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int inline_thold;
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};
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u32 size; /* number of TXBBs */
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u32 size_mask;
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u16 stride;
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u16 cqn; /* index of port CQ associated with this ring */
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u32 buf_size;
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u32 doorbell_qpn;
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void *buf;
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struct mlx4_en_tx_info *tx_info;
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u8 *bounce_buf;
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struct mlx4_qp_context context;
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int qpn;
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enum mlx4_qp_state qp_state;
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u8 queue_index;
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bool bf_enabled;
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bool bf_alloced;
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struct netdev_queue *tx_queue;
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int hwtstamp_tx_type;
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int inline_thold;
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} ____cacheline_aligned_in_smp;
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struct mlx4_en_rx_desc {
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/* actual number of entries depends on rx ring stride */
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