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perf/x86: Add MSR probe interface
Adding perf_msr_probe function to provide interface for checking up on MSR register and set the related attribute group visibility. User defines following struct for each MSR register: struct perf_msr { u64 msr; struct attribute_group *grp; bool (*test)(int idx, void *data); bool no_check; }; Where: msr - is the MSR address attrs - is attribute groups array to add if the check passed test - is test function pointer no_check - is bool that bypass the check and adds the attribute without any test The array of struct perf_msr is passed into: perf_msr_probe(struct perf_msr *msr, int cnt, bool zero, void *data) Together with: cnt - which is the number of struct msr array elements data - which is user pointer passed to the test function zero - allow counters that returns zero on rdmsr The perf_msr_probe will executed test code, read the MSR and check the value is != 0. If all these tests pass, related attribute group is kept visible. Also adding PMU_EVENT_GROUP macro helper to define attribute group for single attribute. It will be used in following patches. Signed-off-by: Jiri Olsa <jolsa@kernel.org> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Andy Lutomirski <luto@kernel.org> Cc: Arnaldo Carvalho de Melo <acme@kernel.org> Cc: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Borislav Petkov <bp@alien8.de> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Kan <kan.liang@linux.intel.com> Cc: Liang Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Stephane Eranian <eranian@google.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Vince Weaver <vincent.weaver@maine.edu> Link: https://lkml.kernel.org/r/20190616140358.27799-2-jolsa@kernel.org Signed-off-by: Ingo Molnar <mingo@kernel.org>
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# SPDX-License-Identifier: GPL-2.0-only
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obj-y += core.o
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obj-y += core.o probe.o
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obj-y += amd/
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obj-$(CONFIG_X86_LOCAL_APIC) += msr.o
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obj-$(CONFIG_CPU_SUP_INTEL) += intel/
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arch/x86/events/probe.c
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arch/x86/events/probe.c
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// SPDX-License-Identifier: GPL-2.0
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#include <linux/export.h>
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#include <linux/types.h>
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#include <linux/bits.h>
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#include "probe.h"
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static umode_t
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not_visible(struct kobject *kobj, struct attribute *attr, int i)
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{
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return 0;
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}
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unsigned long
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perf_msr_probe(struct perf_msr *msr, int cnt, bool zero, void *data)
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{
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unsigned long avail = 0;
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unsigned int bit;
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u64 val;
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if (cnt >= BITS_PER_LONG)
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return 0;
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for (bit = 0; bit < cnt; bit++) {
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if (!msr[bit].no_check) {
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struct attribute_group *grp = msr[bit].grp;
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grp->is_visible = not_visible;
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if (msr[bit].test && !msr[bit].test(bit, data))
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continue;
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/* Virt sucks; you cannot tell if a R/O MSR is present :/ */
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if (rdmsrl_safe(msr[bit].msr, &val))
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continue;
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/* Disable zero counters if requested. */
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if (!zero && !val)
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continue;
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grp->is_visible = NULL;
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}
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avail |= BIT(bit);
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}
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return avail;
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}
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EXPORT_SYMBOL_GPL(perf_msr_probe);
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arch/x86/events/probe.h
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arch/x86/events/probe.h
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/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __ARCH_X86_EVENTS_PROBE_H__
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#define __ARCH_X86_EVENTS_PROBE_H__
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#include <linux/sysfs.h>
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struct perf_msr {
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u64 msr;
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struct attribute_group *grp;
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bool (*test)(int idx, void *data);
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bool no_check;
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};
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unsigned long
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perf_msr_probe(struct perf_msr *msr, int cnt, bool no_zero, void *data);
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#define __PMU_EVENT_GROUP(_name) \
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static struct attribute *attrs_##_name[] = { \
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&attr_##_name.attr.attr, \
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NULL, \
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}
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#define PMU_EVENT_GROUP(_grp, _name) \
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__PMU_EVENT_GROUP(_name); \
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static struct attribute_group group_##_name = { \
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.name = #_grp, \
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.attrs = attrs_##_name, \
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}
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#endif /* __ARCH_X86_EVENTS_PROBE_H__ */
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