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ARC/sh/xtensa: Provide one-byte cmpxchg emulation
This series provides emulated one-byte cmpxchg() support for ARM, sh, and xtensa using the cmpxchg_emu_u8() function that uses a four-byte cmpxchg() to emulate the one-byte variant. This covers all architectures. -----BEGIN PGP SIGNATURE----- iQJHBAABCgAxFiEEbK7UrM+RBIrCoViJnr8S83LZ+4wFAmbkTmETHHBhdWxtY2tA a2VybmVsLm9yZwAKCRCevxLzctn7jK0iD/9fdgX46HZhR2iGH6kHeBR5teXpvLQw 2SR/e1WyqhuyhqDHknskMMqVg2uCpIw6qihp1pm+4ZmEsR+jwkA10fc4wnYI7cdf Zce/crItXAum4V79ykUO2gKlpuyGJXelrnSuZjPJAa9VXSDSZ/nhibSNFWCaGVrU 29Qy/BBC/I4tlHuV7SSJKfnYv8GnpGPAuFDQd5Hxj8eWUtu+RAfzt9grBkCoSWWY 5zSmPZEvbjVtpkPJcNf03OlU6s028p3PY2TW623plbRo998r07NzkoO96Ml1HlCv 6TMLUptaImyqEr2bLGJ/YB1B8A+Hbmd9xgsWF3EwGgaS8F+2tuvKd4trcOrZ5NKn 6xMAqUC58BnW7HOPaNqwP3agExVvfFq+ZBZQj/S4feWL4TrT8JfgmVvtkzUGO5DD TJOgcsjbcAt39Qli3ckfaZ8AVk9ZjHvGK0M7wcSqsPvhM355VCyyw2Ea/x9/cjn5 D6BjMnZzbEuDx6u+/mCOuUYvokus+leMhaxnmWnc66Yf60kQUsNKJzoCaeaFzhKv h5B5J1jiwsyIFE9+TcQ5YBQCuAsqthKzROUP+WiNV1b59qHGJugasju2ufiodTzc TkCWSVrKtwEwldPjyIKXXoOMMKe1XkYPYbRyXjyTs/PiaByKM9nVbKnJqu26XlTm JF8N4+nNQvT2Sw== =FObp -----END PGP SIGNATURE----- Merge tag 'cmpxchg.2024.09.15a' of git://git.kernel.org/pub/scm/linux/kernel/git/paulmck/linux-rcu Pull byte cmpxchg updates from Paul McKenney: "ARC/sh/xtensa: Provide one-byte cmpxchg emulation This series provides emulated one-byte cmpxchg() support for ARM, sh, and xtensa using the cmpxchg_emu_u8() function that uses a four-byte cmpxchg() to emulate the one-byte variant. This covers all architectures" * tag 'cmpxchg.2024.09.15a' of git://git.kernel.org/pub/scm/linux/kernel/git/paulmck/linux-rcu: xtensa: Emulate one-byte cmpxchg sh: Emulate one-byte cmpxchg ARC: Emulate one-byte cmpxchg
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commit
980bcd35ae
@ -13,6 +13,7 @@ config ARC
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select ARCH_HAS_SETUP_DMA_OPS
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select ARCH_HAS_SYNC_DMA_FOR_CPU
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select ARCH_HAS_SYNC_DMA_FOR_DEVICE
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select ARCH_NEED_CMPXCHG_1_EMU
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select ARCH_SUPPORTS_ATOMIC_RMW if ARC_HAS_LLSC
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select ARCH_32BIT_OFF_T
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select BUILDTIME_TABLE_SORT
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@ -8,6 +8,7 @@
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#include <linux/build_bug.h>
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#include <linux/types.h>
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#include <linux/cmpxchg-emu.h>
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#include <asm/barrier.h>
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#include <asm/smp.h>
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@ -46,6 +47,9 @@
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__typeof__(*(ptr)) _prev_; \
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\
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switch(sizeof((_p_))) { \
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case 1: \
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_prev_ = (__typeof__(*(ptr)))cmpxchg_emu_u8((volatile u8 *)_p_, (uintptr_t)_o_, (uintptr_t)_n_); \
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break; \
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case 4: \
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_prev_ = __cmpxchg(_p_, _o_, _n_); \
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break; \
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@ -65,8 +69,6 @@
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__typeof__(*(ptr)) _prev_; \
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unsigned long __flags; \
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\
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BUILD_BUG_ON(sizeof(_p_) != 4); \
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\
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/* \
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* spin lock/unlock provide the needed smp_mb() before/after \
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*/ \
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@ -14,6 +14,7 @@ config SUPERH
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select ARCH_HIBERNATION_POSSIBLE if MMU
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select ARCH_MIGHT_HAVE_PC_PARPORT
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select ARCH_WANT_IPC_PARSE_VERSION
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select ARCH_NEED_CMPXCHG_1_EMU
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select CPU_NO_EFFICIENT_FFS
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select DMA_DECLARE_COHERENT
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select GENERIC_ATOMIC64
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@ -9,6 +9,7 @@
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#include <linux/compiler.h>
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#include <linux/types.h>
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#include <linux/cmpxchg-emu.h>
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#if defined(CONFIG_GUSA_RB)
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#include <asm/cmpxchg-grb.h>
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@ -56,6 +57,8 @@ static inline unsigned long __cmpxchg(volatile void * ptr, unsigned long old,
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unsigned long new, int size)
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{
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switch (size) {
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case 1:
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return cmpxchg_emu_u8(ptr, old, new);
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case 4:
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return __cmpxchg_u32(ptr, old, new);
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}
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@ -14,6 +14,7 @@ config XTENSA
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select ARCH_HAS_DMA_SET_UNCACHED if MMU
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select ARCH_HAS_STRNCPY_FROM_USER if !KASAN
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select ARCH_HAS_STRNLEN_USER
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select ARCH_NEED_CMPXCHG_1_EMU
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select ARCH_USE_MEMTEST
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select ARCH_USE_QUEUED_RWLOCKS
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select ARCH_USE_QUEUED_SPINLOCKS
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@ -15,6 +15,7 @@
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#include <linux/bits.h>
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#include <linux/stringify.h>
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#include <linux/cmpxchg-emu.h>
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/*
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* cmpxchg
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@ -74,6 +75,7 @@ static __inline__ unsigned long
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__cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size)
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{
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switch (size) {
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case 1: return cmpxchg_emu_u8(ptr, old, new);
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case 4: return __cmpxchg_u32(ptr, old, new);
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default: __cmpxchg_called_with_bad_pointer();
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return old;
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