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Patch 1/2 which enables MCA by default because I still see bugreports
where CONFIG_X86_MCE is disabled and this is a bad idea so turning it on by default makes sense to me. The second one is a trivial cleanup. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.12 (GNU/Linux) iQIcBAABAgAGBQJQV2BDAAoJEBLB8Bhh3lVKbfcP/AkfNP5rbK5P5bkoD8Y4jc0r XFfTd//96sjN9SvcZyO/dVnO3S8600AJXfjUs+Amd9horaUOdzf1X8xfOKmvupbL MqG9WKOaIdgCdXfXvh6S2vNySNErybLWLaxpm8n/7xjQhumVzo1TU41mMzcU5Ctt OmhGD2hjF7DXSVDIirDs8XBGyr3YbVRN1Dj/FQDZ1rjOEjAMNsQnZVthFdhHOmfN YKaGdP+WbI38Jm3RGEDi3mcnv63A4jL6G4IRDEnsFg45ull1HjTN1tF6lz8tbwDc M36jZRM3sqMYDk5P6a9qtnuNTe51Sl9HkbA9Ym0+5hrWua/c16Z6Bt5+NgoDO61O LlCU0FZNtmJujqC2oUdVWovpr0z1gnZwlbcvVIPEKVnln5iZC5PkPSxZg7Xn6K7e 1mMpWA6y9vsF32qxZuD2XAF32/muVgz0zFbVQRgKH6YS064PB2HWgr9ZU0XtVLW9 9Tfrafqg0CQO/o74oAnbjjg87O4C5p53elpSa/4+4Hwn9E2M+6lKjVyAWNzKv2r3 +POT4O1IgOE7f2WnPsR1w1F3P00e65xE3IC0JnZyRYh1P8P1FEnVWklGxi/y+dNN qVzNDXE5ZL+fKEs2WbP9gr6lTDB0riGc93p9iycDQKVpVq5mePe34CZk/SEZzoGV CH/lZMXMrkYqef5wNaAT =ywsW -----END PGP SIGNATURE----- Merge tag 'ras_queue_for_3.7' of git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras into x86/mce Pull MCE changes from Borislav Petkov: " Patch 1/2 which enables MCA by default because I still see bugreports where CONFIG_X86_MCE is disabled and this is a bad idea so turning it on by default makes sense to me. The second one is a trivial cleanup. " Signed-off-by: Ingo Molnar <mingo@kernel.org>
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@ -871,6 +871,7 @@ config X86_REROUTE_FOR_BROKEN_BOOT_IRQS
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config X86_MCE
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bool "Machine Check / overheating reporting"
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default y
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---help---
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Machine Check support allows the processor to notify the
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kernel if it detects a problem (e.g. overheating, data corruption).
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@ -116,19 +116,9 @@ struct mce_log {
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/* Software defined banks */
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#define MCE_EXTENDED_BANK 128
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#define MCE_THERMAL_BANK MCE_EXTENDED_BANK + 0
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#define K8_MCE_THRESHOLD_BASE (MCE_EXTENDED_BANK + 1) /* MCE_AMD */
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#define K8_MCE_THRESHOLD_BANK_0 (MCE_THRESHOLD_BASE + 0 * 9)
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#define K8_MCE_THRESHOLD_BANK_1 (MCE_THRESHOLD_BASE + 1 * 9)
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#define K8_MCE_THRESHOLD_BANK_2 (MCE_THRESHOLD_BASE + 2 * 9)
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#define K8_MCE_THRESHOLD_BANK_3 (MCE_THRESHOLD_BASE + 3 * 9)
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#define K8_MCE_THRESHOLD_BANK_4 (MCE_THRESHOLD_BASE + 4 * 9)
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#define K8_MCE_THRESHOLD_BANK_5 (MCE_THRESHOLD_BASE + 5 * 9)
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#define K8_MCE_THRESHOLD_DRAM_ECC (MCE_THRESHOLD_BANK_4 + 0)
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#define K8_MCE_THRESHOLD_BASE (MCE_EXTENDED_BANK + 1)
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#ifdef __KERNEL__
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extern void mce_register_decode_chain(struct notifier_block *nb);
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extern void mce_unregister_decode_chain(struct notifier_block *nb);
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