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arm64: Move post_ttbr_update_workaround to C code

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We will soon need to invoke a CPU-specific function pointer after changing
page tables, so move post_ttbr_update_workaround out into C code to make
this possible.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
This commit is contained in:
Marc Zyngier 2018-01-02 18:19:39 +00:00 committed by Catalin Marinas
parent d68e3ba530
commit 95e3de3590
4 changed files with 11 additions and 16 deletions
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13
arch/arm64/include/asm/assembler.h
View File

@ -492,19 +492,6 @@ alternative_endif
mrs \rd, sp_el0 mrs \rd, sp_el0
.endm .endm
/*
* Errata workaround post TTBRx_EL1 update.
*/
.macro post_ttbr_update_workaround
#ifdef CONFIG_CAVIUM_ERRATUM_27456
alternative_if ARM64_WORKAROUND_CAVIUM_27456
ic iallu
dsb nsh
isb
alternative_else_nop_endif
#endif
.endm
/* /*
* Arrange a physical address in a TTBR register, taking care of 52-bit * Arrange a physical address in a TTBR register, taking care of 52-bit
* addresses. * addresses.

2
arch/arm64/kernel/entry.S
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@ -277,7 +277,7 @@ alternative_else_nop_endif
* Cavium erratum 27456 (broadcast TLBI instructions may cause I-cache * Cavium erratum 27456 (broadcast TLBI instructions may cause I-cache
* corruption). * corruption).
*/ */
post_ttbr_update_workaround bl post_ttbr_update_workaround
.endif .endif
1: 1:
.if \el != 0 .if \el != 0

9
arch/arm64/mm/context.c
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@ -242,6 +242,15 @@ switch_mm_fastpath:
cpu_switch_mm(mm->pgd, mm); cpu_switch_mm(mm->pgd, mm);
} }
/* Errata workaround post TTBRx_EL1 update. */
asmlinkage void post_ttbr_update_workaround(void)
{
asm(ALTERNATIVE("nop; nop; nop",
"ic iallu; dsb nsh; isb",
ARM64_WORKAROUND_CAVIUM_27456,
CONFIG_CAVIUM_ERRATUM_27456));
}
static int asids_init(void) static int asids_init(void)
{ {
asid_bits = get_cpu_asid_bits(); asid_bits = get_cpu_asid_bits();

3
arch/arm64/mm/proc.S
View File

@ -146,8 +146,7 @@ ENTRY(cpu_do_switch_mm)
phys_to_ttbr x0, x2 phys_to_ttbr x0, x2
msr ttbr0_el1, x2 // now update TTBR0 msr ttbr0_el1, x2 // now update TTBR0
isb isb
post_ttbr_update_workaround b post_ttbr_update_workaround // Back to C code...
ret
ENDPROC(cpu_do_switch_mm) ENDPROC(cpu_do_switch_mm)
.pushsection ".idmap.text", "ax" .pushsection ".idmap.text", "ax"