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media: don't do a 31 bit shift on a signed int
On 32-bits archs, a signed integer has 31 bits plus on extra bit for signal. Due to that, touching the 32th bit with something like: int bar = 1 << 31; has an undefined behavior in C on 32 bit architectures, as it touches the signal bit. This is warned by cppcheck. Instead, force the numbers to be unsigned, in order to solve this issue. Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
This commit is contained in:
parent
cce8ccca80
commit
95c520690f
@ -431,7 +431,7 @@ static u32 cx24123_int_log2(u32 a, u32 b)
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u32 div = a / b;
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u32 div = a / b;
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if (a % b >= b / 2)
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if (a % b >= b / 2)
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++div;
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++div;
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if (div < (1 << 31)) {
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if (div < (1UL << 31)) {
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for (exp = 1; div > exp; nearest++)
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for (exp = 1; div > exp; nearest++)
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exp += exp;
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exp += exp;
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}
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}
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@ -84,7 +84,7 @@ static void ir_enltv_handle_key(struct bttv *btv)
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data = ir_extract_bits(gpio, ir->mask_keycode);
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data = ir_extract_bits(gpio, ir->mask_keycode);
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/* Check if it is keyup */
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/* Check if it is keyup */
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keyup = (gpio & ir->mask_keyup) ? 1 << 31 : 0;
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keyup = (gpio & ir->mask_keyup) ? 1UL << 31 : 0;
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if ((ir->last_gpio & 0x7f) != data) {
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if ((ir->last_gpio & 0x7f) != data) {
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dprintk("gpio=0x%x code=%d | %s\n",
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dprintk("gpio=0x%x code=%d | %s\n",
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@ -95,7 +95,7 @@ static void ir_enltv_handle_key(struct bttv *btv)
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if (keyup)
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if (keyup)
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rc_keyup(ir->dev);
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rc_keyup(ir->dev);
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} else {
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} else {
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if ((ir->last_gpio & 1 << 31) == keyup)
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if ((ir->last_gpio & 1UL << 31) == keyup)
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return;
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return;
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dprintk("(cnt) gpio=0x%x code=%d | %s\n",
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dprintk("(cnt) gpio=0x%x code=%d | %s\n",
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@ -78,7 +78,7 @@ static u16 select_service_from_set(int field, int line, u16 set, int is_pal)
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return 0;
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return 0;
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}
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}
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for (i = 0; i < 32; i++) {
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for (i = 0; i < 32; i++) {
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if ((1 << i) & set)
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if (BIT(i) & set)
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return 1 << i;
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return 1 << i;
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}
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}
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return 0;
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return 0;
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@ -910,7 +910,7 @@ static void ivtv_load_and_init_modules(struct ivtv *itv)
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/* check which i2c devices are actually found */
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/* check which i2c devices are actually found */
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for (i = 0; i < 32; i++) {
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for (i = 0; i < 32; i++) {
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u32 device = 1 << i;
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u32 device = BIT(i);
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if (!(device & hw))
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if (!(device & hw))
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continue;
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continue;
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@ -73,8 +73,8 @@ static u16 select_service_from_set(int field, int line, u16 set, int is_pal)
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return 0;
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return 0;
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}
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}
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for (i = 0; i < 32; i++) {
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for (i = 0; i < 32; i++) {
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if ((1 << i) & set)
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if (BIT(i) & set)
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return 1 << i;
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return BIT(i);
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}
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}
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return 0;
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return 0;
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}
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}
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@ -39,13 +39,13 @@ static void solo_gpio_mode(struct solo_dev *solo_dev,
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ret = solo_reg_read(solo_dev, SOLO_GPIO_CONFIG_1);
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ret = solo_reg_read(solo_dev, SOLO_GPIO_CONFIG_1);
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for (port = 0; port < 16; port++) {
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for (port = 0; port < 16; port++) {
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if (!((1 << (port + 16)) & port_mask))
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if (!((1UL << (port + 16)) & port_mask))
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continue;
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continue;
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if (!mode)
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if (!mode)
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ret &= ~(1 << port);
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ret &= ~(1UL << port);
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else
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else
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ret |= 1 << port;
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ret |= 1UL << port;
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}
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}
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/* Enable GPIO[31:16] */
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/* Enable GPIO[31:16] */
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@ -41,7 +41,7 @@ MODULE_PARM_DESC(debug, "Debug level (0-2)");
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/* CSIS global control */
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/* CSIS global control */
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#define S5PCSIS_CTRL 0x00
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#define S5PCSIS_CTRL 0x00
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#define S5PCSIS_CTRL_DPDN_DEFAULT (0 << 31)
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#define S5PCSIS_CTRL_DPDN_DEFAULT (0 << 31)
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#define S5PCSIS_CTRL_DPDN_SWAP (1 << 31)
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#define S5PCSIS_CTRL_DPDN_SWAP (1UL << 31)
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#define S5PCSIS_CTRL_ALIGN_32BIT (1 << 20)
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#define S5PCSIS_CTRL_ALIGN_32BIT (1 << 20)
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#define S5PCSIS_CTRL_UPDATE_SHADOW (1 << 16)
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#define S5PCSIS_CTRL_UPDATE_SHADOW (1 << 16)
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#define S5PCSIS_CTRL_WCLK_EXTCLK (1 << 8)
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#define S5PCSIS_CTRL_WCLK_EXTCLK (1 << 8)
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@ -65,7 +65,7 @@ MODULE_PARM_DESC(debug, "Debug level (0-2)");
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/* Interrupt mask */
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/* Interrupt mask */
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#define S5PCSIS_INTMSK 0x10
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#define S5PCSIS_INTMSK 0x10
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#define S5PCSIS_INTMSK_EVEN_BEFORE (1 << 31)
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#define S5PCSIS_INTMSK_EVEN_BEFORE (1UL << 31)
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#define S5PCSIS_INTMSK_EVEN_AFTER (1 << 30)
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#define S5PCSIS_INTMSK_EVEN_AFTER (1 << 30)
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#define S5PCSIS_INTMSK_ODD_BEFORE (1 << 29)
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#define S5PCSIS_INTMSK_ODD_BEFORE (1 << 29)
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#define S5PCSIS_INTMSK_ODD_AFTER (1 << 28)
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#define S5PCSIS_INTMSK_ODD_AFTER (1 << 28)
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@ -83,7 +83,7 @@ MODULE_PARM_DESC(debug, "Debug level (0-2)");
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/* Interrupt source */
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/* Interrupt source */
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#define S5PCSIS_INTSRC 0x14
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#define S5PCSIS_INTSRC 0x14
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#define S5PCSIS_INTSRC_EVEN_BEFORE (1 << 31)
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#define S5PCSIS_INTSRC_EVEN_BEFORE (1UL << 31)
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#define S5PCSIS_INTSRC_EVEN_AFTER (1 << 30)
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#define S5PCSIS_INTSRC_EVEN_AFTER (1 << 30)
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#define S5PCSIS_INTSRC_EVEN (0x3 << 30)
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#define S5PCSIS_INTSRC_EVEN (0x3 << 30)
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#define S5PCSIS_INTSRC_ODD_BEFORE (1 << 29)
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#define S5PCSIS_INTSRC_ODD_BEFORE (1 << 29)
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@ -214,7 +214,7 @@ enum status_config {
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FIELD_NO = 0x01 << 28, /* Field number */
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FIELD_NO = 0x01 << 28, /* Field number */
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DITHER_ON = 0x01 << 29, /* Dithering is on */
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DITHER_ON = 0x01 << 29, /* Dithering is on */
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ROUND_ON = 0x01 << 30, /* Round is on */
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ROUND_ON = 0x01 << 30, /* Round is on */
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MODE_32BIT = 0x01 << 31, /* Data in RGBa888,
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MODE_32BIT = 1UL << 31, /* Data in RGBa888,
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* 0 in RGB565
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* 0 in RGB565
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*/
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*/
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};
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};
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@ -120,7 +120,7 @@ module_param(debug, bool, 0644);
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#define PRP_CNTL_RZ_FIFO_LEVEL(x) ((x) << 27)
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#define PRP_CNTL_RZ_FIFO_LEVEL(x) ((x) << 27)
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#define PRP_CNTL_CH2B1EN (1 << 29)
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#define PRP_CNTL_CH2B1EN (1 << 29)
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#define PRP_CNTL_CH2B2EN (1 << 30)
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#define PRP_CNTL_CH2B2EN (1 << 30)
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#define PRP_CNTL_CH2FEN (1 << 31)
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#define PRP_CNTL_CH2FEN (1UL << 31)
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#define PRP_SIZE_HEIGHT(x) (x)
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#define PRP_SIZE_HEIGHT(x) (x)
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#define PRP_SIZE_WIDTH(x) ((x) << 16)
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#define PRP_SIZE_WIDTH(x) ((x) << 16)
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@ -64,7 +64,7 @@
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#define CIBR1 0x0030
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#define CIBR1 0x0030
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#define CIBR2 0x0038
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#define CIBR2 0x0038
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#define CICR0_DMAEN (1 << 31) /* DMA request enable */
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#define CICR0_DMAEN (1UL << 31) /* DMA request enable */
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#define CICR0_PAR_EN (1 << 30) /* Parity enable */
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#define CICR0_PAR_EN (1 << 30) /* Parity enable */
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#define CICR0_SL_CAP_EN (1 << 29) /* Capture enable for slave mode */
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#define CICR0_SL_CAP_EN (1 << 29) /* Capture enable for slave mode */
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#define CICR0_ENB (1 << 28) /* Camera interface enable */
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#define CICR0_ENB (1 << 28) /* Camera interface enable */
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@ -81,7 +81,7 @@
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#define CICR0_EOFM (1 << 1) /* End-of-frame mask */
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#define CICR0_EOFM (1 << 1) /* End-of-frame mask */
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#define CICR0_FOM (1 << 0) /* FIFO-overrun mask */
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#define CICR0_FOM (1 << 0) /* FIFO-overrun mask */
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#define CICR1_TBIT (1 << 31) /* Transparency bit */
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#define CICR1_TBIT (1UL << 31) /* Transparency bit */
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#define CICR1_RGBT_CONV (0x3 << 29) /* RGBT conversion mask */
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#define CICR1_RGBT_CONV (0x3 << 29) /* RGBT conversion mask */
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#define CICR1_PPL (0x7ff << 15) /* Pixels per line mask */
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#define CICR1_PPL (0x7ff << 15) /* Pixels per line mask */
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#define CICR1_RGB_CONV (0x7 << 12) /* RGB conversion mask */
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#define CICR1_RGB_CONV (0x7 << 12) /* RGB conversion mask */
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@ -198,7 +198,7 @@ static int venus_enumerate_codecs(struct venus_core *core, u32 type)
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goto err;
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goto err;
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for (i = 0; i < MAX_CODEC_NUM; i++) {
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for (i = 0; i < MAX_CODEC_NUM; i++) {
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codec = (1 << i) & codecs;
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codec = (1UL << i) & codecs;
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if (!codec)
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if (!codec)
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continue;
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continue;
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@ -121,14 +121,14 @@
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/* JPEG timer setting register */
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/* JPEG timer setting register */
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#define S5P_JPG_TIMER_SE 0x7c
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#define S5P_JPG_TIMER_SE 0x7c
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#define S5P_TIMER_INT_EN_MASK (0x1 << 31)
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#define S5P_TIMER_INT_EN_MASK (0x1UL << 31)
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#define S5P_TIMER_INT_EN (0x1 << 31)
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#define S5P_TIMER_INT_EN (0x1UL << 31)
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#define S5P_TIMER_INIT_MASK 0x7fffffff
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#define S5P_TIMER_INIT_MASK 0x7fffffff
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/* JPEG timer status register */
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/* JPEG timer status register */
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#define S5P_JPG_TIMER_ST 0x80
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#define S5P_JPG_TIMER_ST 0x80
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#define S5P_TIMER_INT_STAT_SHIFT 31
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#define S5P_TIMER_INT_STAT_SHIFT 31
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#define S5P_TIMER_INT_STAT_MASK (0x1 << S5P_TIMER_INT_STAT_SHIFT)
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#define S5P_TIMER_INT_STAT_MASK (0x1UL << S5P_TIMER_INT_STAT_SHIFT)
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#define S5P_TIMER_CNT_SHIFT 0
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#define S5P_TIMER_CNT_SHIFT 0
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#define S5P_TIMER_CNT_MASK 0x7fffffff
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#define S5P_TIMER_CNT_MASK 0x7fffffff
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@ -562,13 +562,13 @@
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/* JPEG timer setting register */
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/* JPEG timer setting register */
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#define EXYNOS3250_TIMER_SE 0x148
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#define EXYNOS3250_TIMER_SE 0x148
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#define EXYNOS3250_TIMER_INT_EN_SHIFT 31
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#define EXYNOS3250_TIMER_INT_EN_SHIFT 31
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#define EXYNOS3250_TIMER_INT_EN (1 << EXYNOS3250_TIMER_INT_EN_SHIFT)
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#define EXYNOS3250_TIMER_INT_EN (1UL << EXYNOS3250_TIMER_INT_EN_SHIFT)
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#define EXYNOS3250_TIMER_INIT_MASK 0x7fffffff
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#define EXYNOS3250_TIMER_INIT_MASK 0x7fffffff
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/* JPEG timer status register */
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/* JPEG timer status register */
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#define EXYNOS3250_TIMER_ST 0x14c
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#define EXYNOS3250_TIMER_ST 0x14c
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#define EXYNOS3250_TIMER_INT_STAT_SHIFT 31
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#define EXYNOS3250_TIMER_INT_STAT_SHIFT 31
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#define EXYNOS3250_TIMER_INT_STAT (1 << EXYNOS3250_TIMER_INT_STAT_SHIFT)
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#define EXYNOS3250_TIMER_INT_STAT (1UL << EXYNOS3250_TIMER_INT_STAT_SHIFT)
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#define EXYNOS3250_TIMER_CNT_SHIFT 0
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#define EXYNOS3250_TIMER_CNT_SHIFT 0
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#define EXYNOS3250_TIMER_CNT_MASK 0x7fffffff
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#define EXYNOS3250_TIMER_CNT_MASK 0x7fffffff
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@ -711,7 +711,7 @@ static int s5p_mfc_set_enc_params(struct s5p_mfc_ctx *ctx)
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reg = mfc_read(dev, S5P_FIMV_ENC_PADDING_CTRL);
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reg = mfc_read(dev, S5P_FIMV_ENC_PADDING_CTRL);
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if (p->pad) {
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if (p->pad) {
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/** enable */
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/** enable */
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reg |= (1 << 31);
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reg |= (1UL << 31);
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/** cr value */
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/** cr value */
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reg &= ~(0xFF << 16);
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reg &= ~(0xFF << 16);
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reg |= (p->pad_cr << 16);
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reg |= (p->pad_cr << 16);
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@ -955,7 +955,7 @@ static int s5p_mfc_set_enc_params_mpeg4(struct s5p_mfc_ctx *ctx)
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S5P_FIMV_ENC_RC_FRAME_RATE);
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S5P_FIMV_ENC_RC_FRAME_RATE);
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shm = s5p_mfc_read_info_v5(ctx, RC_VOP_TIMING);
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shm = s5p_mfc_read_info_v5(ctx, RC_VOP_TIMING);
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shm &= ~(0xFFFFFFFF);
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shm &= ~(0xFFFFFFFF);
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shm |= (1 << 31);
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shm |= (1UL << 31);
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shm |= ((p->rc_framerate_num & 0x7FFF) << 16);
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shm |= ((p->rc_framerate_num & 0x7FFF) << 16);
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shm |= (p->rc_framerate_denom & 0xFFFF);
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shm |= (p->rc_framerate_denom & 0xFFFF);
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s5p_mfc_write_info_v5(ctx, shm, RC_VOP_TIMING);
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s5p_mfc_write_info_v5(ctx, shm, RC_VOP_TIMING);
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@ -840,7 +840,7 @@ static int s5p_mfc_set_enc_params(struct s5p_mfc_ctx *ctx)
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if (p->pad) {
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if (p->pad) {
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reg = 0;
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reg = 0;
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/** enable */
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/** enable */
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reg |= (1 << 31);
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reg |= (1UL << 31);
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/** cr value */
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/** cr value */
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reg |= ((p->pad_cr & 0xFF) << 16);
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reg |= ((p->pad_cr & 0xFF) << 16);
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/** cb value */
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/** cb value */
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@ -125,7 +125,7 @@ struct gemtek {
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#define BU2614_FMUN_SHIFT (BU2614_VOID2_BITS + BU2614_VOID2_SHIFT)
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#define BU2614_FMUN_SHIFT (BU2614_VOID2_BITS + BU2614_VOID2_SHIFT)
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#define BU2614_TEST_SHIFT (BU2614_FMUN_BITS + BU2614_FMUN_SHIFT)
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#define BU2614_TEST_SHIFT (BU2614_FMUN_BITS + BU2614_FMUN_SHIFT)
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#define MKMASK(field) (((1<<BU2614_##field##_BITS) - 1) << \
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#define MKMASK(field) (((1UL<<BU2614_##field##_BITS) - 1) << \
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BU2614_##field##_SHIFT)
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BU2614_##field##_SHIFT)
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#define BU2614_PORT_MASK MKMASK(PORT)
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#define BU2614_PORT_MASK MKMASK(PORT)
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#define BU2614_FREQ_MASK MKMASK(FREQ)
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#define BU2614_FREQ_MASK MKMASK(FREQ)
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@ -353,7 +353,7 @@ static int friio_ext_ctl(struct dvb_usb_device *d,
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ret += i2c_transfer(&d->i2c_adap, &msg, 1);
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ret += i2c_transfer(&d->i2c_adap, &msg, 1);
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/* send 32bit(satur, R, G, B) data in serial */
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/* send 32bit(satur, R, G, B) data in serial */
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mask = 1 << 31;
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mask = 1UL << 31;
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for (i = 0; i < 32; i++) {
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for (i = 0; i < 32; i++) {
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buf[1] = power | FRIIO_CTL_STROBE;
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buf[1] = power | FRIIO_CTL_STROBE;
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if (sat_color & mask)
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if (sat_color & mask)
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@ -660,7 +660,7 @@ static int ctrl_check_input(struct pvr2_ctrl *cptr,int v)
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{
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{
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if (v < 0 || v > PVR2_CVAL_INPUT_MAX)
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if (v < 0 || v > PVR2_CVAL_INPUT_MAX)
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return 0;
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return 0;
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return ((1 << v) & cptr->hdw->input_allowed_mask) != 0;
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return ((1UL << v) & cptr->hdw->input_allowed_mask) != 0;
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}
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}
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static int ctrl_set_input(struct pvr2_ctrl *cptr,int m,int v)
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static int ctrl_set_input(struct pvr2_ctrl *cptr,int m,int v)
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@ -2445,7 +2445,7 @@ struct pvr2_hdw *pvr2_hdw_create(struct usb_interface *intf,
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/* Ensure that default input choice is a valid one. */
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/* Ensure that default input choice is a valid one. */
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m = hdw->input_avail_mask;
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m = hdw->input_avail_mask;
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if (m) for (idx = 0; idx < (sizeof(m) << 3); idx++) {
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if (m) for (idx = 0; idx < (sizeof(m) << 3); idx++) {
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if (!((1 << idx) & m)) continue;
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if (!((1UL << idx) & m)) continue;
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hdw->input_val = idx;
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hdw->input_val = idx;
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break;
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break;
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}
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}
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@ -2501,11 +2501,11 @@ struct pvr2_hdw *pvr2_hdw_create(struct usb_interface *intf,
|
|||||||
// Initialize control data regarding video standard masks
|
// Initialize control data regarding video standard masks
|
||||||
valid_std_mask = pvr2_std_get_usable();
|
valid_std_mask = pvr2_std_get_usable();
|
||||||
for (idx = 0; idx < 32; idx++) {
|
for (idx = 0; idx < 32; idx++) {
|
||||||
if (!(valid_std_mask & (1 << idx))) continue;
|
if (!(valid_std_mask & (1UL << idx))) continue;
|
||||||
cnt1 = pvr2_std_id_to_str(
|
cnt1 = pvr2_std_id_to_str(
|
||||||
hdw->std_mask_names[idx],
|
hdw->std_mask_names[idx],
|
||||||
sizeof(hdw->std_mask_names[idx])-1,
|
sizeof(hdw->std_mask_names[idx])-1,
|
||||||
1 << idx);
|
1UL << idx);
|
||||||
hdw->std_mask_names[idx][cnt1] = 0;
|
hdw->std_mask_names[idx][cnt1] = 0;
|
||||||
}
|
}
|
||||||
cptr = pvr2_hdw_get_ctrl_by_id(hdw,PVR2_CID_STDAVAIL);
|
cptr = pvr2_hdw_get_ctrl_by_id(hdw,PVR2_CID_STDAVAIL);
|
||||||
@ -4672,7 +4672,7 @@ static unsigned int print_input_mask(unsigned int msk,
|
|||||||
unsigned int idx,ccnt;
|
unsigned int idx,ccnt;
|
||||||
unsigned int tcnt = 0;
|
unsigned int tcnt = 0;
|
||||||
for (idx = 0; idx < ARRAY_SIZE(control_values_input); idx++) {
|
for (idx = 0; idx < ARRAY_SIZE(control_values_input); idx++) {
|
||||||
if (!((1 << idx) & msk)) continue;
|
if (!((1UL << idx) & msk)) continue;
|
||||||
ccnt = scnprintf(buf+tcnt,
|
ccnt = scnprintf(buf+tcnt,
|
||||||
acnt-tcnt,
|
acnt-tcnt,
|
||||||
"%s%s",
|
"%s%s",
|
||||||
@ -5099,7 +5099,7 @@ int pvr2_hdw_set_input_allowed(struct pvr2_hdw *hdw,
|
|||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
hdw->input_allowed_mask = nv;
|
hdw->input_allowed_mask = nv;
|
||||||
if ((1 << hdw->input_val) & hdw->input_allowed_mask) {
|
if ((1UL << hdw->input_val) & hdw->input_allowed_mask) {
|
||||||
/* Current mode is still in the allowed mask, so
|
/* Current mode is still in the allowed mask, so
|
||||||
we're done. */
|
we're done. */
|
||||||
break;
|
break;
|
||||||
@ -5112,7 +5112,7 @@ int pvr2_hdw_set_input_allowed(struct pvr2_hdw *hdw,
|
|||||||
}
|
}
|
||||||
m = hdw->input_allowed_mask;
|
m = hdw->input_allowed_mask;
|
||||||
for (idx = 0; idx < (sizeof(m) << 3); idx++) {
|
for (idx = 0; idx < (sizeof(m) << 3); idx++) {
|
||||||
if (!((1 << idx) & m)) continue;
|
if (!((1UL << idx) & m)) continue;
|
||||||
pvr2_hdw_set_input(hdw,idx);
|
pvr2_hdw_set_input(hdw,idx);
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
@ -1003,7 +1003,7 @@ static int pvr2_v4l2_open(struct file *file)
|
|||||||
input_mask &= pvr2_hdw_get_input_available(hdw);
|
input_mask &= pvr2_hdw_get_input_available(hdw);
|
||||||
input_cnt = 0;
|
input_cnt = 0;
|
||||||
for (idx = 0; idx < (sizeof(input_mask) << 3); idx++) {
|
for (idx = 0; idx < (sizeof(input_mask) << 3); idx++) {
|
||||||
if (input_mask & (1 << idx)) input_cnt++;
|
if (input_mask & (1UL << idx)) input_cnt++;
|
||||||
}
|
}
|
||||||
fhp->input_cnt = input_cnt;
|
fhp->input_cnt = input_cnt;
|
||||||
fhp->input_map = kzalloc(input_cnt,GFP_KERNEL);
|
fhp->input_map = kzalloc(input_cnt,GFP_KERNEL);
|
||||||
@ -1018,7 +1018,7 @@ static int pvr2_v4l2_open(struct file *file)
|
|||||||
}
|
}
|
||||||
input_cnt = 0;
|
input_cnt = 0;
|
||||||
for (idx = 0; idx < (sizeof(input_mask) << 3); idx++) {
|
for (idx = 0; idx < (sizeof(input_mask) << 3); idx++) {
|
||||||
if (!(input_mask & (1 << idx))) continue;
|
if (!(input_mask & (1UL << idx))) continue;
|
||||||
fhp->input_map[input_cnt++] = idx;
|
fhp->input_map[input_cnt++] = idx;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -1388,7 +1388,7 @@ static void v4l_fill_fmtdesc(struct v4l2_fmtdesc *fmt)
|
|||||||
(char)((fmt->pixelformat >> 8) & 0x7f),
|
(char)((fmt->pixelformat >> 8) & 0x7f),
|
||||||
(char)((fmt->pixelformat >> 16) & 0x7f),
|
(char)((fmt->pixelformat >> 16) & 0x7f),
|
||||||
(char)((fmt->pixelformat >> 24) & 0x7f),
|
(char)((fmt->pixelformat >> 24) & 0x7f),
|
||||||
(fmt->pixelformat & (1 << 31)) ? "-BE" : "");
|
(fmt->pixelformat & (1UL << 31)) ? "-BE" : "");
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
Loading…
Reference in New Issue
Block a user