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Merge patch series "Fix RISC-V toolchain extension support detection"
Conor Dooley <conor@kernel.org> says: From: Conor Dooley <conor.dooley@microchip.com> This came up due to a report from Kevin @ kernel-ci, who had been running a mixed configuration of GNU binutils and clang. Their compiler was relatively recent & supports Zicbom but binutils @ 2.35.2 did not. Our current checks for extension support only cover the compiler, but it appears to me that we need to check both the compiler & linker support in case of "pot-luck" configurations that mix different versions of LD,AS,CC etc. Linker support does not seem possible to actually check, since the ISA string is emitted into the object files - so I put in version checks for that. The checks have gotten a bit ugly since 32 & 64 bit support need to be checked independently but ahh well. As I was going, I fell into the trap of there being duplicated checks for CC support in both the Makefile and Kconfig, so as part of renaming the Kconfig symbol to TOOLCHAIN_HAS_FOO, I dropped the extra checks in the Makefile. This has the added advantage of the TOOLCHAIN_HAS_FOO symbol for Zihintpause appearing in .config. I pushed out a version of this that specificly checked for assember support for LKP to test & it looked /okay/ - but I did some more testing today and realised that this is redudant & have since dropped the as check. I tested locally with a fair few different combinations, to try and cover each of AS, LD, CC missing support for the extension. * b4-shazam-merge: riscv: fix detection of toolchain Zihintpause support riscv: fix detection of toolchain Zicbom support Link: https://lore.kernel.org/r/20221006173520.1785507-1-conor@kernel.org Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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commit
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@ -411,14 +411,16 @@ config RISCV_ISA_SVPBMT
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If you don't know what to do here, say Y.
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config CC_HAS_ZICBOM
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config TOOLCHAIN_HAS_ZICBOM
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bool
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default y if 64BIT && $(cc-option,-mabi=lp64 -march=rv64ima_zicbom)
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default y if 32BIT && $(cc-option,-mabi=ilp32 -march=rv32ima_zicbom)
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default y
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depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64ima_zicbom)
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depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32ima_zicbom)
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depends on LLD_VERSION >= 150000 || LD_VERSION >= 23800
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config RISCV_ISA_ZICBOM
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bool "Zicbom extension support for non-coherent DMA operation"
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depends on CC_HAS_ZICBOM
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depends on TOOLCHAIN_HAS_ZICBOM
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depends on !XIP_KERNEL && MMU
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select RISCV_DMA_NONCOHERENT
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select RISCV_ALTERNATIVE
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@ -433,6 +435,13 @@ config RISCV_ISA_ZICBOM
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If you don't know what to do here, say Y.
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config TOOLCHAIN_HAS_ZIHINTPAUSE
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bool
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default y
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depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64ima_zihintpause)
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depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32ima_zihintpause)
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depends on LLD_VERSION >= 150000 || LD_VERSION >= 23600
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config FPU
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bool "FPU support"
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default y
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@ -59,12 +59,10 @@ toolchain-need-zicsr-zifencei := $(call cc-option-yn, -march=$(riscv-march-y)_zi
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riscv-march-$(toolchain-need-zicsr-zifencei) := $(riscv-march-y)_zicsr_zifencei
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# Check if the toolchain supports Zicbom extension
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toolchain-supports-zicbom := $(call cc-option-yn, -march=$(riscv-march-y)_zicbom)
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riscv-march-$(toolchain-supports-zicbom) := $(riscv-march-y)_zicbom
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riscv-march-$(CONFIG_TOOLCHAIN_HAS_ZICBOM) := $(riscv-march-y)_zicbom
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# Check if the toolchain supports Zihintpause extension
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toolchain-supports-zihintpause := $(call cc-option-yn, -march=$(riscv-march-y)_zihintpause)
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riscv-march-$(toolchain-supports-zihintpause) := $(riscv-march-y)_zihintpause
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riscv-march-$(CONFIG_TOOLCHAIN_HAS_ZIHINTPAUSE) := $(riscv-march-y)_zihintpause
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KBUILD_CFLAGS += -march=$(subst fd,,$(riscv-march-y))
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KBUILD_AFLAGS += -march=$(riscv-march-y)
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@ -21,7 +21,7 @@ static inline void cpu_relax(void)
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* Reduce instruction retirement.
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* This assumes the PC changes.
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*/
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#ifdef __riscv_zihintpause
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#ifdef CONFIG_TOOLCHAIN_HAS_ZIHINTPAUSE
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__asm__ __volatile__ ("pause");
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#else
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/* Encoding of the pause instruction */
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